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crypto: caam - increase the domain of write memory barrier to full system

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In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb()
fail to make the input ring be updated before the CAAM starts
reading it. So, CAAM will process, again, an old descriptor address
and will put it in the output ring. This will make caam_jr_dequeue()
to fail, since this old descriptor is not in the software ring.
To fix this, use wmb() which works on the full system instead of
inner/outer shareable domains.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Iuliana Prodan 2023-08-08 12:55:26 +02:00 committed by Herbert Xu
parent e306852047
commit e47e6d2aaa
1 changed files with 9 additions and 1 deletions
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10
drivers/crypto/caam/jr.c
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@ -464,8 +464,16 @@ int caam_jr_enqueue(struct device *dev, u32 *desc,
* Guarantee that the descriptor's DMA address has been written to
* the next slot in the ring before the write index is updated, since
* other cores may update this index independently.
*
* Under heavy DDR load, smp_wmb() or dma_wmb() fail to make the input
* ring be updated before the CAAM starts reading it. So, CAAM will
* process, again, an old descriptor address and will put it in the
* output ring. This will make caam_jr_dequeue() to fail, since this
* old descriptor is not in the software ring.
* To fix this, use wmb() which works on the full system instead of
* inner/outer shareable domains.
*/
smp_wmb();
wmb();
jrp->head = (head + 1) & (JOBR_DEPTH - 1);