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drm fixes for final 4.8, udl, amdgpu/radeon and nouveau
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commit
e3b3656ca6
@ -1708,11 +1708,11 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
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DRM_INFO("amdgpu: finishing device.\n");
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adev->shutdown = true;
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drm_crtc_force_disable_all(adev->ddev);
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/* evict vram memory */
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amdgpu_bo_evict_vram(adev);
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amdgpu_ib_pool_fini(adev);
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amdgpu_fence_driver_fini(adev);
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drm_crtc_force_disable_all(adev->ddev);
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amdgpu_fbdev_fini(adev);
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r = amdgpu_fini(adev);
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kfree(adev->ip_block_status);
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@ -175,6 +175,7 @@ struct nvkm_device_func {
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void (*fini)(struct nvkm_device *, bool suspend);
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resource_size_t (*resource_addr)(struct nvkm_device *, unsigned bar);
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resource_size_t (*resource_size)(struct nvkm_device *, unsigned bar);
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bool cpu_coherent;
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};
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struct nvkm_device_quirk {
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@ -209,7 +209,8 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,
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nvbo->tile_flags = tile_flags;
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nvbo->bo.bdev = &drm->ttm.bdev;
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nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED;
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if (!nvxx_device(&drm->device)->func->cpu_coherent)
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nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED;
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nvbo->page_shift = 12;
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if (drm->client.vm) {
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@ -1614,6 +1614,7 @@ nvkm_device_pci_func = {
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.fini = nvkm_device_pci_fini,
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.resource_addr = nvkm_device_pci_resource_addr,
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.resource_size = nvkm_device_pci_resource_size,
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.cpu_coherent = !IS_ENABLED(CONFIG_ARM),
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};
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int
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@ -245,6 +245,7 @@ nvkm_device_tegra_func = {
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.fini = nvkm_device_tegra_fini,
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.resource_addr = nvkm_device_tegra_resource_addr,
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.resource_size = nvkm_device_tegra_resource_size,
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.cpu_coherent = false,
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};
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int
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@ -37,7 +37,10 @@ nv04_fifo_dma_object_dtor(struct nvkm_fifo_chan *base, int cookie)
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{
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struct nv04_fifo_chan *chan = nv04_fifo_chan(base);
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struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem;
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mutex_lock(&chan->fifo->base.engine.subdev.mutex);
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nvkm_ramht_remove(imem->ramht, cookie);
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mutex_unlock(&chan->fifo->base.engine.subdev.mutex);
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}
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static int
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@ -3015,6 +3015,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
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if (rdev->pdev->device == 0x6811 &&
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rdev->pdev->revision == 0x81)
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max_mclk = 120000;
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/* limit sclk/mclk on Jet parts for stability */
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if (rdev->pdev->device == 0x6665 &&
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rdev->pdev->revision == 0xc3) {
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max_sclk = 75000;
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max_mclk = 80000;
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}
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if (rps->vce_active) {
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rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
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@ -122,7 +122,7 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y,
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return 0;
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cmd = urb->transfer_buffer;
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for (i = y; i < height ; i++) {
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for (i = y; i < y + height ; i++) {
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const int line_offset = fb->base.pitches[0] * i;
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const int byte_offset = line_offset + (x * bpp);
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const int dev_byte_offset = (fb->base.width * bpp * i) + (x * bpp);
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