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pinctrl: nomadik: convert driver to use gpiolib irqchip
This converts the Nomadik pin control driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
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8d5b24bd30
commit
e0bc34a3da
@ -235,6 +235,9 @@ config PINCTRL_NOMADIK
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depends on ARCH_U8500 || ARCH_NOMADIK
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select PINMUX
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select PINCONF
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select GPIOLIB
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select OF_GPIO
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select GPIOLIB_IRQCHIP
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config PINCTRL_STN8815
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bool "STN8815 pin controller driver"
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@ -21,9 +21,6 @@
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#include <linux/gpio.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/slab.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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@ -248,7 +245,6 @@ enum nmk_gpio_slpm {
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struct nmk_gpio_chip {
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struct gpio_chip chip;
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struct irq_domain *domain;
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void __iomem *addr;
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struct clk *clk;
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unsigned int bank;
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@ -419,7 +415,7 @@ nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)
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u32 falling = nmk_chip->fimsc & BIT(offset);
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u32 rising = nmk_chip->rimsc & BIT(offset);
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int gpio = nmk_chip->chip.base + offset;
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int irq = irq_find_mapping(nmk_chip->domain, offset);
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int irq = irq_find_mapping(nmk_chip->chip.irqdomain, offset);
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struct irq_data *d = irq_get_irq_data(irq);
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if (!rising && !falling)
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@ -647,11 +643,8 @@ static inline int nmk_gpio_get_bitmask(int gpio)
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static void nmk_gpio_irq_ack(struct irq_data *d)
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{
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struct nmk_gpio_chip *nmk_chip;
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nmk_chip = irq_data_get_irq_chip_data(d);
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if (!nmk_chip)
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return;
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struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
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struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
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clk_enable(nmk_chip->clk);
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writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
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@ -848,26 +841,6 @@ static void nmk_gpio_irq_shutdown(struct irq_data *d)
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clk_disable(nmk_chip->clk);
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}
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static int nmk_gpio_irq_reqres(struct irq_data *d)
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{
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struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
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if (gpio_lock_as_irq(&nmk_chip->chip, d->hwirq)) {
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dev_err(nmk_chip->chip.dev,
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"unable to lock HW IRQ %lu for IRQ\n",
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d->hwirq);
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return -EINVAL;
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}
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return 0;
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}
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static void nmk_gpio_irq_relres(struct irq_data *d)
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{
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struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
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gpio_unlock_as_irq(&nmk_chip->chip, d->hwirq);
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}
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static struct irq_chip nmk_gpio_irq_chip = {
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.name = "Nomadik-GPIO",
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.irq_ack = nmk_gpio_irq_ack,
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@ -877,24 +850,21 @@ static struct irq_chip nmk_gpio_irq_chip = {
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.irq_set_wake = nmk_gpio_irq_set_wake,
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.irq_startup = nmk_gpio_irq_startup,
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.irq_shutdown = nmk_gpio_irq_shutdown,
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.irq_request_resources = nmk_gpio_irq_reqres,
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.irq_release_resources = nmk_gpio_irq_relres,
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.flags = IRQCHIP_MASK_ON_SUSPEND,
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};
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static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
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u32 status)
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{
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struct nmk_gpio_chip *nmk_chip;
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struct irq_chip *host_chip = irq_get_chip(irq);
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struct gpio_chip *chip = irq_desc_get_handler_data(desc);
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chained_irq_enter(host_chip, desc);
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nmk_chip = irq_get_handler_data(irq);
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while (status) {
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int bit = __ffs(status);
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generic_handle_irq(irq_find_mapping(nmk_chip->domain, bit));
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generic_handle_irq(irq_find_mapping(chip->irqdomain, bit));
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status &= ~BIT(bit);
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}
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@ -903,9 +873,11 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
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static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
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struct gpio_chip *chip = irq_desc_get_handler_data(desc);
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struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
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u32 status;
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pr_err("PLONK IRQ %d\n", irq);
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clk_enable(nmk_chip->clk);
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status = readl(nmk_chip->addr + NMK_GPIO_IS);
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clk_disable(nmk_chip->clk);
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@ -916,26 +888,13 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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static void nmk_gpio_latent_irq_handler(unsigned int irq,
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struct irq_desc *desc)
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{
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struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
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struct gpio_chip *chip = irq_desc_get_handler_data(desc);
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struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
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u32 status = nmk_chip->get_latent_status(nmk_chip->bank);
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__nmk_gpio_irq_handler(irq, desc, status);
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}
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static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
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{
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irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
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irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
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if (nmk_chip->latent_parent_irq >= 0) {
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irq_set_chained_handler(nmk_chip->latent_parent_irq,
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nmk_gpio_latent_irq_handler);
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irq_set_handler_data(nmk_chip->latent_parent_irq, nmk_chip);
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}
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return 0;
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}
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/* I/O Functions */
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static int nmk_gpio_request(struct gpio_chip *chip, unsigned offset)
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@ -1014,14 +973,6 @@ static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
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return 0;
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}
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static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct nmk_gpio_chip *nmk_chip =
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container_of(chip, struct nmk_gpio_chip, chip);
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return irq_create_mapping(nmk_chip->domain, offset);
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}
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#ifdef CONFIG_DEBUG_FS
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#include <linux/seq_file.h>
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@ -1120,7 +1071,6 @@ static struct gpio_chip nmk_gpio_template = {
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.get = nmk_gpio_get_input,
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.direction_output = nmk_gpio_make_output,
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.set = nmk_gpio_set_output,
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.to_irq = nmk_gpio_to_irq,
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.dbg_show = nmk_gpio_dbg_show,
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.can_sleep = false,
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};
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@ -1221,27 +1171,6 @@ void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
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}
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}
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static int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct nmk_gpio_chip *nmk_chip = d->host_data;
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if (!nmk_chip)
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return -EINVAL;
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irq_set_chip_and_handler(irq, &nmk_gpio_irq_chip, handle_edge_irq);
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set_irq_flags(irq, IRQF_VALID);
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irq_set_chip_data(irq, nmk_chip);
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irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
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return 0;
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}
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static const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
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.map = nmk_gpio_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static int nmk_gpio_probe(struct platform_device *dev)
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{
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struct device_node *np = dev->dev.of_node;
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@ -1321,17 +1250,31 @@ static int nmk_gpio_probe(struct platform_device *dev)
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platform_set_drvdata(dev, nmk_chip);
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nmk_chip->domain = irq_domain_add_simple(np,
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NMK_GPIO_PER_CHIP, 0,
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&nmk_gpio_irq_simple_ops, nmk_chip);
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if (!nmk_chip->domain) {
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dev_err(&dev->dev, "failed to create irqdomain\n");
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/* Just do this, no matter if it fails */
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/*
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* Let the generic code handle this edge IRQ, the the chained
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* handler will perform the actual work of handling the parent
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* interrupt.
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*/
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ret = gpiochip_irqchip_add(&nmk_chip->chip,
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&nmk_gpio_irq_chip,
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0,
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handle_edge_irq,
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IRQ_TYPE_EDGE_FALLING);
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if (ret) {
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dev_err(&dev->dev, "could not add irqchip\n");
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ret = gpiochip_remove(&nmk_chip->chip);
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return -ENOSYS;
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return -ENODEV;
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}
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nmk_gpio_init_irq(nmk_chip);
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/* Then register the chain on the parent IRQ */
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gpiochip_set_chained_irqchip(&nmk_chip->chip,
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&nmk_gpio_irq_chip,
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nmk_chip->parent_irq,
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nmk_gpio_irq_handler);
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if (nmk_chip->latent_parent_irq > 0)
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gpiochip_set_chained_irqchip(&nmk_chip->chip,
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&nmk_gpio_irq_chip,
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nmk_chip->latent_parent_irq,
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nmk_gpio_latent_irq_handler);
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dev_info(&dev->dev, "at address %p\n", nmk_chip->addr);
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