soundwire: amd: use inline function for register update

Define common inline function for register update.
Use this inline function for updating SoundWire Pad registers
and enable/disable SoundWire interrupt control registers.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20240327063143.2266464-1-Vijendar.Mukunda@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Vijendar Mukunda 2024-03-27 12:01:42 +05:30 committed by Vinod Koul
parent 91c4dd2e5c
commit e05af1a42b
3 changed files with 30 additions and 27 deletions

View File

@ -17,42 +17,38 @@
#define ACP_PAD_PULLDOWN_CTRL 0x0001448
#define ACP_SW_PAD_KEEPER_EN 0x0001454
#define AMD_SDW_PAD_PULLDOWN_CTRL_ENABLE_MASK 0x7f9a
#define AMD_SDW0_PAD_PULLDOWN_CTRL_ENABLE_MASK 0x7f9f
#define AMD_SDW1_PAD_PULLDOWN_CTRL_ENABLE_MASK 0x7ffa
#define AMD_SDW0_PAD_EN_MASK 1
#define AMD_SDW1_PAD_EN_MASK 0x10
#define AMD_SDW_PAD_EN_MASK (AMD_SDW0_PAD_EN_MASK | AMD_SDW1_PAD_EN_MASK)
#define AMD_SDW0_PAD_CTRL_MASK 0x60
#define AMD_SDW1_PAD_CTRL_MASK 5
#define AMD_SDW_PAD_CTRL_MASK (AMD_SDW0_PAD_CTRL_MASK | AMD_SDW1_PAD_CTRL_MASK)
#define AMD_SDW0_PAD_EN 1
#define AMD_SDW1_PAD_EN 0x10
#define AMD_SDW_PAD_EN (AMD_SDW0_PAD_EN | AMD_SDW1_PAD_EN)
static int amd_enable_sdw_pads(void __iomem *mmio, u32 link_mask, struct device *dev)
{
u32 val;
u32 pad_keeper_en_mask, pad_pulldown_ctrl_mask;
u32 pad_keeper_en, pad_pulldown_ctrl_mask;
switch (link_mask) {
case 1:
pad_keeper_en_mask = AMD_SDW0_PAD_EN_MASK;
pad_pulldown_ctrl_mask = AMD_SDW0_PAD_PULLDOWN_CTRL_ENABLE_MASK;
pad_keeper_en = AMD_SDW0_PAD_EN;
pad_pulldown_ctrl_mask = AMD_SDW0_PAD_CTRL_MASK;
break;
case 2:
pad_keeper_en_mask = AMD_SDW1_PAD_EN_MASK;
pad_pulldown_ctrl_mask = AMD_SDW1_PAD_PULLDOWN_CTRL_ENABLE_MASK;
pad_keeper_en = AMD_SDW1_PAD_EN;
pad_pulldown_ctrl_mask = AMD_SDW1_PAD_CTRL_MASK;
break;
case 3:
pad_keeper_en_mask = AMD_SDW_PAD_EN_MASK;
pad_pulldown_ctrl_mask = AMD_SDW_PAD_PULLDOWN_CTRL_ENABLE_MASK;
pad_keeper_en = AMD_SDW_PAD_EN;
pad_pulldown_ctrl_mask = AMD_SDW_PAD_CTRL_MASK;
break;
default:
dev_err(dev, "No SDW Links are enabled\n");
return -ENODEV;
}
val = readl(mmio + ACP_SW_PAD_KEEPER_EN);
val |= pad_keeper_en_mask;
writel(val, mmio + ACP_SW_PAD_KEEPER_EN);
val = readl(mmio + ACP_PAD_PULLDOWN_CTRL);
val &= pad_pulldown_ctrl_mask;
writel(val, mmio + ACP_PAD_PULLDOWN_CTRL);
amd_updatel(mmio, ACP_SW_PAD_KEEPER_EN, pad_keeper_en, pad_keeper_en);
amd_updatel(mmio, ACP_PAD_PULLDOWN_CTRL, pad_pulldown_ctrl_mask, 0);
return 0;
}

View File

@ -10,4 +10,12 @@
int amd_sdw_manager_start(struct amd_sdw_manager *amd_manager);
static inline void amd_updatel(void __iomem *mmio, int offset, u32 mask, u32 val)
{
u32 tmp;
tmp = readl(mmio + offset);
tmp = (tmp & ~mask) | val;
writel(tmp, mmio + offset);
}
#endif

View File

@ -89,9 +89,8 @@ static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager)
u32 val;
mutex_lock(amd_manager->acp_sdw_lock);
val = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
val |= sdw_manager_reg_mask_array[amd_manager->instance];
writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
val = sdw_manager_reg_mask_array[amd_manager->instance];
amd_updatel(amd_manager->acp_mmio, ACP_EXTERNAL_INTR_CNTL(amd_manager->instance), val, val);
mutex_unlock(amd_manager->acp_sdw_lock);
writel(AMD_SDW_IRQ_MASK_0TO7, amd_manager->mmio +
@ -103,12 +102,12 @@ static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager)
static void amd_disable_sdw_interrupts(struct amd_sdw_manager *amd_manager)
{
u32 val;
u32 irq_mask;
mutex_lock(amd_manager->acp_sdw_lock);
val = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
val &= ~sdw_manager_reg_mask_array[amd_manager->instance];
writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
irq_mask = sdw_manager_reg_mask_array[amd_manager->instance];
amd_updatel(amd_manager->acp_mmio, ACP_EXTERNAL_INTR_CNTL(amd_manager->instance),
irq_mask, 0);
mutex_unlock(amd_manager->acp_sdw_lock);
writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_0TO7);