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[ARM] 5015/1: arm: remove ARCH_CO285
Trying to compile a kerel for ARCH_CO285 fails with the following error: <-- snip --> ... CC arch/arm/mach-footbridge/dc21285.o /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c: In function 'dc21285_base_address': /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: 'PCICFG0_BASE' undeclared (first use in this function) /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: (Each undeclared identifier is reported only once /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: for each function it appears in.) /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:57: error: 'PCICFG1_BASE' undeclared (first use in this function) /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c: In function 'dc21285_scan_bus': /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:286: error: implicit declaration of function 'pci_scan_bus' ... make[2]: *** [arch/arm/mach-footbridge/dc21285.o] Error 1 <-- snip --> This does not seem to be a recent breakage. The ARCH_CO285 support is old - kernel 2.2.0 contains first traces of it, an it seems to have been pretty complete in later 2.2 kernels. Since it seems to be completely dead code now this patch therefore removes it. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -232,14 +232,6 @@ config ARCH_CLPS711X
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help
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Support for Cirrus Logic 711x/721x based boards.
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config ARCH_CO285
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bool "Co-EBSA285"
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select FOOTBRIDGE
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select FOOTBRIDGE_ADDIN
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select HAVE_IDE
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help
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Support for Intel's EBSA285 companion chip.
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config ARCH_EBSA110
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bool "EBSA-110"
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select ISA
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@ -784,7 +776,7 @@ source "mm/Kconfig"
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config LEDS
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bool "Timer and CPU usage LEDs"
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depends on ARCH_CDB89712 || ARCH_CO285 || ARCH_EBSA110 || \
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depends on ARCH_CDB89712 || ARCH_EBSA110 || \
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ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \
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ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
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ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
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@ -100,8 +100,6 @@ textofs-y := 0x00008000
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incdir-$(CONFIG_ARCH_CLPS7500) := cl7500
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machine-$(CONFIG_FOOTBRIDGE) := footbridge
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incdir-$(CONFIG_FOOTBRIDGE) := ebsa285
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machine-$(CONFIG_ARCH_CO285) := footbridge
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incdir-$(CONFIG_ARCH_CO285) := ebsa285
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machine-$(CONFIG_ARCH_SHARK) := shark
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machine-$(CONFIG_ARCH_SA1100) := sa1100
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ifeq ($(CONFIG_ARCH_SA1100),y)
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@ -14,12 +14,10 @@ pci-$(CONFIG_ARCH_EBSA285_HOST) += ebsa285-pci.o
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pci-$(CONFIG_ARCH_NETWINDER) += netwinder-pci.o
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pci-$(CONFIG_ARCH_PERSONAL_SERVER) += personal-pci.o
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leds-$(CONFIG_ARCH_CO285) += ebsa285-leds.o
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leds-$(CONFIG_ARCH_EBSA285) += ebsa285-leds.o
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leds-$(CONFIG_ARCH_NETWINDER) += netwinder-leds.o
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obj-$(CONFIG_ARCH_CATS) += cats-hw.o isa-timer.o
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obj-$(CONFIG_ARCH_CO285) += co285.o dc21285-timer.o
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obj-$(CONFIG_ARCH_EBSA285) += ebsa285.o dc21285-timer.o
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obj-$(CONFIG_ARCH_NETWINDER) += netwinder-hw.o isa-timer.o
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obj-$(CONFIG_ARCH_PERSONAL_SERVER) += personal.o dc21285-timer.o
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@ -1,39 +0,0 @@
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/*
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* linux/arch/arm/mach-footbridge/co285.c
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*
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* CO285 machine fixup
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*/
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#include <linux/init.h>
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#include <asm/hardware/dec21285.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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static void __init
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fixup_coebsa285(struct machine_desc *desc, struct tag *tags,
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char **cmdline, struct meminfo *mi)
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{
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extern unsigned long boot_memory_end;
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extern char boot_command_line[];
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mi->nr_banks = 1;
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mi->bank[0].start = PHYS_OFFSET;
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mi->bank[0].size = boot_memory_end;
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mi->bank[0].node = 0;
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*cmdline = boot_command_line;
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}
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MACHINE_START(CO285, "co-EBSA285")
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/* Maintainer: Mark van Doesburg */
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.phys_io = DC21285_ARMCSR_BASE,
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.io_pg_offst = ((0x7cf00000) >> 18) & 0xfffc,
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.fixup = fixup_coebsa285,
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.map_io = footbridge_map_io,
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.init_irq = footbridge_init_irq,
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.timer = &footbridge_timer,
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MACHINE_END
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@ -177,25 +177,6 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = {
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#endif
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};
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/*
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* The CO-ebsa285 mapping.
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*/
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static struct map_desc co285_io_desc[] __initdata = {
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#ifdef CONFIG_ARCH_CO285
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{
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.virtual = PCIO_BASE,
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.pfn = __phys_to_pfn(DC21285_PCI_IO),
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.length = PCIO_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = PCIMEM_BASE,
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.pfn = __phys_to_pfn(DC21285_PCI_MEM),
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.length = PCIMEM_SIZE,
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.type = MT_DEVICE,
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},
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#endif
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};
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void __init footbridge_map_io(void)
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{
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/*
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@ -208,8 +189,6 @@ void __init footbridge_map_io(void)
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* Now, work out what we've got to map in addition on this
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* platform.
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*/
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if (machine_is_co285())
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iotable_init(co285_io_desc, ARRAY_SIZE(co285_io_desc));
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if (footbridge_cfn_mode())
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iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
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}
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@ -128,7 +128,7 @@ static void ebsa285_leds_event(led_event_t evt)
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static int __init leds_init(void)
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{
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if (machine_is_ebsa285() || machine_is_co285())
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if (machine_is_ebsa285())
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leds_event = ebsa285_leds_event;
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leds_event(led_start);
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@ -115,8 +115,7 @@ static int set_isa_cmos_time(void)
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void __init isa_rtc_init(void)
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{
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if (machine_is_co285() ||
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machine_is_personal_server())
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if (machine_is_personal_server())
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/*
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* Add-in 21285s shouldn't access the RTC
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*/
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@ -14,7 +14,6 @@
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#include <asm/arch/memory.h>
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#ifdef CONFIG_ARCH_FOOTBRIDGE
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/* Virtual Physical Size
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* 0xff800000 0x40000000 1MB X-Bus
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* 0xff000000 0x7c000000 1MB PCI I/O space
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@ -50,31 +49,6 @@
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#define PCIMEM_SIZE 0x01000000
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#define PCIMEM_BASE 0xf0000000
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#elif defined(CONFIG_ARCH_CO285)
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/*
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* This is the COEBSA285 cut-down mapping
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*/
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#define PCIMEM_SIZE 0x80000000
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#define PCIMEM_BASE 0x80000000
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#define WFLUSH_SIZE 0x01000000
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#define WFLUSH_BASE 0x7d000000
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#define ARMCSR_SIZE 0x00100000
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#define ARMCSR_BASE 0x7cf00000
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#define XBUS_SIZE 0x00020000
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#define XBUS_BASE 0x7cee0000
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#define PCIO_SIZE 0x00010000
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#define PCIO_BASE 0x7ced0000
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#else
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#error "Undefined footbridge architecture"
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#endif
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#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000))
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#define XBUS_LED_AMBER (1 << 0)
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#define XBUS_LED_GREEN (1 << 1)
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@ -42,8 +42,6 @@ extern unsigned long __bus_to_virt(unsigned long);
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#endif
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#if defined(CONFIG_ARCH_FOOTBRIDGE)
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/* Task size and page offset at 3GB */
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#define TASK_SIZE UL(0xbf000000)
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#define PAGE_OFFSET UL(0xc0000000)
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@ -53,23 +51,6 @@ extern unsigned long __bus_to_virt(unsigned long);
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*/
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#define FLUSH_BASE 0xf9000000
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#elif defined(CONFIG_ARCH_CO285)
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/* Task size and page offset at 1.5GB */
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#define TASK_SIZE UL(0x5f000000)
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#define PAGE_OFFSET UL(0x60000000)
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/*
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* Cache flushing area.
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*/
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#define FLUSH_BASE 0x7e000000
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#else
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#error "Undefined footbridge architecture"
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#endif
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/*
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* Physical DRAM offset.
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*/
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*/
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#ifdef CONFIG_ARCH_FOOTBRIDGE
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#define VMALLOC_END (PAGE_OFFSET + 0x30000000)
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#else
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#define VMALLOC_END (PAGE_OFFSET + 0x20000000)
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#endif
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