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coresight: etm4x: Add support for handling errors

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Add support for handling errors in enabling the component.
The ETM is enabled via cross call to owner CPU. Make
necessary changes to report the error back from the cross
call.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Suzuki K Poulose 2018-09-20 13:18:07 -06:00 committed by Greg Kroah-Hartman
parent 1d364034aa
commit e006d89abe
1 changed files with 26 additions and 13 deletions
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39
drivers/hwtracing/coresight/coresight-etm4x.c
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@ -78,10 +78,14 @@ static int etm4_trace_id(struct coresight_device *csdev)
return drvdata->trcid;
}
static void etm4_enable_hw(void *info)
struct etm4_enable_arg {
struct etmv4_drvdata *drvdata;
int rc;
};
static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
{
int i;
struct etmv4_drvdata *drvdata = info;
struct etmv4_config *config = &drvdata->config;
CS_UNLOCK(drvdata->base);
@ -178,6 +182,16 @@ static void etm4_enable_hw(void *info)
CS_LOCK(drvdata->base);
dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
return 0;
}
static void etm4_enable_hw_smp_call(void *info)
{
struct etm4_enable_arg *arg = info;
if (WARN_ON(!arg))
return;
arg->rc = etm4_enable_hw(arg->drvdata);
}
static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,
@ -243,7 +257,7 @@ static int etm4_enable_perf(struct coresight_device *csdev,
if (ret)
goto out;
/* And enable it */
etm4_enable_hw(drvdata);
ret = etm4_enable_hw(drvdata);
out:
return ret;
@ -252,6 +266,7 @@ out:
static int etm4_enable_sysfs(struct coresight_device *csdev)
{
struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
struct etm4_enable_arg arg = { 0 };
int ret;
spin_lock(&drvdata->spinlock);
@ -260,19 +275,17 @@ static int etm4_enable_sysfs(struct coresight_device *csdev)
* Executing etm4_enable_hw on the cpu whose ETM is being enabled
* ensures that register writes occur when cpu is powered.
*/
arg.drvdata = drvdata;
ret = smp_call_function_single(drvdata->cpu,
etm4_enable_hw, drvdata, 1);
if (ret)
goto err;
drvdata->sticky_enable = true;
etm4_enable_hw_smp_call, &arg, 1);
if (!ret)
ret = arg.rc;
if (!ret)
drvdata->sticky_enable = true;
spin_unlock(&drvdata->spinlock);
dev_dbg(drvdata->dev, "ETM tracing enabled\n");
return 0;
err:
spin_unlock(&drvdata->spinlock);
if (!ret)
dev_dbg(drvdata->dev, "ETM tracing enabled\n");
return ret;
}