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scsi: qla2xxx: edif: Add key update
Some FC adapters from Marvell offer the ability to encrypt data in flight (EDIF). This feature requires an application to act as an authenticator. As part of the authentication process, the authentication application will generate a SADB entry (Security Association/SA, key, SPI value, etc). This SADB is then passed to driver to be programmed into hardware. There will be a pair of SADB's (Tx and Rx) for each connection. After some period, the application can choose to change the key. At that time, a new set of SADB pair is given to driver. The old set of SADB will be deleted. Add a new bsg call (QL_VND_SC_SA_UPDATE) to allow application to allow adding or deleting SADB entries. Driver will not keep the key in memory. It will pass it to HW. It is assumed that application will assign a unique SPI value to this SADB (SA + key). Driver + hardware will assign a handle to track this unique SPI/SADB. Link: https://lore.kernel.org/r/20210624052606.21613-6-njavali@marvell.com Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com> Co-developed-by: Larry Wisneski <Larry.Wisneski@marvell.com> Signed-off-by: Larry Wisneski <Larry.Wisneski@marvell.com> Co-developed-by: Duane Grigsby <duane.grigsby@marvell.com> Signed-off-by: Duane Grigsby <duane.grigsby@marvell.com> Co-developed-by: Rick Hicksted Jr <rhicksted@marvell.com> Signed-off-by: Rick Hicksted Jr <rhicksted@marvell.com> Signed-off-by: Quinn Tran <qutran@marvell.com> Signed-off-by: Nilesh Javali <njavali@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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dd30706e73
@ -401,6 +401,7 @@ struct srb_cmd {
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#define SRB_CRC_CTX_DSD_VALID BIT_5 /* DIF: dsd_list valid */
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#define SRB_WAKEUP_ON_COMP BIT_6
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#define SRB_DIF_BUNDL_DMA_VALID BIT_7 /* DIF: DMA list valid */
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#define SRB_EDIF_CLEANUP_DELETE BIT_9
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/* To identify if a srb is of T10-CRC type. @sp => srb_t pointer */
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#define IS_PROT_IO(sp) (sp->flags & SRB_CRC_CTX_DSD_VALID)
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@ -595,6 +596,10 @@ struct srb_iocb {
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u16 cmd;
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u16 vp_index;
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} ctrlvp;
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struct {
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struct edif_sa_ctl *sa_ctl;
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struct qla_sa_update_frame sa_frame;
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} sa_update;
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} u;
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struct timer_list timer;
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@ -2616,7 +2621,12 @@ typedef struct fc_port {
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uint32_t app_stop:2;
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uint32_t app_started:1;
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uint32_t secured_login:1;
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uint32_t aes_gmac:1;
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uint32_t app_sess_online:1;
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uint32_t tx_sa_set:1;
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uint32_t rx_sa_set:1;
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uint32_t tx_sa_pending:1;
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uint32_t rx_sa_pending:1;
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uint32_t tx_rekey_cnt;
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uint32_t rx_rekey_cnt;
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uint64_t tx_bytes;
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@ -2624,6 +2634,12 @@ typedef struct fc_port {
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uint8_t non_secured_login;
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uint8_t auth_state;
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uint16_t rekey_cnt;
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struct list_head edif_indx_list;
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spinlock_t indx_list_lock;
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struct list_head tx_sa_list;
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struct list_head rx_sa_list;
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spinlock_t sa_list_lock;
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} edif;
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} fc_port_t;
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@ -2679,6 +2695,7 @@ static const char * const port_dstate_str[] = {
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#define FCF_CONF_COMP_SUPPORTED BIT_4
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#define FCF_ASYNC_ACTIVE BIT_5
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#define FCF_FCSP_DEVICE BIT_6
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#define FCF_EDIF_DELETE BIT_7
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/* No loop ID flag. */
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#define FC_NO_LOOP_ID 0x1000
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@ -3449,6 +3466,7 @@ enum qla_work_type {
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QLA_EVT_SP_RETRY,
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QLA_EVT_IIDMA,
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QLA_EVT_ELS_PLOGI,
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QLA_EVT_SA_REPLACE,
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};
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@ -3507,6 +3525,11 @@ struct qla_work_evt {
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u8 fc4_type;
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srb_t *sp;
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} gpnft;
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struct {
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struct edif_sa_ctl *sa_ctl;
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fc_port_t *fcport;
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uint16_t nport_handle;
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} sa_update;
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} u;
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};
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@ -4684,6 +4707,16 @@ struct qla_hw_data {
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u64 prev_cmd_cnt;
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struct dma_pool *purex_dma_pool;
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struct btree_head32 host_map;
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#define EDIF_NUM_SA_INDEX 512
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#define EDIF_TX_SA_INDEX_BASE EDIF_NUM_SA_INDEX
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void *edif_rx_sa_id_map;
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void *edif_tx_sa_id_map;
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spinlock_t sadb_fp_lock;
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struct list_head sadb_tx_index_list;
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struct list_head sadb_rx_index_list;
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spinlock_t sadb_lock; /* protects list */
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struct els_reject elsrej;
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};
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@ -5160,7 +5193,43 @@ enum nexus_wait_type {
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WAIT_LUN,
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};
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#define INVALID_EDIF_SA_INDEX 0xffff
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#define RX_DELETE_NO_EDIF_SA_INDEX 0xfffe
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#define QLA_SKIP_HANDLE QLA_TGT_SKIP_HANDLE
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/* edif hash element */
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struct edif_list_entry {
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uint16_t handle; /* nport_handle */
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uint32_t update_sa_index;
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uint32_t delete_sa_index;
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uint32_t count; /* counter for filtering sa_index */
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#define EDIF_ENTRY_FLAGS_CLEANUP 0x01 /* this index is being cleaned up */
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uint32_t flags; /* used by sadb cleanup code */
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fc_port_t *fcport; /* needed by rx delay timer function */
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struct timer_list timer; /* rx delay timer */
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struct list_head next;
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};
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#define EDIF_TX_INDX_BASE 512
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#define EDIF_RX_INDX_BASE 0
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#define EDIF_RX_DELETE_FILTER_COUNT 3 /* delay queuing rx delete until this many */
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/* entry in the sa_index free pool */
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struct sa_index_pair {
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uint16_t sa_index;
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uint32_t spi;
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};
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/* edif sa_index data structure */
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struct edif_sa_index_entry {
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struct sa_index_pair sa_pair[2];
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fc_port_t *fcport;
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uint16_t handle;
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struct list_head next;
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};
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/* Refer to SNIA SFF 8247 */
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struct sff_8247_a0 {
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u8 txid; /* transceiver id */
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File diff suppressed because it is too large
Load Diff
@ -9,6 +9,27 @@
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struct qla_scsi_host;
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#define EDIF_APP_ID 0x73730001
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#define EDIF_MAX_INDEX 2048
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struct edif_sa_ctl {
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struct list_head next;
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uint16_t del_index;
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uint16_t index;
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uint16_t slot;
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uint16_t flags;
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#define EDIF_SA_CTL_FLG_REPL BIT_0
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#define EDIF_SA_CTL_FLG_DEL BIT_1
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#define EDIF_SA_CTL_FLG_CLEANUP_DEL BIT_4
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// Invalidate Index bit and mirrors QLA_SA_UPDATE_FLAGS_DELETE
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unsigned long state;
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#define EDIF_SA_CTL_USED 1 /* Active Sa update */
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#define EDIF_SA_CTL_PEND 2 /* Waiting for slot */
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#define EDIF_SA_CTL_REPL 3 /* Active Replace and Delete */
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#define EDIF_SA_CTL_DEL 4 /* Delete Pending */
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struct fc_port *fcport;
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struct bsg_job *bsg_job;
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struct qla_sa_update_frame sa_frame;
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};
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enum enode_flags_t {
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ENODE_ACTIVE = 0x1,
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};
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@ -30,6 +51,46 @@ struct edif_dbell {
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struct completion dbell;
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};
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#define SA_UPDATE_IOCB_TYPE 0x71 /* Security Association Update IOCB entry */
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struct sa_update_28xx {
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uint8_t entry_type; /* Entry type. */
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uint8_t entry_count; /* Entry count. */
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uint8_t sys_define; /* System Defined. */
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uint8_t entry_status; /* Entry Status. */
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uint32_t handle; /* IOCB System handle. */
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union {
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__le16 nport_handle; /* in: N_PORT handle. */
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__le16 comp_sts; /* out: completion status */
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#define CS_PORT_EDIF_SUPP_NOT_RDY 0x64
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#define CS_PORT_EDIF_INV_REQ 0x66
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} u;
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uint8_t vp_index;
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uint8_t reserved_1;
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uint8_t port_id[3];
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uint8_t flags;
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#define SA_FLAG_INVALIDATE BIT_0
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#define SA_FLAG_TX BIT_1 // 1=tx, 0=rx
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uint8_t sa_key[32]; /* 256 bit key */
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__le32 salt;
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__le32 spi;
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uint8_t sa_control;
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#define SA_CNTL_ENC_FCSP (1 << 3)
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#define SA_CNTL_ENC_OPD (2 << 3)
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#define SA_CNTL_ENC_MSK (3 << 3) // mask bits 4,3
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#define SA_CNTL_AES_GMAC (1 << 2)
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#define SA_CNTL_KEY256 (2 << 0)
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#define SA_CNTL_KEY128 0
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uint8_t reserved_2;
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__le16 sa_index; // reserve: bit 11-15
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__le16 old_sa_info;
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__le16 new_sa_info;
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};
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#define NUM_ENTRIES 256
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#define MAX_PAYLOAD 1024
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#define PUR_GET 1
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@ -611,6 +611,7 @@ struct sts_entry_24xx {
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union {
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__le16 reserved_1;
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__le16 nvme_rsp_pyld_len;
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__le16 edif_sa_index; /* edif sa_index used for initiator read data */
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};
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__le16 state_flags; /* State flags. */
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@ -130,6 +130,13 @@ void qla24xx_free_purex_item(struct purex_item *item);
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extern bool qla24xx_risc_firmware_invalid(uint32_t *);
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void qla_init_iocb_limit(scsi_qla_host_t *);
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void qla_edif_sadb_release(struct qla_hw_data *ha);
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int qla_edif_sadb_build_free_pool(struct qla_hw_data *ha);
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void qla_edif_sadb_release_free_pool(struct qla_hw_data *ha);
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void qla_chk_edif_rx_sa_delete_pending(scsi_qla_host_t *vha,
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srb_t *sp, struct sts_entry_24xx *sts24);
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void qlt_chk_edif_rx_sa_delete_pending(scsi_qla_host_t *vha, fc_port_t *fcport,
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struct ctio7_from_24xx *ctio);
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int qla_edif_process_els(scsi_qla_host_t *vha, struct bsg_job *bsgjob);
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const char *sc_to_str(uint16_t cmd);
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@ -238,6 +245,8 @@ void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
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struct purex_item *pkt);
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void qla_pci_set_eeh_busy(struct scsi_qla_host *);
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void qla_schedule_eeh_work(struct scsi_qla_host *);
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struct edif_sa_ctl *qla_edif_find_sa_ctl_by_index(fc_port_t *fcport,
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int index, int dir);
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/*
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* Global Functions in qla_mid.c source file.
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@ -313,6 +322,8 @@ extern int qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *, srb_t *,
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struct dsd64 *, uint16_t, struct qla_tgt_cmd *);
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extern int qla24xx_get_one_block_sg(uint32_t, struct qla2_sgx *, uint32_t *);
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extern int qla24xx_configure_prot_mode(srb_t *, uint16_t *);
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extern int qla24xx_issue_sa_replace_iocb(scsi_qla_host_t *vha,
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struct qla_work_evt *e);
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/*
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* Global Function Prototypes in qla_mbx.c source file.
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@ -885,6 +896,9 @@ extern int qla2x00_issue_iocb_timeout(scsi_qla_host_t *, void *,
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dma_addr_t, size_t, uint32_t);
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extern int qla2x00_get_idma_speed(scsi_qla_host_t *, uint16_t,
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uint16_t *, uint16_t *);
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extern int qla24xx_sadb_update(struct bsg_job *bsg_job);
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extern int qla_post_sa_replace_work(struct scsi_qla_host *vha,
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fc_port_t *fcport, uint16_t nport_handle, struct edif_sa_ctl *sa_ctl);
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/* 83xx related functions */
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void qla83xx_fw_dump(scsi_qla_host_t *vha);
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@ -957,12 +971,19 @@ extern void qla_nvme_abort_process_comp_status
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/* nvme.c */
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void qla_nvme_unregister_remote_port(struct fc_port *fcport);
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/* qla_edif.c */
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fc_port_t *qla2x00_find_fcport_by_pid(scsi_qla_host_t *vha, port_id_t *id);
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void qla_edb_stop(scsi_qla_host_t *vha);
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int32_t qla_edif_app_mgmt(struct bsg_job *bsg_job);
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void qla_enode_init(scsi_qla_host_t *vha);
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void qla_enode_stop(scsi_qla_host_t *vha);
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void qla_edif_flush_sa_ctl_lists(fc_port_t *fcport);
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void qla24xx_sa_update_iocb(srb_t *sp, struct sa_update_28xx *sa_update_iocb);
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void qla24xx_sa_replace_iocb(srb_t *sp, struct sa_update_28xx *sa_update_iocb);
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void qla24xx_auth_els(scsi_qla_host_t *vha, void **pkt, struct rsp_que **rsp);
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void qla28xx_sa_update_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
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struct sa_update_28xx *pkt);
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void qla_handle_els_plogi_done(scsi_qla_host_t *vha, struct event_arg *ea);
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#define QLA2XX_HW_ERROR BIT_0
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@ -5071,6 +5071,16 @@ qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
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INIT_LIST_HEAD(&fcport->sess_cmd_list);
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spin_lock_init(&fcport->sess_cmd_lock);
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spin_lock_init(&fcport->edif.sa_list_lock);
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INIT_LIST_HEAD(&fcport->edif.tx_sa_list);
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INIT_LIST_HEAD(&fcport->edif.rx_sa_list);
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if (vha->e_dbell.db_flags == EDB_ACTIVE)
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fcport->edif.app_started = 1;
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spin_lock_init(&fcport->edif.indx_list_lock);
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INIT_LIST_HEAD(&fcport->edif.edif_indx_list);
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return fcport;
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}
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@ -3839,6 +3839,12 @@ qla2x00_start_sp(srb_t *sp)
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case SRB_PRLO_CMD:
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qla24xx_prlo_iocb(sp, pkt);
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break;
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case SRB_SA_UPDATE:
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qla24xx_sa_update_iocb(sp, pkt);
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break;
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case SRB_SA_REPLACE:
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qla24xx_sa_replace_iocb(sp, pkt);
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break;
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default:
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break;
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}
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@ -3191,6 +3191,8 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
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sp->qpair->cmd_completion_cnt++;
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/* Fast path completion. */
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qla_chk_edif_rx_sa_delete_pending(vha, sp, sts24);
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if (comp_status == CS_COMPLETE && scsi_status == 0) {
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qla2x00_process_completed_request(vha, req, handle);
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@ -3585,6 +3587,7 @@ qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
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}
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break;
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case SA_UPDATE_IOCB_TYPE:
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case ABTS_RESP_24XX:
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case CTIO_TYPE7:
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case CTIO_CRC2:
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@ -3883,6 +3886,11 @@ process_err:
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purex_entry->els_frame_payload[3]);
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}
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break;
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case SA_UPDATE_IOCB_TYPE:
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qla28xx_sa_update_iocb_entry(vha, rsp->req,
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(struct sa_update_28xx *)pkt);
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break;
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default:
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/* Type Not Supported. */
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ql_dbg(ql_dbg_async, vha, 0x5042,
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@ -2835,6 +2835,17 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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spin_lock_init(&ha->tgt.sess_lock);
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spin_lock_init(&ha->tgt.atio_lock);
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spin_lock_init(&ha->sadb_lock);
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INIT_LIST_HEAD(&ha->sadb_tx_index_list);
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INIT_LIST_HEAD(&ha->sadb_rx_index_list);
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spin_lock_init(&ha->sadb_fp_lock);
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if (qla_edif_sadb_build_free_pool(ha)) {
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kfree(ha);
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goto disable_device;
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}
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atomic_set(&ha->nvme_active_aen_cnt, 0);
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/* Clear our data area */
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@ -3868,6 +3879,9 @@ qla2x00_free_device(scsi_qla_host_t *vha)
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qla82xx_md_free(vha);
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qla_edif_sadb_release_free_pool(ha);
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qla_edif_sadb_release(ha);
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qla2x00_free_queues(ha);
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}
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@ -5375,6 +5389,9 @@ qla2x00_do_work(struct scsi_qla_host *vha)
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qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
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e->u.fcport.fcport, false);
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break;
|
||||
case QLA_EVT_SA_REPLACE:
|
||||
qla24xx_issue_sa_replace_iocb(vha, e);
|
||||
break;
|
||||
}
|
||||
|
||||
if (rc == EAGAIN) {
|
||||
|
@ -446,7 +446,7 @@ struct ctio7_from_24xx {
|
||||
uint8_t vp_index;
|
||||
uint8_t reserved1[5];
|
||||
__le32 exchange_address;
|
||||
__le16 reserved2;
|
||||
__le16 edif_sa_index;
|
||||
__le16 flags;
|
||||
__le32 residual;
|
||||
__le16 ox_id;
|
||||
|
Loading…
Reference in New Issue
Block a user