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ARM: S3C64XX: Add I2S clkdev support
I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Acked-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Padmavathi Venna
Kukjin Kim
parent
74779e2226
commit
db7af96ee9
@ -149,25 +149,6 @@ static struct clk init_clocks_off[] = {
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C6410_CLKCON_PCLK_I2C1,
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}, {
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.name = "iis",
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.devname = "samsung-i2s.0",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C_CLKCON_PCLK_IIS0,
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}, {
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.name = "iis",
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.devname = "samsung-i2s.1",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C_CLKCON_PCLK_IIS1,
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}, {
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#ifdef CONFIG_CPU_S3C6410
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.name = "iis",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C6410_CLKCON_PCLK_IIS2,
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}, {
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#endif
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.name = "keypad",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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@ -337,6 +318,32 @@ static struct clk clk_48m_spi1 = {
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.ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
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};
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static struct clk clk_i2s0 = {
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.name = "iis",
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.devname = "samsung-i2s.0",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C_CLKCON_PCLK_IIS0,
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};
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static struct clk clk_i2s1 = {
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.name = "iis",
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.devname = "samsung-i2s.1",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C_CLKCON_PCLK_IIS1,
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};
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#ifdef CONFIG_CPU_S3C6410
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static struct clk clk_i2s2 = {
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.name = "iis",
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.devname = "samsung-i2s.2",
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C6410_CLKCON_PCLK_IIS2,
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};
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#endif
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static struct clk init_clocks[] = {
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{
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.name = "lcd",
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@ -660,6 +667,7 @@ static struct clksrc_sources clkset_audio1 = {
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.nr_sources = ARRAY_SIZE(clkset_audio1_list),
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};
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#ifdef CONFIG_CPU_S3C6410
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static struct clk *clkset_audio2_list[] = {
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[0] = &clk_mout_epll.clk,
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[1] = &clk_dout_mpll,
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@ -672,6 +680,7 @@ static struct clksrc_sources clkset_audio2 = {
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.sources = clkset_audio2_list,
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.nr_sources = ARRAY_SIZE(clkset_audio2_list),
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};
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#endif
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static struct clksrc_clk clksrcs[] = {
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{
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@ -683,36 +692,6 @@ static struct clksrc_clk clksrcs[] = {
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.reg_src = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2 },
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.reg_div = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4 },
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.sources = &clkset_uhost,
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}, {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.0",
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.ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
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.enable = s3c64xx_sclk_ctrl,
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},
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.reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 },
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.reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 },
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.sources = &clkset_audio0,
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}, {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.1",
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.ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
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.enable = s3c64xx_sclk_ctrl,
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},
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.reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 },
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.reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 },
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.sources = &clkset_audio1,
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}, {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.2",
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.ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2,
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.enable = s3c64xx_sclk_ctrl,
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},
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.reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 },
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.reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 },
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.sources = &clkset_audio2,
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}, {
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.clk = {
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.name = "irda-bus",
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@ -805,6 +784,43 @@ static struct clksrc_clk clk_sclk_spi1 = {
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.sources = &clkset_spi_mmc,
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};
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static struct clksrc_clk clk_audio_bus0 = {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.0",
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.ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
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.enable = s3c64xx_sclk_ctrl,
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},
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.reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 },
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.reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 },
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.sources = &clkset_audio0,
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};
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static struct clksrc_clk clk_audio_bus1 = {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.1",
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.ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
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.enable = s3c64xx_sclk_ctrl,
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},
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.reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 },
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.reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 },
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.sources = &clkset_audio1,
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};
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#ifdef CONFIG_CPU_S3C6410
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static struct clksrc_clk clk_audio_bus2 = {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.2",
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.ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2,
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.enable = s3c64xx_sclk_ctrl,
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},
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.reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 },
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.reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 },
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.sources = &clkset_audio2,
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};
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#endif
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/* Clock initialisation code */
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static struct clksrc_clk *init_parents[] = {
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@ -820,6 +836,8 @@ static struct clksrc_clk *clksrc_cdev[] = {
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&clk_sclk_mmc2,
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&clk_sclk_spi0,
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&clk_sclk_spi1,
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&clk_audio_bus0,
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&clk_audio_bus1,
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};
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static struct clk *clk_cdev[] = {
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@ -828,6 +846,8 @@ static struct clk *clk_cdev[] = {
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&clk_hsmmc2,
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&clk_48m_spi0,
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&clk_48m_spi1,
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&clk_i2s0,
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&clk_i2s1,
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};
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static struct clk_lookup s3c64xx_clk_lookup[] = {
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@ -844,6 +864,14 @@ static struct clk_lookup s3c64xx_clk_lookup[] = {
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CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0),
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CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
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CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1),
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CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
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CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus0.clk),
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CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
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CLKDEV_INIT("samsung-i2s.1", "i2s_opclk1", &clk_audio_bus1.clk),
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#ifdef CONFIG_CPU_S3C6410
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CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
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CLKDEV_INIT("samsung-i2s.2", "i2s_opclk1", &clk_audio_bus2.clk),
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#endif
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};
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#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
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@ -23,11 +23,6 @@
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#include <linux/platform_data/asoc-s3c.h>
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#include <plat/gpio-cfg.h>
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static const char *rclksrc[] = {
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[0] = "iis",
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[1] = "audio-bus",
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};
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static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev)
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{
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unsigned int base;
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@ -64,11 +59,6 @@ static struct resource s3c64xx_iis0_resource[] = {
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static struct s3c_audio_pdata i2sv3_pdata = {
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.cfg_gpio = s3c64xx_i2s_cfg_gpio,
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.type = {
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.i2s = {
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.src_clk = rclksrc,
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},
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},
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};
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struct platform_device s3c64xx_device_iis0 = {
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@ -110,7 +100,6 @@ static struct s3c_audio_pdata i2sv4_pdata = {
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.type = {
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.i2s = {
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.quirks = QUIRK_PRI_6CHAN,
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.src_clk = rclksrc,
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},
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},
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};
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