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[Blackfin] serial driver: Add flow control support to bf54x
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@ -699,14 +699,14 @@ config BFIN_UART1_CTSRTS
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config UART1_CTS_PIN
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int "UART1 CTS pin"
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depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
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depends on BFIN_UART1_CTSRTS && !BF54x
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default -1
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help
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Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
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config UART1_RTS_PIN
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int "UART1 RTS pin"
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depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
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depends on BFIN_UART1_CTSRTS && !BF54x
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default -1
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help
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Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
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@ -579,7 +579,11 @@ static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
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if (uart->cts_pin < 0)
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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# ifdef BF54x
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if (UART_GET_MSR(uart) & CTS)
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# else
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if (gpio_get_value(uart->cts_pin))
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# endif
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return TIOCM_DSR | TIOCM_CAR;
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else
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#endif
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@ -594,9 +598,17 @@ static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
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return;
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if (mctrl & TIOCM_RTS)
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# ifdef BF54x
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UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
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# else
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gpio_set_value(uart->rts_pin, 0);
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# endif
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else
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# ifdef BF54x
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UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
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# else
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gpio_set_value(uart->rts_pin, 1);
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# endif
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#endif
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}
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@ -24,6 +24,8 @@
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#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
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#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
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#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
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#define UART_GET_MSR(uart) bfin_read16(((uart)->port.membase + OFFSET_MSR))
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#define UART_GET_MCR(uart) bfin_read16(((uart)->port.membase + OFFSET_MCR))
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#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
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#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
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@ -34,6 +36,7 @@
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#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
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#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
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#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
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#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
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# define CONFIG_SERIAL_BFIN_CTSRTS
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