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[media] ascot2e: Sony Ascot2e DVB-C/T/T2 tuner driver
Add DVB-T/T2/C frontend driver for Sony Ascot2e (CXD2861ER) chip. Signed-off-by: Kozlov Sergey <serjk@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Kozlov Sergey
Mauro Carvalho Chehab
parent
a5d32b3582
commit
dacf9ce80b
@ -6601,6 +6601,15 @@ S: Supported
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F: Documentation/devicetree/bindings/media/renesas,vsp1.txt
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F: drivers/media/platform/vsp1/
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MEDIA DRIVERS FOR ASCOT2E
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M: Sergey Kozlov <serjk@netup.ru>
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L: linux-media@vger.kernel.org
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W: http://linuxtv.org
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W: http://netup.tv/
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T: git git://linuxtv.org/media_tree.git
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S: Supported
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F: drivers/media/dvb-frontends/ascot2e*
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MEDIA DRIVERS FOR HORUS3A
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M: Sergey Kozlov <serjk@netup.ru>
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L: linux-media@vger.kernel.org
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@ -823,6 +823,13 @@ config DVB_HORUS3A
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help
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Say Y when you want to support this frontend.
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config DVB_ASCOT2E
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tristate "Sony Ascot2E tuner"
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depends on DVB_CORE && I2C
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default m if !MEDIA_SUBDRV_AUTOSELECT
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help
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Say Y when you want to support this frontend.
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comment "Tools to develop new frontends"
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config DVB_DUMMY_FE
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@ -119,3 +119,4 @@ obj-$(CONFIG_DVB_AF9033) += af9033.o
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obj-$(CONFIG_DVB_AS102_FE) += as102_fe.o
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obj-$(CONFIG_DVB_TC90522) += tc90522.o
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obj-$(CONFIG_DVB_HORUS3A) += horus3a.o
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obj-$(CONFIG_DVB_ASCOT2E) += ascot2e.o
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540
drivers/media/dvb-frontends/ascot2e.c
Normal file
540
drivers/media/dvb-frontends/ascot2e.c
Normal file
@ -0,0 +1,540 @@
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/*
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* ascot2e.c
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*
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* Sony Ascot3E DVB-T/T2/C/C2 tuner driver
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*
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* Copyright 2012 Sony Corporation
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* Copyright (C) 2014 NetUP Inc.
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* Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
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* Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/dvb/frontend.h>
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#include <linux/types.h>
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#include "ascot2e.h"
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#include "dvb_frontend.h"
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enum ascot2e_state {
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STATE_UNKNOWN,
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STATE_SLEEP,
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STATE_ACTIVE
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};
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struct ascot2e_priv {
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u32 frequency;
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u8 i2c_address;
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struct i2c_adapter *i2c;
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enum ascot2e_state state;
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void *set_tuner_data;
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int (*set_tuner)(void *, int);
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};
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enum ascot2e_tv_system_t {
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ASCOT2E_DTV_DVBT_5,
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ASCOT2E_DTV_DVBT_6,
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ASCOT2E_DTV_DVBT_7,
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ASCOT2E_DTV_DVBT_8,
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ASCOT2E_DTV_DVBT2_1_7,
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ASCOT2E_DTV_DVBT2_5,
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ASCOT2E_DTV_DVBT2_6,
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ASCOT2E_DTV_DVBT2_7,
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ASCOT2E_DTV_DVBT2_8,
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ASCOT2E_DTV_DVBC_6,
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ASCOT2E_DTV_DVBC_8,
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ASCOT2E_DTV_DVBC2_6,
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ASCOT2E_DTV_DVBC2_8,
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ASCOT2E_DTV_UNKNOWN
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};
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struct ascot2e_band_sett {
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u8 if_out_sel;
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u8 agc_sel;
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u8 mix_oll;
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u8 rf_gain;
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u8 if_bpf_gc;
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u8 fif_offset;
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u8 bw_offset;
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u8 bw;
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u8 rf_oldet;
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u8 if_bpf_f0;
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};
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#define ASCOT2E_AUTO 0xff
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#define ASCOT2E_OFFSET(ofs) ((u8)(ofs) & 0x1F)
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#define ASCOT2E_BW_6 0x00
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#define ASCOT2E_BW_7 0x01
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#define ASCOT2E_BW_8 0x02
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#define ASCOT2E_BW_1_7 0x03
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static struct ascot2e_band_sett ascot2e_sett[] = {
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_7, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-4), ASCOT2E_OFFSET(-2), ASCOT2E_BW_8, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-10), ASCOT2E_OFFSET(-16), ASCOT2E_BW_1_7, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_7, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
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ASCOT2E_OFFSET(-4), ASCOT2E_OFFSET(-2), ASCOT2E_BW_8, 0x0B, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x02, ASCOT2E_AUTO, 0x03,
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ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-8), ASCOT2E_BW_6, 0x09, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x02, ASCOT2E_AUTO, 0x03,
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ASCOT2E_OFFSET(-2), ASCOT2E_OFFSET(-1), ASCOT2E_BW_8, 0x09, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x01,
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ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_6, 0x09, 0x00 },
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{ ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x01,
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ASCOT2E_OFFSET(-2), ASCOT2E_OFFSET(2), ASCOT2E_BW_8, 0x09, 0x00 }
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};
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static void ascot2e_i2c_debug(struct ascot2e_priv *priv,
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u8 reg, u8 write, const u8 *data, u32 len)
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{
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dev_dbg(&priv->i2c->dev, "ascot2e: I2C %s reg 0x%02x size %d\n",
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(write == 0 ? "read" : "write"), reg, len);
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print_hex_dump_bytes("ascot2e: I2C data: ",
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DUMP_PREFIX_OFFSET, data, len);
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}
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static int ascot2e_write_regs(struct ascot2e_priv *priv,
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u8 reg, const u8 *data, u32 len)
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{
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int ret;
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u8 buf[len+1];
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struct i2c_msg msg[1] = {
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{
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.addr = priv->i2c_address,
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.flags = 0,
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.len = sizeof(buf),
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.buf = buf,
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}
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};
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ascot2e_i2c_debug(priv, reg, 1, data, len);
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buf[0] = reg;
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memcpy(&buf[1], data, len);
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret >= 0 && ret != 1)
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ret = -EREMOTEIO;
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if (ret < 0) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr failed=%d reg=%02x len=%d\n",
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KBUILD_MODNAME, ret, reg, len);
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return ret;
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}
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return 0;
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}
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static int ascot2e_write_reg(struct ascot2e_priv *priv, u8 reg, u8 val)
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{
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return ascot2e_write_regs(priv, reg, &val, 1);
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}
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static int ascot2e_read_regs(struct ascot2e_priv *priv,
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u8 reg, u8 *val, u32 len)
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{
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int ret;
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struct i2c_msg msg[2] = {
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{
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.addr = priv->i2c_address,
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.flags = 0,
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.len = 1,
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.buf = ®,
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}, {
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.addr = priv->i2c_address,
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.flags = I2C_M_RD,
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.len = len,
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.buf = val,
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}
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};
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ret = i2c_transfer(priv->i2c, &msg[0], 1);
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if (ret >= 0 && ret != 1)
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ret = -EREMOTEIO;
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if (ret < 0) {
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dev_warn(&priv->i2c->dev,
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"%s: I2C rw failed=%d addr=%02x reg=%02x\n",
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KBUILD_MODNAME, ret, priv->i2c_address, reg);
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return ret;
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}
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ret = i2c_transfer(priv->i2c, &msg[1], 1);
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if (ret >= 0 && ret != 1)
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ret = -EREMOTEIO;
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if (ret < 0) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c rd failed=%d addr=%02x reg=%02x\n",
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KBUILD_MODNAME, ret, priv->i2c_address, reg);
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return ret;
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}
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ascot2e_i2c_debug(priv, reg, 0, val, len);
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return 0;
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}
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static int ascot2e_read_reg(struct ascot2e_priv *priv, u8 reg, u8 *val)
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{
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return ascot2e_read_regs(priv, reg, val, 1);
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}
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static int ascot2e_set_reg_bits(struct ascot2e_priv *priv,
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u8 reg, u8 data, u8 mask)
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{
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int res;
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u8 rdata;
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if (mask != 0xff) {
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res = ascot2e_read_reg(priv, reg, &rdata);
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if (res != 0)
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return res;
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data = ((data & mask) | (rdata & (mask ^ 0xFF)));
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}
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return ascot2e_write_reg(priv, reg, data);
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}
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static int ascot2e_enter_power_save(struct ascot2e_priv *priv)
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{
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u8 data[2];
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dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
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if (priv->state == STATE_SLEEP)
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return 0;
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data[0] = 0x00;
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data[1] = 0x04;
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ascot2e_write_regs(priv, 0x14, data, 2);
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ascot2e_write_reg(priv, 0x50, 0x01);
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priv->state = STATE_SLEEP;
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return 0;
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}
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static int ascot2e_leave_power_save(struct ascot2e_priv *priv)
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{
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u8 data[2] = { 0xFB, 0x0F };
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dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
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if (priv->state == STATE_ACTIVE)
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return 0;
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ascot2e_write_regs(priv, 0x14, data, 2);
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ascot2e_write_reg(priv, 0x50, 0x00);
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priv->state = STATE_ACTIVE;
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return 0;
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}
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static int ascot2e_init(struct dvb_frontend *fe)
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{
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struct ascot2e_priv *priv = fe->tuner_priv;
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dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
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return ascot2e_leave_power_save(priv);
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}
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static int ascot2e_release(struct dvb_frontend *fe)
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{
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struct ascot2e_priv *priv = fe->tuner_priv;
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dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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return 0;
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}
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static int ascot2e_sleep(struct dvb_frontend *fe)
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{
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struct ascot2e_priv *priv = fe->tuner_priv;
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dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
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ascot2e_enter_power_save(priv);
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return 0;
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}
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static enum ascot2e_tv_system_t ascot2e_get_tv_system(struct dvb_frontend *fe)
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{
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enum ascot2e_tv_system_t system = ASCOT2E_DTV_UNKNOWN;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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struct ascot2e_priv *priv = fe->tuner_priv;
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if (p->delivery_system == SYS_DVBT) {
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if (p->bandwidth_hz <= 5000000)
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system = ASCOT2E_DTV_DVBT_5;
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else if (p->bandwidth_hz <= 6000000)
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system = ASCOT2E_DTV_DVBT_6;
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else if (p->bandwidth_hz <= 7000000)
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system = ASCOT2E_DTV_DVBT_7;
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else if (p->bandwidth_hz <= 8000000)
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system = ASCOT2E_DTV_DVBT_8;
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else {
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system = ASCOT2E_DTV_DVBT_8;
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p->bandwidth_hz = 8000000;
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}
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} else if (p->delivery_system == SYS_DVBT2) {
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if (p->bandwidth_hz <= 5000000)
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system = ASCOT2E_DTV_DVBT2_5;
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else if (p->bandwidth_hz <= 6000000)
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system = ASCOT2E_DTV_DVBT2_6;
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else if (p->bandwidth_hz <= 7000000)
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system = ASCOT2E_DTV_DVBT2_7;
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else if (p->bandwidth_hz <= 8000000)
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system = ASCOT2E_DTV_DVBT2_8;
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else {
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system = ASCOT2E_DTV_DVBT2_8;
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p->bandwidth_hz = 8000000;
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}
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} else if (p->delivery_system == SYS_DVBC_ANNEX_A) {
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if (p->bandwidth_hz <= 6000000)
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system = ASCOT2E_DTV_DVBC_6;
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else if (p->bandwidth_hz <= 8000000)
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system = ASCOT2E_DTV_DVBC_8;
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}
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dev_dbg(&priv->i2c->dev,
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"%s(): ASCOT2E DTV system %d (delsys %d, bandwidth %d)\n",
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__func__, (int)system, p->delivery_system, p->bandwidth_hz);
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return system;
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}
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static int ascot2e_set_params(struct dvb_frontend *fe)
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{
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u8 data[10];
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u32 frequency;
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enum ascot2e_tv_system_t tv_system;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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struct ascot2e_priv *priv = fe->tuner_priv;
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dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz\n",
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__func__, p->frequency / 1000);
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tv_system = ascot2e_get_tv_system(fe);
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if (tv_system == ASCOT2E_DTV_UNKNOWN) {
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dev_dbg(&priv->i2c->dev, "%s(): unknown DTV system\n",
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__func__);
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return -EINVAL;
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}
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if (priv->set_tuner)
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priv->set_tuner(priv->set_tuner_data, 1);
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frequency = roundup(p->frequency / 1000, 25);
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if (priv->state == STATE_SLEEP)
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ascot2e_leave_power_save(priv);
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/* IF_OUT_SEL / AGC_SEL setting */
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data[0] = 0x00;
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if (ascot2e_sett[tv_system].agc_sel != ASCOT2E_AUTO) {
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/* AGC pin setting from parameter table */
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data[0] |= (u8)(
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(ascot2e_sett[tv_system].agc_sel & 0x03) << 3);
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}
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if (ascot2e_sett[tv_system].if_out_sel != ASCOT2E_AUTO) {
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/* IFOUT pin setting from parameter table */
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data[0] |= (u8)(
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(ascot2e_sett[tv_system].if_out_sel & 0x01) << 2);
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}
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/* Set bit[4:2] only */
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ascot2e_set_reg_bits(priv, 0x05, data[0], 0x1c);
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/* 0x06 - 0x0F */
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/* REF_R setting (0x06) */
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if (tv_system == ASCOT2E_DTV_DVBC_6 ||
|
||||
tv_system == ASCOT2E_DTV_DVBC_8) {
|
||||
/* xtal, xtal*2 */
|
||||
data[0] = (frequency > 500000) ? 16 : 32;
|
||||
} else {
|
||||
/* xtal/8, xtal/4 */
|
||||
data[0] = (frequency > 500000) ? 2 : 4;
|
||||
}
|
||||
/* XOSC_SEL=100uA */
|
||||
data[1] = 0x04;
|
||||
/* KBW setting (0x08), KC0 setting (0x09), KC1 setting (0x0A) */
|
||||
if (tv_system == ASCOT2E_DTV_DVBC_6 ||
|
||||
tv_system == ASCOT2E_DTV_DVBC_8) {
|
||||
data[2] = 18;
|
||||
data[3] = 120;
|
||||
data[4] = 20;
|
||||
} else {
|
||||
data[2] = 48;
|
||||
data[3] = 10;
|
||||
data[4] = 30;
|
||||
}
|
||||
/* ORDER/R2_RANGE/R2_BANK/C2_BANK setting (0x0B) */
|
||||
if (tv_system == ASCOT2E_DTV_DVBC_6 ||
|
||||
tv_system == ASCOT2E_DTV_DVBC_8)
|
||||
data[5] = (frequency > 500000) ? 0x08 : 0x0c;
|
||||
else
|
||||
data[5] = (frequency > 500000) ? 0x30 : 0x38;
|
||||
/* Set MIX_OLL (0x0C) value from parameter table */
|
||||
data[6] = ascot2e_sett[tv_system].mix_oll;
|
||||
/* Set RF_GAIN (0x0D) setting from parameter table */
|
||||
if (ascot2e_sett[tv_system].rf_gain == ASCOT2E_AUTO) {
|
||||
/* RF_GAIN auto control enable */
|
||||
ascot2e_write_reg(priv, 0x4E, 0x01);
|
||||
/* RF_GAIN Default value */
|
||||
data[7] = 0x00;
|
||||
} else {
|
||||
/* RF_GAIN auto control disable */
|
||||
ascot2e_write_reg(priv, 0x4E, 0x00);
|
||||
data[7] = ascot2e_sett[tv_system].rf_gain;
|
||||
}
|
||||
/* Set IF_BPF_GC/FIF_OFFSET (0x0E) value from parameter table */
|
||||
data[8] = (u8)((ascot2e_sett[tv_system].fif_offset << 3) |
|
||||
(ascot2e_sett[tv_system].if_bpf_gc & 0x07));
|
||||
/* Set BW_OFFSET (0x0F) value from parameter table */
|
||||
data[9] = ascot2e_sett[tv_system].bw_offset;
|
||||
ascot2e_write_regs(priv, 0x06, data, 10);
|
||||
/*
|
||||
* 0x45 - 0x47
|
||||
* LNA optimization setting
|
||||
* RF_LNA_DIST1-5, RF_LNA_CM
|
||||
*/
|
||||
if (tv_system == ASCOT2E_DTV_DVBC_6 ||
|
||||
tv_system == ASCOT2E_DTV_DVBC_8) {
|
||||
data[0] = 0x0F;
|
||||
data[1] = 0x00;
|
||||
data[2] = 0x01;
|
||||
} else {
|
||||
data[0] = 0x0F;
|
||||
data[1] = 0x00;
|
||||
data[2] = 0x03;
|
||||
}
|
||||
ascot2e_write_regs(priv, 0x45, data, 3);
|
||||
/* 0x49 - 0x4A
|
||||
Set RF_OLDET_ENX/RF_OLDET_OLL value from parameter table */
|
||||
data[0] = ascot2e_sett[tv_system].rf_oldet;
|
||||
/* Set IF_BPF_F0 value from parameter table */
|
||||
data[1] = ascot2e_sett[tv_system].if_bpf_f0;
|
||||
ascot2e_write_regs(priv, 0x49, data, 2);
|
||||
/*
|
||||
* Tune now
|
||||
* RFAGC fast mode / RFAGC auto control enable
|
||||
* (set bit[7], bit[5:4] only)
|
||||
* vco_cal = 1, set MIX_OL_CPU_EN
|
||||
*/
|
||||
ascot2e_set_reg_bits(priv, 0x0c, 0x90, 0xb0);
|
||||
/* Logic wake up, CPU wake up */
|
||||
data[0] = 0xc4;
|
||||
data[1] = 0x40;
|
||||
ascot2e_write_regs(priv, 0x03, data, 2);
|
||||
/* 0x10 - 0x14 */
|
||||
data[0] = (u8)(frequency & 0xFF); /* 0x10: FRF_L */
|
||||
data[1] = (u8)((frequency >> 8) & 0xFF); /* 0x11: FRF_M */
|
||||
data[2] = (u8)((frequency >> 16) & 0x0F); /* 0x12: FRF_H (bit[3:0]) */
|
||||
/* 0x12: BW (bit[5:4]) */
|
||||
data[2] |= (u8)(ascot2e_sett[tv_system].bw << 4);
|
||||
data[3] = 0xFF; /* 0x13: VCO calibration enable */
|
||||
data[4] = 0xFF; /* 0x14: Analog block enable */
|
||||
/* Tune (Burst write) */
|
||||
ascot2e_write_regs(priv, 0x10, data, 5);
|
||||
msleep(50);
|
||||
/* CPU deep sleep */
|
||||
ascot2e_write_reg(priv, 0x04, 0x00);
|
||||
/* Logic sleep */
|
||||
ascot2e_write_reg(priv, 0x03, 0xC0);
|
||||
/* RFAGC normal mode (set bit[5:4] only) */
|
||||
ascot2e_set_reg_bits(priv, 0x0C, 0x00, 0x30);
|
||||
priv->frequency = frequency;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ascot2e_get_frequency(struct dvb_frontend *fe, u32 *frequency)
|
||||
{
|
||||
struct ascot2e_priv *priv = fe->tuner_priv;
|
||||
|
||||
*frequency = priv->frequency * 1000;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct dvb_tuner_ops ascot2e_tuner_ops = {
|
||||
.info = {
|
||||
.name = "Sony ASCOT2E",
|
||||
.frequency_min = 1000000,
|
||||
.frequency_max = 1200000000,
|
||||
.frequency_step = 25000,
|
||||
},
|
||||
.init = ascot2e_init,
|
||||
.release = ascot2e_release,
|
||||
.sleep = ascot2e_sleep,
|
||||
.set_params = ascot2e_set_params,
|
||||
.get_frequency = ascot2e_get_frequency,
|
||||
};
|
||||
|
||||
struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
|
||||
const struct ascot2e_config *config,
|
||||
struct i2c_adapter *i2c)
|
||||
{
|
||||
u8 data[4];
|
||||
struct ascot2e_priv *priv = NULL;
|
||||
|
||||
priv = kzalloc(sizeof(struct ascot2e_priv), GFP_KERNEL);
|
||||
if (priv == NULL)
|
||||
return NULL;
|
||||
priv->i2c_address = (config->i2c_address >> 1);
|
||||
priv->i2c = i2c;
|
||||
priv->set_tuner_data = config->set_tuner_priv;
|
||||
priv->set_tuner = config->set_tuner_callback;
|
||||
|
||||
if (fe->ops.i2c_gate_ctrl)
|
||||
fe->ops.i2c_gate_ctrl(fe, 1);
|
||||
|
||||
/* 16 MHz xTal frequency */
|
||||
data[0] = 16;
|
||||
/* VCO current setting */
|
||||
data[1] = 0x06;
|
||||
/* Logic wake up, CPU boot */
|
||||
data[2] = 0xC4;
|
||||
data[3] = 0x40;
|
||||
ascot2e_write_regs(priv, 0x01, data, 4);
|
||||
/* RFVGA optimization setting (RF_DIST0 - RF_DIST2) */
|
||||
data[0] = 0x10;
|
||||
data[1] = 0x3F;
|
||||
data[2] = 0x25;
|
||||
ascot2e_write_regs(priv, 0x22, data, 3);
|
||||
/* PLL mode setting */
|
||||
ascot2e_write_reg(priv, 0x28, 0x1e);
|
||||
/* RSSI setting */
|
||||
ascot2e_write_reg(priv, 0x59, 0x04);
|
||||
/* TODO check CPU HW error state here */
|
||||
msleep(80);
|
||||
/* Xtal oscillator current control setting */
|
||||
ascot2e_write_reg(priv, 0x4c, 0x01);
|
||||
/* XOSC_SEL=100uA */
|
||||
ascot2e_write_reg(priv, 0x07, 0x04);
|
||||
/* CPU deep sleep */
|
||||
ascot2e_write_reg(priv, 0x04, 0x00);
|
||||
/* Logic sleep */
|
||||
ascot2e_write_reg(priv, 0x03, 0xc0);
|
||||
/* Power save setting */
|
||||
data[0] = 0x00;
|
||||
data[1] = 0x04;
|
||||
ascot2e_write_regs(priv, 0x14, data, 2);
|
||||
ascot2e_write_reg(priv, 0x50, 0x01);
|
||||
priv->state = STATE_SLEEP;
|
||||
|
||||
if (fe->ops.i2c_gate_ctrl)
|
||||
fe->ops.i2c_gate_ctrl(fe, 0);
|
||||
|
||||
memcpy(&fe->ops.tuner_ops, &ascot2e_tuner_ops,
|
||||
sizeof(struct dvb_tuner_ops));
|
||||
fe->tuner_priv = priv;
|
||||
dev_info(&priv->i2c->dev,
|
||||
"Sony ASCOT2E attached on addr=%x at I2C adapter %p\n",
|
||||
priv->i2c_address, priv->i2c);
|
||||
return fe;
|
||||
}
|
||||
EXPORT_SYMBOL(ascot2e_attach);
|
||||
|
||||
MODULE_DESCRIPTION("Sony ASCOT2E terr/cab tuner driver");
|
||||
MODULE_AUTHOR("info@netup.ru");
|
||||
MODULE_LICENSE("GPL");
|
||||
58
drivers/media/dvb-frontends/ascot2e.h
Normal file
58
drivers/media/dvb-frontends/ascot2e.h
Normal file
@ -0,0 +1,58 @@
|
||||
/*
|
||||
* ascot2e.h
|
||||
*
|
||||
* Sony Ascot3E DVB-T/T2/C/C2 tuner driver
|
||||
*
|
||||
* Copyright 2012 Sony Corporation
|
||||
* Copyright (C) 2014 NetUP Inc.
|
||||
* Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
|
||||
* Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __DVB_ASCOT2E_H__
|
||||
#define __DVB_ASCOT2E_H__
|
||||
|
||||
#include <linux/kconfig.h>
|
||||
#include <linux/dvb/frontend.h>
|
||||
#include <linux/i2c.h>
|
||||
|
||||
/**
|
||||
* struct ascot2e_config - the configuration of Ascot2E tuner driver
|
||||
* @i2c_address: I2C address of the tuner
|
||||
* @xtal_freq_mhz: Oscillator frequency, MHz
|
||||
* @set_tuner_priv: Callback function private context
|
||||
* @set_tuner_callback: Callback function that notifies the parent driver
|
||||
* which tuner is active now
|
||||
*/
|
||||
struct ascot2e_config {
|
||||
u8 i2c_address;
|
||||
u8 xtal_freq_mhz;
|
||||
void *set_tuner_priv;
|
||||
int (*set_tuner_callback)(void *, int);
|
||||
};
|
||||
|
||||
#if IS_REACHABLE(CONFIG_DVB_ASCOT2E)
|
||||
extern struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
|
||||
const struct ascot2e_config *config,
|
||||
struct i2c_adapter *i2c);
|
||||
#else
|
||||
static inline struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
|
||||
const struct ascot2e_config *config,
|
||||
struct i2c_adapter *i2c)
|
||||
{
|
||||
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
||||
return NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user