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arm64: dts: ti: k3-am65: Move SerDes mux nodes under the control node
These SerDes lane select muxes use bits from the same register as the SerDes clock select mux. Make the lane select mux a child of the SerDes control node. This removes one more requirement on scm-conf being a syscon node which will later be converted to fix a couple DTS check warnings. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185627.29852-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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@ -66,7 +66,7 @@
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assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
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ti,serdes-clk = <&serdes0_clk>;
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#clock-cells = <1>;
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mux-controls = <&serdes_mux 0>;
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mux-controls = <&serdes0_mux 0>;
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};
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serdes1: serdes@910000 {
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@ -81,7 +81,7 @@
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assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
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ti,serdes-clk = <&serdes1_clk>;
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#clock-cells = <1>;
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mux-controls = <&serdes_mux 1>;
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mux-controls = <&serdes1_mux 0>;
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};
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main_uart0: serial@2800000 {
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@ -484,18 +484,23 @@
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serdes0_clk: clock@4080 {
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compatible = "ti,am654-serdes-ctrl", "syscon";
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reg = <0x4080 0x4>;
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serdes0_mux: mux-controller {
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compatible = "mmio-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x0 0x3>; /* lane select */
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};
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};
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serdes1_clk: clock@4090 {
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compatible = "ti,am654-serdes-ctrl", "syscon";
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reg = <0x4090 0x4>;
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};
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serdes_mux: mux-controller {
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compatible = "mmio-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
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<0x4090 0x3>; /* SERDES1 lane select */
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serdes1_mux: mux-controller {
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compatible = "mmio-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x0 0x3>; /* lane select */
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};
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};
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dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
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