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KVM: Flush remote tlbs when reducing shadow pte permissions
When a vcpu causes a shadow tlb entry to have reduced permissions, it must also clear the tlb on remote vcpus. We do that by: - setting a bit on the vcpu that requests a tlb flush before the next entry - if the vcpu is currently executing, we send an ipi to make sure it exits before we continue Signed-off-by: Avi Kivity <avi@qumranet.com>
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@ -83,6 +83,11 @@
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#define KVM_PIO_PAGE_OFFSET 1
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/*
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* vcpu->requests bit members
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*/
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#define KVM_TLB_FLUSH 0
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/*
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* Address types:
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*
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@ -272,6 +277,8 @@ struct kvm_vcpu {
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u64 host_tsc;
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struct kvm_run *run;
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int interrupt_window_open;
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int guest_mode;
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unsigned long requests;
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unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
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#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
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unsigned long irq_pending[NR_IRQ_WORDS];
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@ -530,6 +537,7 @@ void save_msrs(struct vmx_msr_entry *e, int n);
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void kvm_resched(struct kvm_vcpu *vcpu);
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void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
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void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);
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void kvm_flush_remote_tlbs(struct kvm *kvm);
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int kvm_read_guest(struct kvm_vcpu *vcpu,
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gva_t addr,
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@ -41,6 +41,8 @@
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#include <linux/fs.h>
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#include <linux/mount.h>
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#include <linux/sched.h>
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#include <linux/cpumask.h>
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#include <linux/smp.h>
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#include "x86_emulate.h"
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#include "segment_descriptor.h"
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@ -309,6 +311,48 @@ static void vcpu_put(struct kvm_vcpu *vcpu)
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mutex_unlock(&vcpu->mutex);
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}
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static void ack_flush(void *_completed)
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{
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atomic_t *completed = _completed;
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atomic_inc(completed);
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}
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void kvm_flush_remote_tlbs(struct kvm *kvm)
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{
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int i, cpu, needed;
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cpumask_t cpus;
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struct kvm_vcpu *vcpu;
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atomic_t completed;
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atomic_set(&completed, 0);
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cpus_clear(cpus);
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needed = 0;
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for (i = 0; i < kvm->nvcpus; ++i) {
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vcpu = &kvm->vcpus[i];
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if (test_and_set_bit(KVM_TLB_FLUSH, &vcpu->requests))
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continue;
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cpu = vcpu->cpu;
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if (cpu != -1 && cpu != raw_smp_processor_id())
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if (!cpu_isset(cpu, cpus)) {
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cpu_set(cpu, cpus);
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++needed;
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}
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}
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/*
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* We really want smp_call_function_mask() here. But that's not
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* available, so ipi all cpus in parallel and wait for them
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* to complete.
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*/
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for (cpu = first_cpu(cpus); cpu != NR_CPUS; cpu = next_cpu(cpu, cpus))
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smp_call_function_single(cpu, ack_flush, &completed, 1, 0);
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while (atomic_read(&completed) != needed) {
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cpu_relax();
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barrier();
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}
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}
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static struct kvm *kvm_create_vm(void)
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{
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struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
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@ -441,7 +441,7 @@ static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
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BUG_ON(!(*spte & PT_WRITABLE_MASK));
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rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
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rmap_remove(vcpu, spte);
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kvm_arch_ops->tlb_flush(vcpu);
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kvm_flush_remote_tlbs(vcpu->kvm);
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set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
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}
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}
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@ -656,7 +656,7 @@ static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
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rmap_remove(vcpu, &pt[i]);
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pt[i] = 0;
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}
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kvm_arch_ops->tlb_flush(vcpu);
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kvm_flush_remote_tlbs(vcpu->kvm);
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return;
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}
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@ -669,6 +669,7 @@ static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
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ent &= PT64_BASE_ADDR_MASK;
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mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
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}
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kvm_flush_remote_tlbs(vcpu->kvm);
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}
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static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
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@ -1093,6 +1094,7 @@ static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
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}
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}
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*spte = 0;
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kvm_flush_remote_tlbs(vcpu->kvm);
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}
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static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
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@ -1308,7 +1310,7 @@ void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
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}
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mmu_free_memory_caches(vcpu);
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kvm_arch_ops->tlb_flush(vcpu);
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kvm_flush_remote_tlbs(vcpu->kvm);
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init_kvm_mmu(vcpu);
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}
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@ -1470,6 +1470,11 @@ static void load_db_regs(unsigned long *db_regs)
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asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
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}
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static void svm_flush_tlb(struct kvm_vcpu *vcpu)
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{
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force_new_asid(vcpu);
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}
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static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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{
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u16 fs_selector;
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@ -1487,6 +1492,11 @@ again:
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clgi();
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vcpu->guest_mode = 1;
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if (vcpu->requests)
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if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
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svm_flush_tlb(vcpu);
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pre_svm_run(vcpu);
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save_host_msrs(vcpu);
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@ -1618,6 +1628,8 @@ again:
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#endif
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: "cc", "memory" );
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vcpu->guest_mode = 0;
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if (vcpu->fpu_active) {
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fx_save(vcpu->guest_fx_image);
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fx_restore(vcpu->host_fx_image);
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@ -1682,11 +1694,6 @@ again:
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return r;
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}
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static void svm_flush_tlb(struct kvm_vcpu *vcpu)
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{
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force_new_asid(vcpu);
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}
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static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
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{
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vcpu->svm->vmcb->save.cr3 = root;
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@ -1972,6 +1972,11 @@ static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
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(vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
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}
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static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
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{
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vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
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}
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static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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{
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u8 fail;
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@ -1997,9 +2002,15 @@ again:
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*/
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vmcs_writel(HOST_CR0, read_cr0());
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local_irq_disable();
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vcpu->guest_mode = 1;
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if (vcpu->requests)
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if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
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vmx_flush_tlb(vcpu);
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asm (
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/* Store host registers */
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"pushf \n\t"
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#ifdef CONFIG_X86_64
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"push %%rax; push %%rbx; push %%rdx;"
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"push %%rsi; push %%rdi; push %%rbp;"
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@ -2091,7 +2102,6 @@ again:
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"pop %%ecx; popa \n\t"
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#endif
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"setbe %0 \n\t"
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"popf \n\t"
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: "=q" (fail)
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: "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
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"c"(vcpu),
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@ -2115,6 +2125,9 @@ again:
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[cr2]"i"(offsetof(struct kvm_vcpu, cr2))
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: "cc", "memory" );
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vcpu->guest_mode = 0;
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local_irq_enable();
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++vcpu->stat.exits;
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vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
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@ -2167,11 +2180,6 @@ out:
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return r;
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}
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static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
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{
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vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
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}
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static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
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unsigned long addr,
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u32 err_code)
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