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arm64: dts: r8a7795: Add SDHI support to dtsi
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [wsa: squashed some fixes and added mmc-caps] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -985,5 +985,43 @@
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#dma-cells = <1>;
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dma-channels = <2>;
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};
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a7795";
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reg = <0 0xee100000 0 0x2000>;
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interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 314>;
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power-domains = <&cpg>;
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status = "disabled";
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};
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sdhi1: sd@ee120000 {
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compatible = "renesas,sdhi-r8a7795";
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reg = <0 0xee120000 0 0x2000>;
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 313>;
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power-domains = <&cpg>;
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status = "disabled";
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};
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sdhi2: sd@ee140000 {
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compatible = "renesas,sdhi-r8a7795";
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reg = <0 0xee140000 0 0x2000>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 312>;
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power-domains = <&cpg>;
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cap-mmc-highspeed;
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status = "disabled";
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};
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sdhi3: sd@ee160000 {
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compatible = "renesas,sdhi-r8a7795";
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reg = <0 0xee160000 0 0x2000>;
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interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 311>;
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power-domains = <&cpg>;
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cap-mmc-highspeed;
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status = "disabled";
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};
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};
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};
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