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drm/panel: nt36672e: Break some CMDS into helper functions

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Break select page cmds and reload cmds into helper functions.

Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20240710084715.1119935-4-yangcong5@huaqin.corp-partner.google.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240710084715.1119935-4-yangcong5@huaqin.corp-partner.google.com
This commit is contained in:
Cong Yang 2024-07-10 16:47:14 +08:00 committed by Neil Armstrong
parent 3c8d2d5da3
commit d969b31afa
1 changed files with 44 additions and 25 deletions
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69
drivers/gpu/drm/panel/panel-novatek-nt36672e.c
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@ -44,6 +44,16 @@ struct nt36672e_panel {
const struct panel_desc *desc;
};
#define NT36672E_DCS_SWITCH_PAGE 0xff
#define nt36672e_switch_page(ctx, page) \
mipi_dsi_dcs_write_seq_multi(ctx, NT36672E_DCS_SWITCH_PAGE, (page))
static void nt36672e_enable_reload_cmds(struct mipi_dsi_multi_context *ctx)
{
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
}
static inline struct nt36672e_panel *to_nt36672e_panel(struct drm_panel *panel)
{
return container_of(panel, struct nt36672e_panel, panel);
@ -51,16 +61,16 @@ static inline struct nt36672e_panel *to_nt36672e_panel(struct drm_panel *panel)
static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
{
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x10);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x10);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0xaa, 0x02,
0x0e, 0x00, 0x2b, 0x00, 0x07, 0x0d, 0xb7, 0x0c, 0xb7);
mipi_dsi_dcs_write_seq_multi(ctx, 0xc2, 0x1b, 0xa0);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x20);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x20);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x66);
mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x40);
mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x38);
@ -76,8 +86,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0xf7, 0x54);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf8, 0x64);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf9, 0x54);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x24);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x24);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x0f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x0c);
mipi_dsi_dcs_write_seq_multi(ctx, 0x05, 0x1d);
@ -139,8 +150,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0xc9, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xd9, 0x80);
mipi_dsi_dcs_write_seq_multi(ctx, 0xe9, 0x02);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x25);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x25);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x18, 0x22);
mipi_dsi_dcs_write_seq_multi(ctx, 0x19, 0xe4);
mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x40);
@ -164,8 +176,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0xd7, 0x80);
mipi_dsi_dcs_write_seq_multi(ctx, 0xef, 0x20);
mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x84);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x26);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x26);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x81, 0x0f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x01);
mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x03);
@ -185,8 +198,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0x9c, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0x9d, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0x9e, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x27);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x27);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x68);
mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x81);
mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x6a);
@ -215,8 +229,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0xe6, 0xd3);
mipi_dsi_dcs_write_seq_multi(ctx, 0xeb, 0x03);
mipi_dsi_dcs_write_seq_multi(ctx, 0xec, 0x28);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x2a);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x2a);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x00, 0x91);
mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x20);
mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x50);
@ -260,8 +275,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0x8c, 0x7d);
mipi_dsi_dcs_write_seq_multi(ctx, 0x8d, 0x7d);
mipi_dsi_dcs_write_seq_multi(ctx, 0x8e, 0x7d);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x20);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x20);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x49, 0x00,
0x6a, 0x00, 0x89, 0x00, 0x9f, 0x00, 0xb6, 0x00, 0xc8);
mipi_dsi_dcs_write_seq_multi(ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3a, 0x01,
@ -286,8 +302,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
0x01, 0x03, 0x1f, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a);
mipi_dsi_dcs_write_seq_multi(ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03,
0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x21);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x21);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x49, 0x00,
0x6a, 0x00, 0x89, 0x00, 0x9f, 0x00, 0xb6, 0x00, 0xc8);
mipi_dsi_dcs_write_seq_multi(ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3a, 0x01,
@ -312,8 +329,9 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
0x01, 0x03, 0x1f, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a);
mipi_dsi_dcs_write_seq_multi(ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03,
0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x2c);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x2c);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x61, 0x1f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x62, 0x1f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x03);
@ -327,12 +345,13 @@ static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx)
mipi_dsi_dcs_write_seq_multi(ctx, 0x56, 0x0f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x58, 0x0f);
mipi_dsi_dcs_write_seq_multi(ctx, 0x59, 0x0f);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xf0);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0xf0);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x5a, 0x00);
mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x10);
mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
nt36672e_switch_page(ctx, 0x10);
nt36672e_enable_reload_cmds(ctx);
mipi_dsi_dcs_write_seq_multi(ctx, 0x51, 0xff);
mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x24);
mipi_dsi_dcs_write_seq_multi(ctx, 0x55, 0x01);