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pci-v5.8-fixes-3
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commit
d9644712a2
@ -2330,6 +2330,19 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f1, quirk_disable_aspm_l0s);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f4, quirk_disable_aspm_l0s);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1508, quirk_disable_aspm_l0s);
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static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev)
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{
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pci_info(dev, "Disabling ASPM L0s/L1\n");
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pci_disable_link_state(dev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
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}
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/*
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* ASM1083/1085 PCIe-PCI bridge devices cause AER timeout errors on the
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* upstream PCIe root port when ASPM is enabled. At least L0s mode is affected;
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* disable both L0s and L1 for now to be safe.
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*/
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080, quirk_disable_aspm_l0s_l1);
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/*
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* Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain
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* Link bit cleared after starting the link retrain process to allow this
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