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Merge branch 'imx-for-arnd' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes

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This commit is contained in:
Arnd Bergmann 2011-11-23 20:26:57 +00:00
commit d92c9d5b38
9 changed files with 69 additions and 90 deletions
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1
MAINTAINERS
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@ -789,6 +789,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
T: git git://git.pengutronix.de/git/imx/linux-2.6.git T: git git://git.pengutronix.de/git/imx/linux-2.6.git
F: arch/arm/mach-mx*/ F: arch/arm/mach-mx*/
F: arch/arm/mach-imx/
F: arch/arm/plat-mxc/ F: arch/arm/plat-mxc/
ARM/FREESCALE IMX51 ARM/FREESCALE IMX51

13
arch/arm/mach-imx/Kconfig
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@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
config HAVE_IMX_SRC config HAVE_IMX_SRC
bool bool
#
# ARCH_MX31 and ARCH_MX35 are left for compatibility
# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
# more sensible) names are used: SOC_IMX31 and SOC_IMX35
config ARCH_MX1 config ARCH_MX1
bool bool
@ -27,12 +22,6 @@ config ARCH_MX25
config MACH_MX27 config MACH_MX27
bool bool
config ARCH_MX31
bool
config ARCH_MX35
bool
config SOC_IMX1 config SOC_IMX1
bool bool
select ARCH_MX1 select ARCH_MX1
@ -72,7 +61,6 @@ config SOC_IMX31
select CPU_V6 select CPU_V6
select IMX_HAVE_PLATFORM_MXC_RNGA select IMX_HAVE_PLATFORM_MXC_RNGA
select ARCH_MXC_AUDMUX_V2 select ARCH_MXC_AUDMUX_V2
select ARCH_MX31
select MXC_AVIC select MXC_AVIC
select SMP_ON_UP if SMP select SMP_ON_UP if SMP
@ -82,7 +70,6 @@ config SOC_IMX35
select ARCH_MXC_IOMUX_V3 select ARCH_MXC_IOMUX_V3
select ARCH_MXC_AUDMUX_V2 select ARCH_MXC_AUDMUX_V2
select HAVE_EPIT select HAVE_EPIT
select ARCH_MX35
select MXC_AVIC select MXC_AVIC
select SMP_ON_UP if SMP select SMP_ON_UP if SMP

109
arch/arm/mach-imx/mm-imx3.c
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@ -33,29 +33,32 @@
static void imx3_idle(void) static void imx3_idle(void)
{ {
unsigned long reg = 0; unsigned long reg = 0;
__asm__ __volatile__(
/* disable I and D cache */ if (!need_resched())
"mrc p15, 0, %0, c1, c0, 0\n" __asm__ __volatile__(
"bic %0, %0, #0x00001000\n" /* disable I and D cache */
"bic %0, %0, #0x00000004\n" "mrc p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c1, c0, 0\n" "bic %0, %0, #0x00001000\n"
/* invalidate I cache */ "bic %0, %0, #0x00000004\n"
"mov %0, #0\n" "mcr p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c7, c5, 0\n" /* invalidate I cache */
/* clear and invalidate D cache */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c5, 0\n"
"mcr p15, 0, %0, c7, c14, 0\n" /* clear and invalidate D cache */
/* WFI */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c14, 0\n"
"mcr p15, 0, %0, c7, c0, 4\n" /* WFI */
"nop\n" "nop\n" "nop\n" "nop\n" "mov %0, #0\n"
"nop\n" "nop\n" "nop\n" "mcr p15, 0, %0, c7, c0, 4\n"
/* enable I and D cache */ "nop\n" "nop\n" "nop\n" "nop\n"
"mrc p15, 0, %0, c1, c0, 0\n" "nop\n" "nop\n" "nop\n"
"orr %0, %0, #0x00001000\n" /* enable I and D cache */
"orr %0, %0, #0x00000004\n" "mrc p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c1, c0, 0\n" "orr %0, %0, #0x00001000\n"
: "=r" (reg)); "orr %0, %0, #0x00000004\n"
"mcr p15, 0, %0, c1, c0, 0\n"
: "=r" (reg));
local_irq_enable();
} }
static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
l2x0_init(l2x0_base, 0x00030024, 0x00000000); l2x0_init(l2x0_base, 0x00030024, 0x00000000);
} }
#ifdef CONFIG_SOC_IMX31
static struct map_desc mx31_io_desc[] __initdata = { static struct map_desc mx31_io_desc[] __initdata = {
imx_map_entry(MX31, X_MEMC, MT_DEVICE), imx_map_entry(MX31, X_MEMC, MT_DEVICE),
imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@ -126,33 +130,11 @@ void __init mx31_map_io(void)
iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
} }
static struct map_desc mx35_io_desc[] __initdata = {
imx_map_entry(MX35, X_MEMC, MT_DEVICE),
imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
};
void __init mx35_map_io(void)
{
iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
}
void __init imx31_init_early(void) void __init imx31_init_early(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX31); mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
imx_idle = imx3_idle; pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap;
}
void __init imx35_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX35);
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
imx_idle = imx3_idle;
imx_ioremap = imx3_ioremap; imx_ioremap = imx3_ioremap;
} }
@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
} }
void __init mx35_init_irq(void)
{
mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
}
static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
.per_2_per_addr = 1677, .per_2_per_addr = 1677,
}; };
@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
} }
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
static struct map_desc mx35_io_desc[] __initdata = {
imx_map_entry(MX35, X_MEMC, MT_DEVICE),
imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
};
void __init mx35_map_io(void)
{
iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
}
void __init imx35_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX35);
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap;
}
void __init mx35_init_irq(void)
{
mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
}
static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
.ap_2_ap_addr = 642, .ap_2_ap_addr = 642,
@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
} }
#endif /* ifdef CONFIG_SOC_IMX35 */

5
arch/arm/mach-mx5/cpu.c
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@ -16,7 +16,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/module.h> #include <linux/module.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/io.h> #include <linux/io.h>
static int mx5_cpu_rev = -1; static int mx5_cpu_rev = -1;
@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
if (!cpu_is_mx51()) if (!cpu_is_mx51())
return 0; return 0;
if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) { if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
(elf_hwcap & HWCAP_NEON)) {
elf_hwcap &= ~HWCAP_NEON; elf_hwcap &= ~HWCAP_NEON;
pr_info("Turning off NEON support, detected broken NEON implementation\n"); pr_info("Turning off NEON support, detected broken NEON implementation\n");
} }

6
arch/arm/mach-mx5/mm.c
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@ -23,7 +23,9 @@
static void imx5_idle(void) static void imx5_idle(void)
{ {
mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (!need_resched())
mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
local_irq_enable();
} }
/* /*
@ -89,7 +91,7 @@ void __init imx51_init_early(void)
mxc_set_cpu_type(MXC_CPU_MX51); mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
imx_idle = imx5_idle; pm_idle = imx5_idle;
} }
void __init imx53_init_early(void) void __init imx53_init_early(void)

1
arch/arm/plat-mxc/include/mach/common.h
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@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode {
}; };
extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
extern void (*imx_idle)(void);
extern void imx_print_silicon_rev(const char *cpu, int srev); extern void imx_print_silicon_rev(const char *cpu, int srev);
void avic_handle_irq(struct pt_regs *); void avic_handle_irq(struct pt_regs *);

14
arch/arm/plat-mxc/include/mach/mxc.h
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@ -50,20 +50,6 @@
#define IMX_CHIP_REVISION_3_3 0x33 #define IMX_CHIP_REVISION_3_3 0x33
#define IMX_CHIP_REVISION_UNKNOWN 0xff #define IMX_CHIP_REVISION_UNKNOWN 0xff
#define IMX_CHIP_REVISION_1_0_STRING "1.0"
#define IMX_CHIP_REVISION_1_1_STRING "1.1"
#define IMX_CHIP_REVISION_1_2_STRING "1.2"
#define IMX_CHIP_REVISION_1_3_STRING "1.3"
#define IMX_CHIP_REVISION_2_0_STRING "2.0"
#define IMX_CHIP_REVISION_2_1_STRING "2.1"
#define IMX_CHIP_REVISION_2_2_STRING "2.2"
#define IMX_CHIP_REVISION_2_3_STRING "2.3"
#define IMX_CHIP_REVISION_3_0_STRING "3.0"
#define IMX_CHIP_REVISION_3_1_STRING "3.1"
#define IMX_CHIP_REVISION_3_2_STRING "3.2"
#define IMX_CHIP_REVISION_3_3_STRING "3.3"
#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern unsigned int __mxc_cpu_type; extern unsigned int __mxc_cpu_type;
#endif #endif

7
arch/arm/plat-mxc/include/mach/system.h
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@ -17,14 +17,9 @@
#ifndef __ASM_ARCH_MXC_SYSTEM_H__ #ifndef __ASM_ARCH_MXC_SYSTEM_H__
#define __ASM_ARCH_MXC_SYSTEM_H__ #define __ASM_ARCH_MXC_SYSTEM_H__
extern void (*imx_idle)(void);
static inline void arch_idle(void) static inline void arch_idle(void)
{ {
if (imx_idle != NULL) cpu_do_idle();
(imx_idle)();
else
cpu_do_idle();
} }
void arch_reset(char mode, const char *cmd); void arch_reset(char mode, const char *cmd);

3
arch/arm/plat-mxc/system.c
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@ -21,6 +21,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/module.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/common.h> #include <mach/common.h>
@ -28,8 +29,8 @@
#include <asm/system.h> #include <asm/system.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
void (*imx_idle)(void) = NULL;
void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL; void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
EXPORT_SYMBOL_GPL(imx_ioremap);
static void __iomem *wdog_base; static void __iomem *wdog_base;