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ALSA: hda: Rework snd_hdac_stream_reset() to use macros
We can use existing macros to poll and update register values instead of open coding the functionality. Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/20220818141517.109280-3-amadeuszx.slawinski@linux.intel.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -165,7 +165,6 @@ EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip);
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void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
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{
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unsigned char val;
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int timeout;
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int dma_run_state;
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snd_hdac_stream_clear(azx_dev);
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@ -173,30 +172,17 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
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dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
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snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
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udelay(3);
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timeout = 300;
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do {
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val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
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SD_CTL_STREAM_RESET;
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if (val)
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break;
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} while (--timeout);
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/* wait for hardware to report that the stream entered reset */
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snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
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if (azx_dev->bus->dma_stop_delay && dma_run_state)
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udelay(azx_dev->bus->dma_stop_delay);
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val &= ~SD_CTL_STREAM_RESET;
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snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
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udelay(3);
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snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
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timeout = 300;
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/* waiting for hardware to report that the stream is out of reset */
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do {
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val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
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SD_CTL_STREAM_RESET;
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if (!val)
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break;
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} while (--timeout);
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/* wait for hardware to report that the stream is out of reset */
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snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
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/* reset first position - may not be synced with hw at this time */
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if (azx_dev->posbuf)
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