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For 3.10 we have a few new MFD drivers for:

Browse Source 
- The ChromeOS embedded controller which provides keyboard, battery and power
   management services. This controller is accessible through i2c or SPI.
 
 - Silicon Laboratories 476x controller, providing access to their FM chipset
   and their audio codec.
 
 - Realtek's RTS5249, a memory stick, MMC and SD/SDIO PCI based reader.
 
 - Nokia's Tahvo power button and watchdog device. This device is very similar
   to Retu and is thus supported by the same code base.
 
 - STMicroelectronics STMPE1801, a keyboard and GPIO controller supported by
   the stmpe driver.
 
 - ST-Ericsson AB8540 and AB8505 power management and voltage converter
   controllers through the existing ab8500 code.
 
 Some other drivers got cleaned up or improved. In particular:
 
 - The Linaro/STE guys got the ab8500 driver in sync with their internal code
   through a series of optimizations, fixes and improvements.
 
 - The AS3711 and OMAP USB drivers now have DT support.
 
 - The arizona clock and interrupt handling code got improved.
 
 - The wm5102 register patch and boot mechanism also got improved.
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Merge tag 'mfd-3.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-next

Pull MFD update from Samuel Ortiz:
 "For 3.10 we have a few new MFD drivers for:

   - The ChromeOS embedded controller which provides keyboard, battery
     and power management services.  This controller is accessible
     through i2c or SPI.

   - Silicon Laboratories 476x controller, providing access to their FM
     chipset and their audio codec.

   - Realtek's RTS5249, a memory stick, MMC and SD/SDIO PCI based
     reader.

   - Nokia's Tahvo power button and watchdog device.  This device is
     very similar to Retu and is thus supported by the same code base.

   - STMicroelectronics STMPE1801, a keyboard and GPIO controller
     supported by the stmpe driver.

   - ST-Ericsson AB8540 and AB8505 power management and voltage
     converter controllers through the existing ab8500 code.

  Some other drivers got cleaned up or improved.  In particular:

   - The Linaro/STE guys got the ab8500 driver in sync with their
     internal code through a series of optimizations, fixes and
     improvements.

   - The AS3711 and OMAP USB drivers now have DT support.

   - The arizona clock and interrupt handling code got improved.

   - The wm5102 register patch and boot mechanism also got improved."

* tag 'mfd-3.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-next: (104 commits)
  mfd: si476x: Don't use 0bNNN
  mfd: vexpress: Handle pending config transactions
  mfd: ab8500: Export ab8500_gpadc_sw_hw_convert properly
  mfd: si476x: Fix i2c warning
  mfd: si476x: Add header files and Kbuild plumbing
  mfd: si476x: Add chip properties handling code
  mfd: si476x: Add the bulk of the core driver
  mfd: si476x: Add commands abstraction layer
  mfd: rtsx: Support RTS5249
  mfd: retu: Add Tahvo support
  mfd: ucb1400: Pass ucb1400-gpio data through ac97 bus
  mfd: wm8994: Add some OF properties
  mfd: wm8994: Add device ID data to WM8994 OF device IDs
  input: Export matrix_keypad_parse_of_params()
  mfd: tps65090: Add compatible string for charger subnode
  mfd: db8500-prcmu: Support platform dependant device selection
  mfd: syscon: Fix warnings when printing resource_size_t
  of: Add stub of_get_parent for non-OF builds
  mfd: omap-usb-tll: Convert to devm_ioremap_resource()
  mfd: omap-usb-host: Convert to devm_ioremap_resource()
  ...
This commit is contained in:
Linus Torvalds 2013-05-05 17:36:20 -07:00
commit d7ab7302f9
88 changed files with 9042 additions and 1403 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

72
Documentation/devicetree/bindings/input/cros-ec-keyb.txt Normal file
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@ -0,0 +1,72 @@
ChromeOS EC Keyboard
Google's ChromeOS EC Keyboard is a simple matrix keyboard implemented on
a separate EC (Embedded Controller) device. It provides a message for reading
key scans from the EC. These are then converted into keycodes for processing
by the kernel.
This binding is based on matrix-keymap.txt and extends/modifies it as follows:
Required properties:
- compatible: "google,cros-ec-keyb"
Optional properties:
- google,needs-ghost-filter: True to enable a ghost filter for the matrix
keyboard. This is recommended if the EC does not have its own logic or
hardware for this.
Example:
cros-ec-keyb {
compatible = "google,cros-ec-keyb";
keypad,num-rows = <8>;
keypad,num-columns = <13>;
google,needs-ghost-filter;
/*
* Keymap entries take the form of 0xRRCCKKKK where
* RR=Row CC=Column KKKK=Key Code
* The values below are for a US keyboard layout and
* are taken from the Linux driver. Note that the
* 102ND key is not used for US keyboards.
*/
linux,keymap = <
/* CAPSLCK F1 B F10 */
0x0001003a 0x0002003b 0x00030030 0x00040044
/* N = R_ALT ESC */
0x00060031 0x0008000d 0x000a0064 0x01010001
/* F4 G F7 H */
0x0102003e 0x01030022 0x01040041 0x01060023
/* ' F9 BKSPACE L_CTRL */
0x01080028 0x01090043 0x010b000e 0x0200001d
/* TAB F3 T F6 */
0x0201000f 0x0202003d 0x02030014 0x02040040
/* ] Y 102ND [ */
0x0205001b 0x02060015 0x02070056 0x0208001a
/* F8 GRAVE F2 5 */
0x02090042 0x03010029 0x0302003c 0x03030006
/* F5 6 - \ */
0x0304003f 0x03060007 0x0308000c 0x030b002b
/* R_CTRL A D F */
0x04000061 0x0401001e 0x04020020 0x04030021
/* S K J ; */
0x0404001f 0x04050025 0x04060024 0x04080027
/* L ENTER Z C */
0x04090026 0x040b001c 0x0501002c 0x0502002e
/* V X , M */
0x0503002f 0x0504002d 0x05050033 0x05060032
/* L_SHIFT / . SPACE */
0x0507002a 0x05080035 0x05090034 0x050B0039
/* 1 3 4 2 */
0x06010002 0x06020004 0x06030005 0x06040003
/* 8 7 0 9 */
0x06050009 0x06060008 0x0608000b 0x0609000a
/* L_ALT DOWN RIGHT Q */
0x060a0038 0x060b006c 0x060c006a 0x07010010
/* E R W I */
0x07020012 0x07030013 0x07040011 0x07050017
/* U R_SHIFT P O */
0x07060016 0x07070036 0x07080019 0x07090018
/* UP LEFT */
0x070b0067 0x070c0069>;
};

73
Documentation/devicetree/bindings/mfd/as3711.txt Normal file
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@ -0,0 +1,73 @@
AS3711 is an I2C PMIC from Austria MicroSystems with multiple DCDC and LDO power
supplies, a battery charger and an RTC. So far only bindings for the two stepup
DCDC converters are defined. Other DCDC and LDO supplies are configured, using
standard regulator properties, they must belong to a sub-node, called
"regulators" and be called "sd1" to "sd4" and "ldo1" to "ldo8." Stepup converter
configuration should be placed in a subnode, called "backlight."
Compulsory properties:
- compatible : must be "ams,as3711"
- reg : specifies the I2C address
To use the SU1 converter as a backlight source the following two properties must
be provided:
- su1-dev : framebuffer phandle
- su1-max-uA : maximum current
To use the SU2 converter as a backlight source the following two properties must
be provided:
- su2-dev : framebuffer phandle
- su1-max-uA : maximum current
Additionally one of these properties must be provided to select the type of
feedback used:
- su2-feedback-voltage : voltage feedback is used
- su2-feedback-curr1 : CURR1 input used for current feedback
- su2-feedback-curr2 : CURR2 input used for current feedback
- su2-feedback-curr3 : CURR3 input used for current feedback
- su2-feedback-curr-auto: automatic current feedback selection
and one of these to select the over-voltage protection pin
- su2-fbprot-lx-sd4 : LX_SD4 is used for over-voltage protection
- su2-fbprot-gpio2 : GPIO2 is used for over-voltage protection
- su2-fbprot-gpio3 : GPIO3 is used for over-voltage protection
- su2-fbprot-gpio4 : GPIO4 is used for over-voltage protection
If "su2-feedback-curr-auto" is selected, one or more of the following properties
have to be specified:
- su2-auto-curr1 : use CURR1 input for current feedback
- su2-auto-curr2 : use CURR2 input for current feedback
- su2-auto-curr3 : use CURR3 input for current feedback
Example:
as3711@40 {
compatible = "ams,as3711";
reg = <0x40>;
regulators {
sd4 {
regulator-name = "1.215V";
regulator-min-microvolt = <1215000>;
regulator-max-microvolt = <1235000>;
};
ldo2 {
regulator-name = "2.8V CPU";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
regulator-boot-on;
};
};
backlight {
compatible = "ams,as3711-bl";
su2-dev = <&lcdc>;
su2-max-uA = <36000>;
su2-feedback-curr-auto;
su2-fbprot-gpio4;
su2-auto-curr1;
su2-auto-curr2;
su2-auto-curr3;
};
};

56
Documentation/devicetree/bindings/mfd/cros-ec.txt Normal file
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@ -0,0 +1,56 @@
ChromeOS Embedded Controller
Google's ChromeOS EC is a Cortex-M device which talks to the AP and
implements various function such as keyboard and battery charging.
The EC can be connect through various means (I2C, SPI, LPC) and the
compatible string used depends on the inteface. Each connection method has
its own driver which connects to the top level interface-agnostic EC driver.
Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
the top-level driver.
Required properties (I2C):
- compatible: "google,cros-ec-i2c"
- reg: I2C slave address
Required properties (SPI):
- compatible: "google,cros-ec-spi"
- reg: SPI chip select
Required properties (LPC):
- compatible: "google,cros-ec-lpc"
- reg: List of (IO address, size) pairs defining the interface uses
Example for I2C:
i2c@12CA0000 {
cros-ec@1e {
reg = <0x1e>;
compatible = "google,cros-ec-i2c";
interrupts = <14 0>;
interrupt-parent = <&wakeup_eint>;
wakeup-source;
};
Example for SPI:
spi@131b0000 {
ec@0 {
compatible = "google,cros-ec-spi";
reg = <0x0>;
interrupts = <14 0>;
interrupt-parent = <&wakeup_eint>;
wakeup-source;
spi-max-frequency = <5000000>;
controller-data {
cs-gpio = <&gpf0 3 4 3 0>;
samsung,spi-cs;
samsung,spi-feedback-delay = <2>;
};
};
};
Example for LPC is not supplied as it is not yet implemented.

80
Documentation/devicetree/bindings/mfd/omap-usb-host.txt Normal file
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@ -0,0 +1,80 @@
OMAP HS USB Host
Required properties:
- compatible: should be "ti,usbhs-host"
- reg: should contain one register range i.e. start and length
- ti,hwmods: must contain "usb_host_hs"
Optional properties:
- num-ports: number of USB ports. Usually this is automatically detected
from the IP's revision register but can be overridden by specifying
this property. A maximum of 3 ports are supported at the moment.
- portN-mode: String specifying the port mode for port N, where N can be
from 1 to 3. If the port mode is not specified, that port is treated
as unused. When specified, it must be one of the following.
"ehci-phy",
"ehci-tll",
"ehci-hsic",
"ohci-phy-6pin-datse0",
"ohci-phy-6pin-dpdm",
"ohci-phy-3pin-datse0",
"ohci-phy-4pin-dpdm",
"ohci-tll-6pin-datse0",
"ohci-tll-6pin-dpdm",
"ohci-tll-3pin-datse0",
"ohci-tll-4pin-dpdm",
"ohci-tll-2pin-datse0",
"ohci-tll-2pin-dpdm",
- single-ulpi-bypass: Must be present if the controller contains a single
ULPI bypass control bit. e.g. OMAP3 silicon <= ES2.1
Required properties if child node exists:
- #address-cells: Must be 1
- #size-cells: Must be 1
- ranges: must be present
Properties for children:
The OMAP HS USB Host subsystem contains EHCI and OHCI controllers.
See Documentation/devicetree/bindings/usb/omap-ehci.txt and
omap3-ohci.txt
Example for OMAP4:
usbhshost: usbhshost@4a064000 {
compatible = "ti,usbhs-host";
reg = <0x4a064000 0x800>;
ti,hwmods = "usb_host_hs";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3", "usb-ohci";
reg = <0x4a064800 0x400>;
interrupt-parent = <&gic>;
interrupts = <0 76 0x4>;
};
usbhsehci: ehci@4a064c00 {
compatible = "ti,ehci-omap", "usb-ehci";
reg = <0x4a064c00 0x400>;
interrupt-parent = <&gic>;
interrupts = <0 77 0x4>;
};
};
&usbhshost {
port1-mode = "ehci-phy";
port2-mode = "ehci-tll";
port3-mode = "ehci-phy";
};
&usbhsehci {
phys = <&hsusb1_phy 0 &hsusb3_phy>;
};

17
Documentation/devicetree/bindings/mfd/omap-usb-tll.txt Normal file
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@ -0,0 +1,17 @@
OMAP HS USB Host TLL (Transceiver-Less Interface)
Required properties:
- compatible : should be "ti,usbhs-tll"
- reg : should contain one register range i.e. start and length
- interrupts : should contain the TLL module's interrupt
- ti,hwmod : must contain "usb_tll_hs"
Example:
usbhstll: usbhstll@4a062000 {
compatible = "ti,usbhs-tll";
reg = <0x4a062000 0x1000>;
interrupts = <78>;
ti,hwmods = "usb_tll_hs";
};

58
Documentation/devicetree/bindings/sound/wm8994.txt
View File

@ -5,14 +5,70 @@ on the board).
Required properties:
- compatible : "wlf,wm1811", "wlf,wm8994", "wlf,wm8958"
- compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958".
- reg : the I2C address of the device for I2C, the chip select
number for SPI.
- gpio-controller : Indicates this device is a GPIO controller.
- #gpio-cells : Must be 2. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
- AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply,
SPKVDD1-supply, SPKVDD2-supply : power supplies for the device, as covered
in Documentation/devicetree/bindings/regulator/regulator.txt
Optional properties:
- interrupts : The interrupt line the IRQ signal for the device is
connected to. This is optional, if it is not connected then none
of the interrupt related properties should be specified.
- interrupt-controller : These devices contain interrupt controllers
and may provide interrupt services to other devices if they have an
interrupt line connected.
- interrupt-parent : The parent interrupt controller.
- #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
The first cell is the IRQ number.
The second cell is the flags, encoded as the trigger masks from
Documentation/devicetree/bindings/interrupts.txt
- wlf,gpio-cfg : A list of GPIO configuration register values. If absent,
no configuration of these registers is performed. If any value is
over 0xffff then the register will be left as default. If present 11
values must be supplied.
- wlf,micbias-cfg : Two MICBIAS register values for WM1811 or
WM8958. If absent the register defaults will be used.
- wlf,ldo1ena : GPIO specifier for control of LDO1ENA input to device.
- wlf,ldo2ena : GPIO specifier for control of LDO2ENA input to device.
- wlf,lineout1-se : If present LINEOUT1 is in single ended mode.
- wlf,lineout2-se : If present LINEOUT2 is in single ended mode.
- wlf,lineout1-feedback : If present LINEOUT1 has common mode feedback
connected.
- wlf,lineout2-feedback : If present LINEOUT2 has common mode feedback
connected.
- wlf,ldoena-always-driven : If present LDOENA is always driven.
Example:
codec: wm8994@1a {
compatible = "wlf,wm8994";
reg = <0x1a>;
gpio-controller;
#gpio-cells = <2>;
lineout1-se;
AVDD2-supply = <&regulator>;
CPVDD-supply = <&regulator>;
DBVDD1-supply = <&regulator>;
DBVDD2-supply = <&regulator>;
DBVDD3-supply = <&regulator>;
SPKVDD1-supply = <&regulator>;
SPKVDD2-supply = <&regulator>;
};

2
arch/arm/mach-imx/Kconfig
View File

@ -466,8 +466,6 @@ config MACH_MX31ADS_WM1133_EV1
depends on MACH_MX31ADS
depends on MFD_WM8350_I2C
depends on REGULATOR_WM8350 = y
select MFD_WM8350_CONFIG_MODE_0
select MFD_WM8352_CONFIG_MODE_0
help
Include support for the Wolfson Microelectronics 1133-EV1 PMU
and audio module for the MX31ADS platform.

3
arch/arm/mach-s3c64xx/Kconfig
View File

@ -200,10 +200,7 @@ endchoice
config SMDK6410_WM1190_EV1
bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
depends on MACH_SMDK6410
select MFD_WM8350_CONFIG_MODE_0
select MFD_WM8350_CONFIG_MODE_3
select MFD_WM8350_I2C
select MFD_WM8352_CONFIG_MODE_0
select REGULATOR
select REGULATOR_WM8350
select SAMSUNG_GPIO_EXTRA64

4
arch/arm/mach-s3c64xx/mach-crag6410-module.c
View File

@ -208,7 +208,7 @@ static const struct i2c_board_info wm1277_devs[] = {
static struct arizona_pdata wm5102_reva_pdata = {
.ldoena = S3C64XX_GPN(7),
.gpio_base = CODEC_GPIO_BASE,
.irq_active_high = true,
.irq_flags = IRQF_TRIGGER_HIGH,
.micd_pol_gpio = CODEC_GPIO_BASE + 4,
.micd_rate = 6,
.gpio_defaults = {
@ -238,7 +238,7 @@ static struct spi_board_info wm5102_reva_spi_devs[] = {
static struct arizona_pdata wm5102_pdata = {
.ldoena = S3C64XX_GPN(7),
.gpio_base = CODEC_GPIO_BASE,
.irq_active_high = true,
.irq_flags = IRQF_TRIGGER_HIGH,
.micd_pol_gpio = CODEC_GPIO_BASE + 2,
.gpio_defaults = {
[2] = 0x10000, /* AIF3TXLRCLK */

19
drivers/gpio/gpio-ucb1400.c
View File

@ -12,8 +12,6 @@
#include <linux/module.h>
#include <linux/ucb1400.h>
struct ucb1400_gpio_data *ucbdata;
static int ucb1400_gpio_dir_in(struct gpio_chip *gc, unsigned off)
{
struct ucb1400_gpio *gpio;
@ -50,7 +48,7 @@ static int ucb1400_gpio_probe(struct platform_device *dev)
struct ucb1400_gpio *ucb = dev->dev.platform_data;
int err = 0;
if (!(ucbdata && ucbdata->gpio_offset)) {
if (!(ucb && ucb->gpio_offset)) {
err = -EINVAL;
goto err;
}
@ -58,7 +56,7 @@ static int ucb1400_gpio_probe(struct platform_device *dev)
platform_set_drvdata(dev, ucb);
ucb->gc.label = "ucb1400_gpio";
ucb->gc.base = ucbdata->gpio_offset;
ucb->gc.base = ucb->gpio_offset;
ucb->gc.ngpio = 10;
ucb->gc.owner = THIS_MODULE;
@ -72,8 +70,8 @@ static int ucb1400_gpio_probe(struct platform_device *dev)
if (err)
goto err;
if (ucbdata && ucbdata->gpio_setup)
err = ucbdata->gpio_setup(&dev->dev, ucb->gc.ngpio);
if (ucb && ucb->gpio_setup)
err = ucb->gpio_setup(&dev->dev, ucb->gc.ngpio);
err:
return err;
@ -85,8 +83,8 @@ static int ucb1400_gpio_remove(struct platform_device *dev)
int err = 0;
struct ucb1400_gpio *ucb = platform_get_drvdata(dev);
if (ucbdata && ucbdata->gpio_teardown) {
err = ucbdata->gpio_teardown(&dev->dev, ucb->gc.ngpio);
if (ucb && ucb->gpio_teardown) {
err = ucb->gpio_teardown(&dev->dev, ucb->gc.ngpio);
if (err)
return err;
}
@ -103,11 +101,6 @@ static struct platform_driver ucb1400_gpio_driver = {
},
};
void __init ucb1400_gpio_set_data(struct ucb1400_gpio_data *data)
{
ucbdata = data;
}
module_platform_driver(ucb1400_gpio_driver);
MODULE_DESCRIPTION("Philips UCB1400 GPIO driver");

12
drivers/input/keyboard/Kconfig
View File

@ -628,4 +628,16 @@ config KEYBOARD_W90P910
To compile this driver as a module, choose M here: the
module will be called w90p910_keypad.
config KEYBOARD_CROS_EC
tristate "ChromeOS EC keyboard"
select INPUT_MATRIXKMAP
depends on MFD_CROS_EC
help
Say Y here to enable the matrix keyboard used by ChromeOS devices
and implemented on the ChromeOS EC. You must enable one bus option
(MFD_CROS_EC_I2C or MFD_CROS_EC_SPI) to use this.
To compile this driver as a module, choose M here: the
module will be called cros_ec_keyb.
endif

1
drivers/input/keyboard/Makefile
View File

@ -11,6 +11,7 @@ obj-$(CONFIG_KEYBOARD_AMIGA) += amikbd.o
obj-$(CONFIG_KEYBOARD_ATARI) += atakbd.o
obj-$(CONFIG_KEYBOARD_ATKBD) += atkbd.o
obj-$(CONFIG_KEYBOARD_BFIN) += bf54x-keys.o
obj-$(CONFIG_KEYBOARD_CROS_EC) += cros_ec_keyb.o
obj-$(CONFIG_KEYBOARD_DAVINCI) += davinci_keyscan.o
obj-$(CONFIG_KEYBOARD_EP93XX) += ep93xx_keypad.o
obj-$(CONFIG_KEYBOARD_GOLDFISH_EVENTS) += goldfish_events.o

334
drivers/input/keyboard/cros_ec_keyb.c Normal file
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@ -0,0 +1,334 @@
/*
* ChromeOS EC keyboard driver
*
* Copyright (C) 2012 Google, Inc
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* This driver uses the Chrome OS EC byte-level message-based protocol for
* communicating the keyboard state (which keys are pressed) from a keyboard EC
* to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
* but everything else (including deghosting) is done here. The main
* motivation for this is to keep the EC firmware as simple as possible, since
* it cannot be easily upgraded and EC flash/IRAM space is relatively
* expensive.
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/input.h>
#include <linux/kernel.h>
#include <linux/notifier.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/input/matrix_keypad.h>
#include <linux/mfd/cros_ec.h>
#include <linux/mfd/cros_ec_commands.h>
/*
* @rows: Number of rows in the keypad
* @cols: Number of columns in the keypad
* @row_shift: log2 or number of rows, rounded up
* @keymap_data: Matrix keymap data used to convert to keyscan values
* @ghost_filter: true to enable the matrix key-ghosting filter
* @dev: Device pointer
* @idev: Input device
* @ec: Top level ChromeOS device to use to talk to EC
* @event_notifier: interrupt event notifier for transport devices
*/
struct cros_ec_keyb {
unsigned int rows;
unsigned int cols;
int row_shift;
const struct matrix_keymap_data *keymap_data;
bool ghost_filter;
struct device *dev;
struct input_dev *idev;
struct cros_ec_device *ec;
struct notifier_block notifier;
};
static bool cros_ec_keyb_row_has_ghosting(struct cros_ec_keyb *ckdev,
uint8_t *buf, int row)
{
int pressed_in_row = 0;
int row_has_teeth = 0;
int col, mask;
mask = 1 << row;
for (col = 0; col < ckdev->cols; col++) {
if (buf[col] & mask) {
pressed_in_row++;
row_has_teeth |= buf[col] & ~mask;
if (pressed_in_row > 1 && row_has_teeth) {
/* ghosting */
dev_dbg(ckdev->dev,
"ghost found at: r%d c%d, pressed %d, teeth 0x%x\n",
row, col, pressed_in_row,
row_has_teeth);
return true;
}
}
}
return false;
}
/*
* Returns true when there is at least one combination of pressed keys that
* results in ghosting.
*/
static bool cros_ec_keyb_has_ghosting(struct cros_ec_keyb *ckdev, uint8_t *buf)
{
int row;
/*
* Ghosting happens if for any pressed key X there are other keys
* pressed both in the same row and column of X as, for instance,
* in the following diagram:
*
* . . Y . g .
* . . . . . .
* . . . . . .
* . . X . Z .
*
* In this case only X, Y, and Z are pressed, but g appears to be
* pressed too (see Wikipedia).
*
* We can detect ghosting in a single pass (*) over the keyboard state
* by maintaining two arrays. pressed_in_row counts how many pressed
* keys we have found in a row. row_has_teeth is true if any of the
* pressed keys for this row has other pressed keys in its column. If
* at any point of the scan we find that a row has multiple pressed
* keys, and at least one of them is at the intersection with a column
* with multiple pressed keys, we're sure there is ghosting.
* Conversely, if there is ghosting, we will detect such situation for
* at least one key during the pass.
*
* (*) This looks linear in the number of keys, but it's not. We can
* cheat because the number of rows is small.
*/
for (row = 0; row < ckdev->rows; row++)
if (cros_ec_keyb_row_has_ghosting(ckdev, buf, row))
return true;
return false;
}
/*
* Compares the new keyboard state to the old one and produces key
* press/release events accordingly. The keyboard state is 13 bytes (one byte
* per column)
*/
static void cros_ec_keyb_process(struct cros_ec_keyb *ckdev,
uint8_t *kb_state, int len)
{
struct input_dev *idev = ckdev->idev;
int col, row;
int new_state;
int num_cols;
num_cols = len;
if (ckdev->ghost_filter && cros_ec_keyb_has_ghosting(ckdev, kb_state)) {
/*
* Simple-minded solution: ignore this state. The obvious
* improvement is to only ignore changes to keys involved in
* the ghosting, but process the other changes.
*/
dev_dbg(ckdev->dev, "ghosting found\n");
return;
}
for (col = 0; col < ckdev->cols; col++) {
for (row = 0; row < ckdev->rows; row++) {
int pos = MATRIX_SCAN_CODE(row, col, ckdev->row_shift);
const unsigned short *keycodes = idev->keycode;
int code;
code = keycodes[pos];
new_state = kb_state[col] & (1 << row);
if (!!new_state != test_bit(code, idev->key)) {
dev_dbg(ckdev->dev,
"changed: [r%d c%d]: byte %02x\n",
row, col, new_state);
input_report_key(idev, code, new_state);
}
}
}
input_sync(ckdev->idev);
}
static int cros_ec_keyb_open(struct input_dev *dev)
{
struct cros_ec_keyb *ckdev = input_get_drvdata(dev);
return blocking_notifier_chain_register(&ckdev->ec->event_notifier,
&ckdev->notifier);
}
static void cros_ec_keyb_close(struct input_dev *dev)
{
struct cros_ec_keyb *ckdev = input_get_drvdata(dev);
blocking_notifier_chain_unregister(&ckdev->ec->event_notifier,
&ckdev->notifier);
}
static int cros_ec_keyb_get_state(struct cros_ec_keyb *ckdev, uint8_t *kb_state)
{
return ckdev->ec->command_recv(ckdev->ec, EC_CMD_MKBP_STATE,
kb_state, ckdev->cols);
}
static int cros_ec_keyb_work(struct notifier_block *nb,
unsigned long state, void *_notify)
{
int ret;
struct cros_ec_keyb *ckdev = container_of(nb, struct cros_ec_keyb,
notifier);
uint8_t kb_state[ckdev->cols];
ret = cros_ec_keyb_get_state(ckdev, kb_state);
if (ret >= 0)
cros_ec_keyb_process(ckdev, kb_state, ret);
return NOTIFY_DONE;
}
/* Clear any keys in the buffer */
static void cros_ec_keyb_clear_keyboard(struct cros_ec_keyb *ckdev)
{
uint8_t old_state[ckdev->cols];
uint8_t new_state[ckdev->cols];
unsigned long duration;
int i, ret;
/*
* Keep reading until we see that the scan state does not change.
* That indicates that we are done.
*
* Assume that the EC keyscan buffer is at most 32 deep.
*/
duration = jiffies;
ret = cros_ec_keyb_get_state(ckdev, new_state);
for (i = 1; !ret && i < 32; i++) {
memcpy(old_state, new_state, sizeof(old_state));
ret = cros_ec_keyb_get_state(ckdev, new_state);
if (0 == memcmp(old_state, new_state, sizeof(old_state)))
break;
}
duration = jiffies - duration;
dev_info(ckdev->dev, "Discarded %d keyscan(s) in %dus\n", i,
jiffies_to_usecs(duration));
}
static int cros_ec_keyb_probe(struct platform_device *pdev)
{
struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
struct device *dev = ec->dev;
struct cros_ec_keyb *ckdev;
struct input_dev *idev;
struct device_node *np;
int err;
np = pdev->dev.of_node;
if (!np)
return -ENODEV;
ckdev = devm_kzalloc(&pdev->dev, sizeof(*ckdev), GFP_KERNEL);
if (!ckdev)
return -ENOMEM;
err = matrix_keypad_parse_of_params(&pdev->dev, &ckdev->rows,
&ckdev->cols);
if (err)
return err;
idev = devm_input_allocate_device(&pdev->dev);
if (!idev)
return -ENOMEM;
ckdev->ec = ec;
ckdev->notifier.notifier_call = cros_ec_keyb_work;
ckdev->dev = dev;
dev_set_drvdata(&pdev->dev, ckdev);
idev->name = ec->ec_name;
idev->phys = ec->phys_name;
__set_bit(EV_REP, idev->evbit);
idev->id.bustype = BUS_VIRTUAL;
idev->id.version = 1;
idev->id.product = 0;
idev->dev.parent = &pdev->dev;
idev->open = cros_ec_keyb_open;
idev->close = cros_ec_keyb_close;
ckdev->ghost_filter = of_property_read_bool(np,
"google,needs-ghost-filter");
err = matrix_keypad_build_keymap(NULL, NULL, ckdev->rows, ckdev->cols,
NULL, idev);
if (err) {
dev_err(dev, "cannot build key matrix\n");
return err;
}
ckdev->row_shift = get_count_order(ckdev->cols);
input_set_capability(idev, EV_MSC, MSC_SCAN);
input_set_drvdata(idev, ckdev);
ckdev->idev = idev;
err = input_register_device(ckdev->idev);
if (err) {
dev_err(dev, "cannot register input device\n");
return err;
}
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int cros_ec_keyb_resume(struct device *dev)
{
struct cros_ec_keyb *ckdev = dev_get_drvdata(dev);
/*
* When the EC is not a wake source, then it could not have caused the
* resume, so we clear the EC's key scan buffer. If the EC was a
* wake source (e.g. the lid is open and the user might press a key to
* wake) then the key scan buffer should be preserved.
*/
if (ckdev->ec->was_wake_device)
cros_ec_keyb_clear_keyboard(ckdev);
return 0;
}
#endif
static SIMPLE_DEV_PM_OPS(cros_ec_keyb_pm_ops, NULL, cros_ec_keyb_resume);
static struct platform_driver cros_ec_keyb_driver = {
.probe = cros_ec_keyb_probe,
.driver = {
.name = "cros-ec-keyb",
.pm = &cros_ec_keyb_pm_ops,
},
};
module_platform_driver(cros_ec_keyb_driver);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("ChromeOS EC keyboard driver");
MODULE_ALIAS("platform:cros-ec-keyb");

11
drivers/input/keyboard/lpc32xx-keys.c
View File

@ -144,12 +144,13 @@ static int lpc32xx_parse_dt(struct device *dev,
{
struct device_node *np = dev->of_node;
u32 rows = 0, columns = 0;
int err;
of_property_read_u32(np, "keypad,num-rows", &rows);
of_property_read_u32(np, "keypad,num-columns", &columns);
if (!rows || rows != columns) {
dev_err(dev,
"rows and columns must be specified and be equal!\n");
err = matrix_keypad_parse_of_params(dev, &rows, &columns);
if (err)
return err;
if (rows != columns) {
dev_err(dev, "rows and columns must be equal!\n");
return -EINVAL;
}

16
drivers/input/keyboard/omap4-keypad.c
View File

@ -215,18 +215,12 @@ static int omap4_keypad_parse_dt(struct device *dev,
struct omap4_keypad *keypad_data)
{
struct device_node *np = dev->of_node;
int err;
if (!np) {
dev_err(dev, "missing DT data");
return -EINVAL;
}
of_property_read_u32(np, "keypad,num-rows", &keypad_data->rows);
of_property_read_u32(np, "keypad,num-columns", &keypad_data->cols);
if (!keypad_data->rows || !keypad_data->cols) {
dev_err(dev, "number of keypad rows/columns not specified\n");
return -EINVAL;
}
err = matrix_keypad_parse_of_params(dev, &keypad_data->rows,
&keypad_data->cols);
if (err)
return err;
if (of_get_property(np, "linux,input-no-autorepeat", NULL))
keypad_data->no_autorepeat = true;

7
drivers/input/keyboard/tca8418_keypad.c
View File

@ -288,8 +288,11 @@ static int tca8418_keypad_probe(struct i2c_client *client,
irq_is_gpio = pdata->irq_is_gpio;
} else {
struct device_node *np = dev->of_node;
of_property_read_u32(np, "keypad,num-rows", &rows);
of_property_read_u32(np, "keypad,num-columns", &cols);
int err;
err = matrix_keypad_parse_of_params(dev, &rows, &cols);
if (err)
return err;
rep = of_property_read_bool(np, "keypad,autorepeat");
}

20
drivers/input/matrix-keymap.c
View File

@ -50,6 +50,26 @@ static bool matrix_keypad_map_key(struct input_dev *input_dev,
}
#ifdef CONFIG_OF
int matrix_keypad_parse_of_params(struct device *dev,
unsigned int *rows, unsigned int *cols)
{
struct device_node *np = dev->of_node;
if (!np) {
dev_err(dev, "missing DT data");
return -EINVAL;
}
of_property_read_u32(np, "keypad,num-rows", rows);
of_property_read_u32(np, "keypad,num-columns", cols);
if (!*rows || !*cols) {
dev_err(dev, "number of keypad rows/columns not specified\n");
return -EINVAL;
}
return 0;
}
EXPORT_SYMBOL_GPL(matrix_keypad_parse_of_params);
static int matrix_keypad_parse_of_keymap(const char *propname,
unsigned int rows, unsigned int cols,
struct input_dev *input_dev)

12
drivers/mfd/88pm860x-core.c
View File

@ -1144,17 +1144,15 @@ static int pm860x_probe(struct i2c_client *client,
return -ENOMEM;
ret = pm860x_dt_init(node, &client->dev, pdata);
if (ret)
goto err;
return ret;
} else if (!pdata) {
pr_info("No platform data in %s!\n", __func__);
return -EINVAL;
}
chip = kzalloc(sizeof(struct pm860x_chip), GFP_KERNEL);
if (chip == NULL) {
ret = -ENOMEM;
goto err;
}
if (chip == NULL)
return -ENOMEM;
chip->id = verify_addr(client);
chip->regmap = regmap_init_i2c(client, &pm860x_regmap_config);
@ -1194,10 +1192,6 @@ static int pm860x_probe(struct i2c_client *client,
pm860x_device_init(chip, pdata);
return 0;
err:
if (node)
devm_kfree(&client->dev, pdata);
return ret;
}
static int pm860x_remove(struct i2c_client *client)

1604
drivers/mfd/Kconfig
View File

File diff suppressed because it is too large Load Diff

9
drivers/mfd/Makefile
View File

@ -8,8 +8,11 @@ obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o
obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o
obj-$(CONFIG_MFD_SM501) += sm501.o
obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o
obj-$(CONFIG_MFD_CROS_EC) += cros_ec.o
obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
rtsx_pci-objs := rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o
rtsx_pci-objs := rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o
obj-$(CONFIG_MFD_RTSX_PCI) += rtsx_pci.o
obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o
@ -131,6 +134,10 @@ obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o
obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
obj-$(CONFIG_MFD_VX855) += vx855.o
obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
si476x-core-y := si476x-cmd.o si476x-prop.o si476x-i2c.o
obj-$(CONFIG_MFD_SI476X_CORE) += si476x-core.o
obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o omap-usb-tll.o
obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o

20
drivers/mfd/aat2870-core.c
View File

@ -367,12 +367,12 @@ static int aat2870_i2c_probe(struct i2c_client *client,
int i, j;
int ret = 0;
aat2870 = kzalloc(sizeof(struct aat2870_data), GFP_KERNEL);
aat2870 = devm_kzalloc(&client->dev, sizeof(struct aat2870_data),
GFP_KERNEL);
if (!aat2870) {
dev_err(&client->dev,
"Failed to allocate memory for aat2870\n");
ret = -ENOMEM;
goto out;
return -ENOMEM;
}
aat2870->dev = &client->dev;
@ -400,12 +400,12 @@ static int aat2870_i2c_probe(struct i2c_client *client,
aat2870->init(aat2870);
if (aat2870->en_pin >= 0) {
ret = gpio_request_one(aat2870->en_pin, GPIOF_OUT_INIT_HIGH,
"aat2870-en");
ret = devm_gpio_request_one(&client->dev, aat2870->en_pin,
GPIOF_OUT_INIT_HIGH, "aat2870-en");
if (ret < 0) {
dev_err(&client->dev,
"Failed to request GPIO %d\n", aat2870->en_pin);
goto out_kfree;
return ret;
}
}
@ -436,11 +436,6 @@ static int aat2870_i2c_probe(struct i2c_client *client,
out_disable:
aat2870_disable(aat2870);
if (aat2870->en_pin >= 0)
gpio_free(aat2870->en_pin);
out_kfree:
kfree(aat2870);
out:
return ret;
}
@ -452,11 +447,8 @@ static int aat2870_i2c_remove(struct i2c_client *client)
mfd_remove_devices(aat2870->dev);
aat2870_disable(aat2870);
if (aat2870->en_pin >= 0)
gpio_free(aat2870->en_pin);
if (aat2870->uninit)
aat2870->uninit(aat2870);
kfree(aat2870);
return 0;
}

14
drivers/mfd/ab3100-otp.c
View File

@ -248,19 +248,7 @@ static struct platform_driver ab3100_otp_driver = {
.remove = __exit_p(ab3100_otp_remove),
};
static int __init ab3100_otp_init(void)
{
return platform_driver_probe(&ab3100_otp_driver,
ab3100_otp_probe);
}
static void __exit ab3100_otp_exit(void)
{
platform_driver_unregister(&ab3100_otp_driver);
}
module_init(ab3100_otp_init);
module_exit(ab3100_otp_exit);
module_platform_driver_probe(ab3100_otp_driver, ab3100_otp_probe);
MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
MODULE_DESCRIPTION("AB3100 OTP Readout Driver");

32
drivers/mfd/ab8500-core.c
View File

@ -458,22 +458,23 @@ static void update_latch_offset(u8 *offset, int i)
static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
int latch_offset, u8 latch_val)
{
int int_bit = __ffs(latch_val);
int line, i;
int int_bit, line, i;
do {
for (i = 0; i < ab8500->mask_size; i++)
if (ab8500->irq_reg_offset[i] == latch_offset)
break;
if (i >= ab8500->mask_size) {
dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
latch_offset);
return -ENXIO;
}
/* ignore masked out interrupts */
latch_val &= ~ab8500->mask[i];
while (latch_val) {
int_bit = __ffs(latch_val);
for (i = 0; i < ab8500->mask_size; i++)
if (ab8500->irq_reg_offset[i] == latch_offset)
break;
if (i >= ab8500->mask_size) {
dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
latch_offset);
return -ENXIO;
}
line = (i << 3) + int_bit;
latch_val &= ~(1 << int_bit);
@ -491,7 +492,7 @@ static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
line += 1;
handle_nested_irq(ab8500->irq_base + line);
} while (latch_val);
}
return 0;
}
@ -1107,6 +1108,7 @@ static struct mfd_cell ab8500_devs[] = {
},
{
.name = "ab8500-usb",
.of_compatible = "stericsson,ab8500-usb",
.num_resources = ARRAY_SIZE(ab8500_usb_resources),
.resources = ab8500_usb_resources,
},

2
drivers/mfd/ab8500-gpadc.c
View File

@ -332,7 +332,7 @@ if (ad_value < 0) {
return voltage;
}
EXPORT_SYMBOL(ab8500_gpadc_convert);
EXPORT_SYMBOL(ab8500_gpadc_sw_hw_convert);
/**
* ab8500_gpadc_read_raw() - gpadc read

2
drivers/mfd/ab8500-sysctrl.c
View File

@ -242,7 +242,7 @@ static int __init ab8500_sysctrl_init(void)
{
return platform_driver_register(&ab8500_sysctrl_driver);
}
subsys_initcall(ab8500_sysctrl_init);
arch_initcall(ab8500_sysctrl_init);
MODULE_AUTHOR("Mattias Nilsson <mattias.i.nilsson@stericsson.com");
MODULE_DESCRIPTION("AB8500 system control driver");

20
drivers/mfd/adp5520.c
View File

@ -36,6 +36,7 @@ struct adp5520_chip {
struct blocking_notifier_head notifier_list;
int irq;
unsigned long id;
uint8_t mode;
};
static int __adp5520_read(struct i2c_client *client,
@ -326,7 +327,10 @@ static int adp5520_suspend(struct device *dev)
struct i2c_client *client = to_i2c_client(dev);
struct adp5520_chip *chip = dev_get_drvdata(&client->dev);
adp5520_clr_bits(chip->dev, ADP5520_MODE_STATUS, ADP5520_nSTNBY);
adp5520_read(chip->dev, ADP5520_MODE_STATUS, &chip->mode);
/* All other bits are W1C */
chip->mode &= ADP5520_BL_EN | ADP5520_DIM_EN | ADP5520_nSTNBY;
adp5520_write(chip->dev, ADP5520_MODE_STATUS, 0);
return 0;
}
@ -335,7 +339,7 @@ static int adp5520_resume(struct device *dev)
struct i2c_client *client = to_i2c_client(dev);
struct adp5520_chip *chip = dev_get_drvdata(&client->dev);
adp5520_set_bits(chip->dev, ADP5520_MODE_STATUS, ADP5520_nSTNBY);
adp5520_write(chip->dev, ADP5520_MODE_STATUS, chip->mode);
return 0;
}
#endif
@ -360,17 +364,7 @@ static struct i2c_driver adp5520_driver = {
.id_table = adp5520_id,
};
static int __init adp5520_init(void)
{
return i2c_add_driver(&adp5520_driver);
}
module_init(adp5520_init);
static void __exit adp5520_exit(void)
{
i2c_del_driver(&adp5520_driver);
}
module_exit(adp5520_exit);
module_i2c_driver(adp5520_driver);
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
MODULE_DESCRIPTION("ADP5520(01) PMIC-MFD Driver");

269
drivers/mfd/arizona-core.c
View File

@ -39,11 +39,21 @@ int arizona_clk32k_enable(struct arizona *arizona)
arizona->clk32k_ref++;
if (arizona->clk32k_ref == 1)
if (arizona->clk32k_ref == 1) {
switch (arizona->pdata.clk32k_src) {
case ARIZONA_32KZ_MCLK1:
ret = pm_runtime_get_sync(arizona->dev);
if (ret != 0)
goto out;
break;
}
ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
ARIZONA_CLK_32K_ENA,
ARIZONA_CLK_32K_ENA);
}
out:
if (ret != 0)
arizona->clk32k_ref--;
@ -63,10 +73,17 @@ int arizona_clk32k_disable(struct arizona *arizona)
arizona->clk32k_ref--;
if (arizona->clk32k_ref == 0)
if (arizona->clk32k_ref == 0) {
regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
ARIZONA_CLK_32K_ENA, 0);
switch (arizona->pdata.clk32k_src) {
case ARIZONA_32KZ_MCLK1:
pm_runtime_put_sync(arizona->dev);
break;
}
}
mutex_unlock(&arizona->clk_lock);
return ret;
@ -179,42 +196,134 @@ static irqreturn_t arizona_overclocked(int irq, void *data)
return IRQ_HANDLED;
}
static int arizona_poll_reg(struct arizona *arizona,
int timeout, unsigned int reg,
unsigned int mask, unsigned int target)
{
unsigned int val = 0;
int ret, i;
for (i = 0; i < timeout; i++) {
ret = regmap_read(arizona->regmap, reg, &val);
if (ret != 0) {
dev_err(arizona->dev, "Failed to read reg %u: %d\n",
reg, ret);
continue;
}
if ((val & mask) == target)
return 0;
msleep(1);
}
dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
return -ETIMEDOUT;
}
static int arizona_wait_for_boot(struct arizona *arizona)
{
unsigned int reg;
int ret, i;
int ret;
/*
* We can't use an interrupt as we need to runtime resume to do so,
* we won't race with the interrupt handler as it'll be blocked on
* runtime resume.
*/
for (i = 0; i < 5; i++) {
msleep(1);
ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
ret = regmap_read(arizona->regmap,
ARIZONA_INTERRUPT_RAW_STATUS_5, &reg);
if (ret != 0) {
dev_err(arizona->dev, "Failed to read boot state: %d\n",
ret);
continue;
}
if (reg & ARIZONA_BOOT_DONE_STS)
break;
}
if (reg & ARIZONA_BOOT_DONE_STS) {
if (!ret)
regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
ARIZONA_BOOT_DONE_STS);
} else {
dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
return -ETIMEDOUT;
}
pm_runtime_mark_last_busy(arizona->dev);
return 0;
return ret;
}
static int arizona_apply_hardware_patch(struct arizona* arizona)
{
unsigned int fll, sysclk;
int ret, err;
regcache_cache_bypass(arizona->regmap, true);
/* Cache existing FLL and SYSCLK settings */
ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
if (ret != 0) {
dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
ret);
return ret;
}
ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
if (ret != 0) {
dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
ret);
return ret;
}
/* Start up SYSCLK using the FLL in free running mode */
ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
if (ret != 0) {
dev_err(arizona->dev,
"Failed to start FLL in freerunning mode: %d\n",
ret);
return ret;
}
ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
ARIZONA_FLL1_CLOCK_OK_STS,
ARIZONA_FLL1_CLOCK_OK_STS);
if (ret != 0) {
ret = -ETIMEDOUT;
goto err_fll;
}
ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
if (ret != 0) {
dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
goto err_fll;
}
/* Start the write sequencer and wait for it to finish */
ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
if (ret != 0) {
dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
ret);
goto err_sysclk;
}
ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
ARIZONA_WSEQ_BUSY, 0);
if (ret != 0) {
regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
ARIZONA_WSEQ_ABORT);
ret = -ETIMEDOUT;
}
err_sysclk:
err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
if (err != 0) {
dev_err(arizona->dev,
"Failed to re-apply old SYSCLK settings: %d\n",
err);
}
err_fll:
err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
if (err != 0) {
dev_err(arizona->dev,
"Failed to re-apply old FLL settings: %d\n",
err);
}
regcache_cache_bypass(arizona->regmap, false);
if (ret != 0)
return ret;
else
return err;
}
#ifdef CONFIG_PM_RUNTIME
@ -233,20 +342,44 @@ static int arizona_runtime_resume(struct device *dev)
regcache_cache_only(arizona->regmap, false);
ret = arizona_wait_for_boot(arizona);
if (ret != 0) {
regulator_disable(arizona->dcvdd);
return ret;
switch (arizona->type) {
case WM5102:
ret = wm5102_patch(arizona);
if (ret != 0) {
dev_err(arizona->dev, "Failed to apply patch: %d\n",
ret);
goto err;
}
ret = arizona_apply_hardware_patch(arizona);
if (ret != 0) {
dev_err(arizona->dev,
"Failed to apply hardware patch: %d\n",
ret);
goto err;
}
break;
default:
ret = arizona_wait_for_boot(arizona);
if (ret != 0) {
goto err;
}
break;
}
ret = regcache_sync(arizona->regmap);
if (ret != 0) {
dev_err(arizona->dev, "Failed to restore register cache\n");
regulator_disable(arizona->dcvdd);
return ret;
goto err;
}
return 0;
err:
regcache_cache_only(arizona->regmap, true);
regulator_disable(arizona->dcvdd);
return ret;
}
static int arizona_runtime_suspend(struct device *dev)
@ -371,6 +504,17 @@ int arizona_dev_init(struct arizona *arizona)
goto err_early;
}
if (arizona->pdata.reset) {
/* Start out with /RESET low to put the chip into reset */
ret = gpio_request_one(arizona->pdata.reset,
GPIOF_DIR_OUT | GPIOF_INIT_LOW,
"arizona /RESET");
if (ret != 0) {
dev_err(dev, "Failed to request /RESET: %d\n", ret);
goto err_early;
}
}
ret = regulator_bulk_enable(arizona->num_core_supplies,
arizona->core_supplies);
if (ret != 0) {
@ -386,16 +530,8 @@ int arizona_dev_init(struct arizona *arizona)
}
if (arizona->pdata.reset) {
/* Start out with /RESET low to put the chip into reset */
ret = gpio_request_one(arizona->pdata.reset,
GPIOF_DIR_OUT | GPIOF_INIT_LOW,
"arizona /RESET");
if (ret != 0) {
dev_err(dev, "Failed to request /RESET: %d\n", ret);
goto err_dcvdd;
}
gpio_set_value_cansleep(arizona->pdata.reset, 1);
msleep(1);
}
regcache_cache_only(arizona->regmap, false);
@ -424,6 +560,7 @@ int arizona_dev_init(struct arizona *arizona)
arizona->type = WM5102;
}
apply_patch = wm5102_patch;
arizona->rev &= 0x7;
break;
#endif
#ifdef CONFIG_MFD_WM5110
@ -454,6 +591,8 @@ int arizona_dev_init(struct arizona *arizona)
goto err_reset;
}
msleep(1);
ret = regcache_sync(arizona->regmap);
if (ret != 0) {
dev_err(dev, "Failed to sync device: %d\n", ret);
@ -461,10 +600,24 @@ int arizona_dev_init(struct arizona *arizona)
}
}
ret = arizona_wait_for_boot(arizona);
if (ret != 0) {
dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
goto err_reset;
switch (arizona->type) {
case WM5102:
ret = regmap_read(arizona->regmap, 0x19, &val);
if (ret != 0)
dev_err(dev,
"Failed to check write sequencer state: %d\n",
ret);
else if (val & 0x01)
break;
/* Fall through */
default:
ret = arizona_wait_for_boot(arizona);
if (ret != 0) {
dev_err(arizona->dev,
"Device failed initial boot: %d\n", ret);
goto err_reset;
}
break;
}
if (apply_patch) {
@ -474,6 +627,20 @@ int arizona_dev_init(struct arizona *arizona)
ret);
goto err_reset;
}
switch (arizona->type) {
case WM5102:
ret = arizona_apply_hardware_patch(arizona);
if (ret != 0) {
dev_err(arizona->dev,
"Failed to apply hardware patch: %d\n",
ret);
goto err_reset;
}
break;
default:
break;
}
}
for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
@ -498,6 +665,7 @@ int arizona_dev_init(struct arizona *arizona)
regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
ARIZONA_CLK_32K_SRC_MASK,
arizona->pdata.clk32k_src - 1);
arizona_clk32k_enable(arizona);
break;
case ARIZONA_32KZ_NONE:
regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
@ -511,10 +679,16 @@ int arizona_dev_init(struct arizona *arizona)
}
for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
if (!arizona->pdata.micbias[i].mV)
if (!arizona->pdata.micbias[i].mV &&
!arizona->pdata.micbias[i].bypass)
continue;
/* Apply default for bypass mode */
if (!arizona->pdata.micbias[i].mV)
arizona->pdata.micbias[i].mV = 2800;
val = (arizona->pdata.micbias[i].mV - 1500) / 100;
val <<= ARIZONA_MICB1_LVL_SHIFT;
if (arizona->pdata.micbias[i].ext_cap)
@ -526,10 +700,14 @@ int arizona_dev_init(struct arizona *arizona)
if (arizona->pdata.micbias[i].fast_start)
val |= ARIZONA_MICB1_RATE;
if (arizona->pdata.micbias[i].bypass)
val |= ARIZONA_MICB1_BYPASS;
regmap_update_bits(arizona->regmap,
ARIZONA_MIC_BIAS_CTRL_1 + i,
ARIZONA_MICB1_LVL_MASK |
ARIZONA_MICB1_DISCH |
ARIZONA_MICB1_BYPASS |
ARIZONA_MICB1_RATE, val);
}
@ -610,10 +788,9 @@ err_irq:
arizona_irq_exit(arizona);
err_reset:
if (arizona->pdata.reset) {
gpio_set_value_cansleep(arizona->pdata.reset, 1);
gpio_set_value_cansleep(arizona->pdata.reset, 0);
gpio_free(arizona->pdata.reset);
}
err_dcvdd:
regulator_disable(arizona->dcvdd);
err_enable:
regulator_bulk_disable(arizona->num_core_supplies,

106
drivers/mfd/arizona-irq.c
View File

@ -94,6 +94,7 @@ static irqreturn_t arizona_ctrlif_err(int irq, void *data)
static irqreturn_t arizona_irq_thread(int irq, void *data)
{
struct arizona *arizona = data;
bool poll;
unsigned int val;
int ret;
@ -103,20 +104,39 @@ static irqreturn_t arizona_irq_thread(int irq, void *data)
return IRQ_NONE;
}
/* Always handle the AoD domain */
handle_nested_irq(irq_find_mapping(arizona->virq, 0));
do {
poll = false;
/*
* Check if one of the main interrupts is asserted and only
* check that domain if it is.
*/
ret = regmap_read(arizona->regmap, ARIZONA_IRQ_PIN_STATUS, &val);
if (ret == 0 && val & ARIZONA_IRQ1_STS) {
handle_nested_irq(irq_find_mapping(arizona->virq, 1));
} else if (ret != 0) {
dev_err(arizona->dev, "Failed to read main IRQ status: %d\n",
ret);
}
/* Always handle the AoD domain */
handle_nested_irq(irq_find_mapping(arizona->virq, 0));
/*
* Check if one of the main interrupts is asserted and only
* check that domain if it is.
*/
ret = regmap_read(arizona->regmap, ARIZONA_IRQ_PIN_STATUS,
&val);
if (ret == 0 && val & ARIZONA_IRQ1_STS) {
handle_nested_irq(irq_find_mapping(arizona->virq, 1));
} else if (ret != 0) {
dev_err(arizona->dev,
"Failed to read main IRQ status: %d\n", ret);
}
/*
* Poll the IRQ pin status to see if we're really done
* if the interrupt controller can't do it for us.
*/
if (!arizona->pdata.irq_gpio) {
break;
} else if (arizona->pdata.irq_flags & IRQF_TRIGGER_RISING &&
gpio_get_value_cansleep(arizona->pdata.irq_gpio)) {
poll = true;
} else if (arizona->pdata.irq_flags & IRQF_TRIGGER_FALLING &&
!gpio_get_value_cansleep(arizona->pdata.irq_gpio)) {
poll = true;
}
} while (poll);
pm_runtime_mark_last_busy(arizona->dev);
pm_runtime_put_autosuspend(arizona->dev);
@ -169,6 +189,7 @@ int arizona_irq_init(struct arizona *arizona)
int ret, i;
const struct regmap_irq_chip *aod, *irq;
bool ctrlif_error = true;
struct irq_data *irq_data;
switch (arizona->type) {
#ifdef CONFIG_MFD_WM5102
@ -192,7 +213,36 @@ int arizona_irq_init(struct arizona *arizona)
return -EINVAL;
}
if (arizona->pdata.irq_active_high) {
/* Disable all wake sources by default */
regmap_write(arizona->regmap, ARIZONA_WAKE_CONTROL, 0);
/* Read the flags from the interrupt controller if not specified */
if (!arizona->pdata.irq_flags) {
irq_data = irq_get_irq_data(arizona->irq);
if (!irq_data) {
dev_err(arizona->dev, "Invalid IRQ: %d\n",
arizona->irq);
return -EINVAL;
}
arizona->pdata.irq_flags = irqd_get_trigger_type(irq_data);
switch (arizona->pdata.irq_flags) {
case IRQF_TRIGGER_LOW:
case IRQF_TRIGGER_HIGH:
case IRQF_TRIGGER_RISING:
case IRQF_TRIGGER_FALLING:
break;
case IRQ_TYPE_NONE:
default:
/* Device default */
arizona->pdata.irq_flags = IRQF_TRIGGER_LOW;
break;
}
}
if (arizona->pdata.irq_flags & (IRQF_TRIGGER_HIGH |
IRQF_TRIGGER_RISING)) {
ret = regmap_update_bits(arizona->regmap, ARIZONA_IRQ_CTRL_1,
ARIZONA_IRQ_POL, 0);
if (ret != 0) {
@ -200,12 +250,10 @@ int arizona_irq_init(struct arizona *arizona)
ret);
goto err;
}
flags |= IRQF_TRIGGER_HIGH;
} else {
flags |= IRQF_TRIGGER_LOW;
}
flags |= arizona->pdata.irq_flags;
/* Allocate a virtual IRQ domain to distribute to the regmap domains */
arizona->virq = irq_domain_add_linear(NULL, 2, &arizona_domain_ops,
arizona);
@ -257,11 +305,31 @@ int arizona_irq_init(struct arizona *arizona)
}
}
/* Used to emulate edge trigger and to work around broken pinmux */
if (arizona->pdata.irq_gpio) {
if (gpio_to_irq(arizona->pdata.irq_gpio) != arizona->irq) {
dev_warn(arizona->dev, "IRQ %d is not GPIO %d (%d)\n",
arizona->irq, arizona->pdata.irq_gpio,
gpio_to_irq(arizona->pdata.irq_gpio));
arizona->irq = gpio_to_irq(arizona->pdata.irq_gpio);
}
ret = devm_gpio_request_one(arizona->dev,
arizona->pdata.irq_gpio,
GPIOF_IN, "arizona IRQ");
if (ret != 0) {
dev_err(arizona->dev,
"Failed to request IRQ GPIO %d:: %d\n",
arizona->pdata.irq_gpio, ret);
arizona->pdata.irq_gpio = 0;
}
}
ret = request_threaded_irq(arizona->irq, NULL, arizona_irq_thread,
flags, "arizona", arizona);
if (ret != 0) {
dev_err(arizona->dev, "Failed to request IRQ %d: %d\n",
dev_err(arizona->dev, "Failed to request primary IRQ %d: %d\n",
arizona->irq, ret);
goto err_main_irq;
}

2
drivers/mfd/arizona-spi.c
View File

@ -67,7 +67,7 @@ static int arizona_spi_probe(struct spi_device *spi)
static int arizona_spi_remove(struct spi_device *spi)
{
struct arizona *arizona = dev_get_drvdata(&spi->dev);
struct arizona *arizona = spi_get_drvdata(spi);
arizona_dev_exit(arizona);
return 0;
}

27
drivers/mfd/as3711.c
View File

@ -112,16 +112,34 @@ static const struct regmap_config as3711_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
#ifdef CONFIG_OF
static struct of_device_id as3711_of_match[] = {
{.compatible = "ams,as3711",},
{}
};
MODULE_DEVICE_TABLE(of, as3711_of_match);
#endif
static int as3711_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct as3711 *as3711;
struct as3711_platform_data *pdata = client->dev.platform_data;
struct as3711_platform_data *pdata;
unsigned int id1, id2;
int ret;
if (!pdata)
dev_dbg(&client->dev, "Platform data not found\n");
if (!client->dev.of_node) {
pdata = client->dev.platform_data;
if (!pdata)
dev_dbg(&client->dev, "Platform data not found\n");
} else {
pdata = devm_kzalloc(&client->dev,
sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
dev_err(&client->dev, "Failed to allocate pdata\n");
return -ENOMEM;
}
}
as3711 = devm_kzalloc(&client->dev, sizeof(struct as3711), GFP_KERNEL);
if (!as3711) {
@ -193,7 +211,8 @@ static struct i2c_driver as3711_i2c_driver = {
.driver = {
.name = "as3711",
.owner = THIS_MODULE,
},
.of_match_table = of_match_ptr(as3711_of_match),
},
.probe = as3711_i2c_probe,
.remove = as3711_i2c_remove,
.id_table = as3711_i2c_id,

196
drivers/mfd/cros_ec.c Normal file
View File

@ -0,0 +1,196 @@
/*
* ChromeOS EC multi-function device
*
* Copyright (C) 2012 Google, Inc
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* The ChromeOS EC multi function device is used to mux all the requests
* to the EC device for its multiple features: keyboard controller,
* battery charging and regulator control, firmware update.
*/
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mfd/core.h>
#include <linux/mfd/cros_ec.h>
#include <linux/mfd/cros_ec_commands.h>
int cros_ec_prepare_tx(struct cros_ec_device *ec_dev,
struct cros_ec_msg *msg)
{
uint8_t *out;
int csum, i;
BUG_ON(msg->out_len > EC_HOST_PARAM_SIZE);
out = ec_dev->dout;
out[0] = EC_CMD_VERSION0 + msg->version;
out[1] = msg->cmd;
out[2] = msg->out_len;
csum = out[0] + out[1] + out[2];
for (i = 0; i < msg->out_len; i++)
csum += out[EC_MSG_TX_HEADER_BYTES + i] = msg->out_buf[i];
out[EC_MSG_TX_HEADER_BYTES + msg->out_len] = (uint8_t)(csum & 0xff);
return EC_MSG_TX_PROTO_BYTES + msg->out_len;
}
EXPORT_SYMBOL(cros_ec_prepare_tx);
static int cros_ec_command_sendrecv(struct cros_ec_device *ec_dev,
uint16_t cmd, void *out_buf, int out_len,
void *in_buf, int in_len)
{
struct cros_ec_msg msg;
msg.version = cmd >> 8;
msg.cmd = cmd & 0xff;
msg.out_buf = out_buf;
msg.out_len = out_len;
msg.in_buf = in_buf;
msg.in_len = in_len;
return ec_dev->command_xfer(ec_dev, &msg);
}
static int cros_ec_command_recv(struct cros_ec_device *ec_dev,
uint16_t cmd, void *buf, int buf_len)
{
return cros_ec_command_sendrecv(ec_dev, cmd, NULL, 0, buf, buf_len);
}
static int cros_ec_command_send(struct cros_ec_device *ec_dev,
uint16_t cmd, void *buf, int buf_len)
{
return cros_ec_command_sendrecv(ec_dev, cmd, buf, buf_len, NULL, 0);
}
static irqreturn_t ec_irq_thread(int irq, void *data)
{
struct cros_ec_device *ec_dev = data;
if (device_may_wakeup(ec_dev->dev))
pm_wakeup_event(ec_dev->dev, 0);
blocking_notifier_call_chain(&ec_dev->event_notifier, 1, ec_dev);
return IRQ_HANDLED;
}
static struct mfd_cell cros_devs[] = {
{
.name = "cros-ec-keyb",
.id = 1,
.of_compatible = "google,cros-ec-keyb",
},
};
int cros_ec_register(struct cros_ec_device *ec_dev)
{
struct device *dev = ec_dev->dev;
int err = 0;
BLOCKING_INIT_NOTIFIER_HEAD(&ec_dev->event_notifier);
ec_dev->command_send = cros_ec_command_send;
ec_dev->command_recv = cros_ec_command_recv;
ec_dev->command_sendrecv = cros_ec_command_sendrecv;
if (ec_dev->din_size) {
ec_dev->din = kmalloc(ec_dev->din_size, GFP_KERNEL);
if (!ec_dev->din) {
err = -ENOMEM;
goto fail_din;
}
}
if (ec_dev->dout_size) {
ec_dev->dout = kmalloc(ec_dev->dout_size, GFP_KERNEL);
if (!ec_dev->dout) {
err = -ENOMEM;
goto fail_dout;
}
}
if (!ec_dev->irq) {
dev_dbg(dev, "no valid IRQ: %d\n", ec_dev->irq);
goto fail_irq;
}
err = request_threaded_irq(ec_dev->irq, NULL, ec_irq_thread,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
"chromeos-ec", ec_dev);
if (err) {
dev_err(dev, "request irq %d: error %d\n", ec_dev->irq, err);
goto fail_irq;
}
err = mfd_add_devices(dev, 0, cros_devs,
ARRAY_SIZE(cros_devs),
NULL, ec_dev->irq, NULL);
if (err) {
dev_err(dev, "failed to add mfd devices\n");
goto fail_mfd;
}
dev_info(dev, "Chrome EC (%s)\n", ec_dev->name);
return 0;
fail_mfd:
free_irq(ec_dev->irq, ec_dev);
fail_irq:
kfree(ec_dev->dout);
fail_dout:
kfree(ec_dev->din);
fail_din:
return err;
}
EXPORT_SYMBOL(cros_ec_register);
int cros_ec_remove(struct cros_ec_device *ec_dev)
{
mfd_remove_devices(ec_dev->dev);
free_irq(ec_dev->irq, ec_dev);
kfree(ec_dev->dout);
kfree(ec_dev->din);
return 0;
}
EXPORT_SYMBOL(cros_ec_remove);
#ifdef CONFIG_PM_SLEEP
int cros_ec_suspend(struct cros_ec_device *ec_dev)
{
struct device *dev = ec_dev->dev;
if (device_may_wakeup(dev))
ec_dev->wake_enabled = !enable_irq_wake(ec_dev->irq);
disable_irq(ec_dev->irq);
ec_dev->was_wake_device = ec_dev->wake_enabled;
return 0;
}
EXPORT_SYMBOL(cros_ec_suspend);
int cros_ec_resume(struct cros_ec_device *ec_dev)
{
enable_irq(ec_dev->irq);
if (ec_dev->wake_enabled) {
disable_irq_wake(ec_dev->irq);
ec_dev->wake_enabled = 0;
}
return 0;
}
EXPORT_SYMBOL(cros_ec_resume);
#endif

201
drivers/mfd/cros_ec_i2c.c Normal file
View File

@ -0,0 +1,201 @@
/*
* ChromeOS EC multi-function device (I2C)
*
* Copyright (C) 2012 Google, Inc
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/mfd/cros_ec.h>
#include <linux/mfd/cros_ec_commands.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
static inline struct cros_ec_device *to_ec_dev(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
return i2c_get_clientdata(client);
}
static int cros_ec_command_xfer(struct cros_ec_device *ec_dev,
struct cros_ec_msg *msg)
{
struct i2c_client *client = ec_dev->priv;
int ret = -ENOMEM;
int i;
int packet_len;
u8 *out_buf = NULL;
u8 *in_buf = NULL;
u8 sum;
struct i2c_msg i2c_msg[2];
i2c_msg[0].addr = client->addr;
i2c_msg[0].flags = 0;
i2c_msg[1].addr = client->addr;
i2c_msg[1].flags = I2C_M_RD;
/*
* allocate larger packet (one byte for checksum, one byte for
* length, and one for result code)
*/
packet_len = msg->in_len + 3;
in_buf = kzalloc(packet_len, GFP_KERNEL);
if (!in_buf)
goto done;
i2c_msg[1].len = packet_len;
i2c_msg[1].buf = (char *)in_buf;
/*
* allocate larger packet (one byte for checksum, one for
* command code, one for length, and one for command version)
*/
packet_len = msg->out_len + 4;
out_buf = kzalloc(packet_len, GFP_KERNEL);
if (!out_buf)
goto done;
i2c_msg[0].len = packet_len;
i2c_msg[0].buf = (char *)out_buf;
out_buf[0] = EC_CMD_VERSION0 + msg->version;
out_buf[1] = msg->cmd;
out_buf[2] = msg->out_len;
/* copy message payload and compute checksum */
sum = out_buf[0] + out_buf[1] + out_buf[2];
for (i = 0; i < msg->out_len; i++) {
out_buf[3 + i] = msg->out_buf[i];
sum += out_buf[3 + i];
}
out_buf[3 + msg->out_len] = sum;
/* send command to EC and read answer */
ret = i2c_transfer(client->adapter, i2c_msg, 2);
if (ret < 0) {
dev_err(ec_dev->dev, "i2c transfer failed: %d\n", ret);
goto done;
} else if (ret != 2) {
dev_err(ec_dev->dev, "failed to get response: %d\n", ret);
ret = -EIO;
goto done;
}
/* check response error code */
if (i2c_msg[1].buf[0]) {
dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n",
msg->cmd, i2c_msg[1].buf[0]);
ret = -EINVAL;
goto done;
}
/* copy response packet payload and compute checksum */
sum = in_buf[0] + in_buf[1];
for (i = 0; i < msg->in_len; i++) {
msg->in_buf[i] = in_buf[2 + i];
sum += in_buf[2 + i];
}
dev_dbg(ec_dev->dev, "packet: %*ph, sum = %02x\n",
i2c_msg[1].len, in_buf, sum);
if (sum != in_buf[2 + msg->in_len]) {
dev_err(ec_dev->dev, "bad packet checksum\n");
ret = -EBADMSG;
goto done;
}
ret = 0;
done:
kfree(in_buf);
kfree(out_buf);
return ret;
}
static int cros_ec_probe_i2c(struct i2c_client *client,
const struct i2c_device_id *dev_id)
{
struct device *dev = &client->dev;
struct cros_ec_device *ec_dev = NULL;
int err;
ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
if (!ec_dev)
return -ENOMEM;
i2c_set_clientdata(client, ec_dev);
ec_dev->name = "I2C";
ec_dev->dev = dev;
ec_dev->priv = client;
ec_dev->irq = client->irq;
ec_dev->command_xfer = cros_ec_command_xfer;
ec_dev->ec_name = client->name;
ec_dev->phys_name = client->adapter->name;
ec_dev->parent = &client->dev;
err = cros_ec_register(ec_dev);
if (err) {
dev_err(dev, "cannot register EC\n");
return err;
}
return 0;
}
static int cros_ec_remove_i2c(struct i2c_client *client)
{
struct cros_ec_device *ec_dev = i2c_get_clientdata(client);
cros_ec_remove(ec_dev);
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int cros_ec_i2c_suspend(struct device *dev)
{
struct cros_ec_device *ec_dev = to_ec_dev(dev);
return cros_ec_suspend(ec_dev);
}
static int cros_ec_i2c_resume(struct device *dev)
{
struct cros_ec_device *ec_dev = to_ec_dev(dev);
return cros_ec_resume(ec_dev);
}
#endif
static SIMPLE_DEV_PM_OPS(cros_ec_i2c_pm_ops, cros_ec_i2c_suspend,
cros_ec_i2c_resume);
static const struct i2c_device_id cros_ec_i2c_id[] = {
{ "cros-ec-i2c", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, cros_ec_i2c_id);
static struct i2c_driver cros_ec_driver = {
.driver = {
.name = "cros-ec-i2c",
.owner = THIS_MODULE,
.pm = &cros_ec_i2c_pm_ops,
},
.probe = cros_ec_probe_i2c,
.remove = cros_ec_remove_i2c,
.id_table = cros_ec_i2c_id,
};
module_i2c_driver(cros_ec_driver);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("ChromeOS EC multi function device");

375
drivers/mfd/cros_ec_spi.c Normal file
View File

@ -0,0 +1,375 @@
/*
* ChromeOS EC multi-function device (SPI)
*
* Copyright (C) 2012 Google, Inc
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mfd/cros_ec.h>
#include <linux/mfd/cros_ec_commands.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
/* The header byte, which follows the preamble */
#define EC_MSG_HEADER 0xec
/*
* Number of EC preamble bytes we read at a time. Since it takes
* about 400-500us for the EC to respond there is not a lot of
* point in tuning this. If the EC could respond faster then
* we could increase this so that might expect the preamble and
* message to occur in a single transaction. However, the maximum
* SPI transfer size is 256 bytes, so at 5MHz we need a response
* time of perhaps <320us (200 bytes / 1600 bits).
*/
#define EC_MSG_PREAMBLE_COUNT 32
/*
* We must get a response from the EC in 5ms. This is a very long
* time, but the flash write command can take 2-3ms. The EC command
* processing is currently not very fast (about 500us). We could
* look at speeding this up and making the flash write command a
* 'slow' command, requiring a GET_STATUS wait loop, like flash
* erase.
*/
#define EC_MSG_DEADLINE_MS 5
/*
* Time between raising the SPI chip select (for the end of a
* transaction) and dropping it again (for the next transaction).
* If we go too fast, the EC will miss the transaction. It seems
* that 50us is enough with the 16MHz STM32 EC.
*/
#define EC_SPI_RECOVERY_TIME_NS (50 * 1000)
/**
* struct cros_ec_spi - information about a SPI-connected EC
*
* @spi: SPI device we are connected to
* @last_transfer_ns: time that we last finished a transfer, or 0 if there
* if no record
*/
struct cros_ec_spi {
struct spi_device *spi;
s64 last_transfer_ns;
};
static void debug_packet(struct device *dev, const char *name, u8 *ptr,
int len)
{
#ifdef DEBUG
int i;
dev_dbg(dev, "%s: ", name);
for (i = 0; i < len; i++)
dev_cont(dev, " %02x", ptr[i]);
#endif
}
/**
* cros_ec_spi_receive_response - Receive a response from the EC.
*
* This function has two phases: reading the preamble bytes (since if we read
* data from the EC before it is ready to send, we just get preamble) and
* reading the actual message.
*
* The received data is placed into ec_dev->din.
*
* @ec_dev: ChromeOS EC device
* @need_len: Number of message bytes we need to read
*/
static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
int need_len)
{
struct cros_ec_spi *ec_spi = ec_dev->priv;
struct spi_transfer trans;
struct spi_message msg;
u8 *ptr, *end;
int ret;
unsigned long deadline;
int todo;
/* Receive data until we see the header byte */
deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
do {
memset(&trans, '\0', sizeof(trans));
trans.cs_change = 1;
trans.rx_buf = ptr = ec_dev->din;
trans.len = EC_MSG_PREAMBLE_COUNT;
spi_message_init(&msg);
spi_message_add_tail(&trans, &msg);
ret = spi_sync(ec_spi->spi, &msg);
if (ret < 0) {
dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
return ret;
}
for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
if (*ptr == EC_MSG_HEADER) {
dev_dbg(ec_dev->dev, "msg found at %ld\n",
ptr - ec_dev->din);
break;
}
}
if (time_after(jiffies, deadline)) {
dev_warn(ec_dev->dev, "EC failed to respond in time\n");
return -ETIMEDOUT;
}
} while (ptr == end);
/*
* ptr now points to the header byte. Copy any valid data to the
* start of our buffer
*/
todo = end - ++ptr;
BUG_ON(todo < 0 || todo > ec_dev->din_size);
todo = min(todo, need_len);
memmove(ec_dev->din, ptr, todo);
ptr = ec_dev->din + todo;
dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
need_len, todo);
need_len -= todo;
/* Receive data until we have it all */
while (need_len > 0) {
/*
* We can't support transfers larger than the SPI FIFO size
* unless we have DMA. We don't have DMA on the ISP SPI ports
* for Exynos. We need a way of asking SPI driver for
* maximum-supported transfer size.
*/
todo = min(need_len, 256);
dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%ld\n",
todo, need_len, ptr - ec_dev->din);
memset(&trans, '\0', sizeof(trans));
trans.cs_change = 1;
trans.rx_buf = ptr;
trans.len = todo;
spi_message_init(&msg);
spi_message_add_tail(&trans, &msg);
/* send command to EC and read answer */
BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo >
ec_dev->din_size);
ret = spi_sync(ec_spi->spi, &msg);
if (ret < 0) {
dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
return ret;
}
debug_packet(ec_dev->dev, "interim", ptr, todo);
ptr += todo;
need_len -= todo;
}
dev_dbg(ec_dev->dev, "loop done, ptr=%ld\n", ptr - ec_dev->din);
return 0;
}
/**
* cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply
*
* @ec_dev: ChromeOS EC device
* @ec_msg: Message to transfer
*/
static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev,
struct cros_ec_msg *ec_msg)
{
struct cros_ec_spi *ec_spi = ec_dev->priv;
struct spi_transfer trans;
struct spi_message msg;
int i, len;
u8 *ptr;
int sum;
int ret = 0, final_ret;
struct timespec ts;
len = cros_ec_prepare_tx(ec_dev, ec_msg);
dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
/* If it's too soon to do another transaction, wait */
if (ec_spi->last_transfer_ns) {
struct timespec ts;
unsigned long delay; /* The delay completed so far */
ktime_get_ts(&ts);
delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns;
if (delay < EC_SPI_RECOVERY_TIME_NS)
ndelay(delay);
}
/* Transmit phase - send our message */
debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
memset(&trans, '\0', sizeof(trans));
trans.tx_buf = ec_dev->dout;
trans.len = len;
trans.cs_change = 1;
spi_message_init(&msg);
spi_message_add_tail(&trans, &msg);
ret = spi_sync(ec_spi->spi, &msg);
/* Get the response */
if (!ret) {
ret = cros_ec_spi_receive_response(ec_dev,
ec_msg->in_len + EC_MSG_TX_PROTO_BYTES);
} else {
dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
}
/* turn off CS */
spi_message_init(&msg);
final_ret = spi_sync(ec_spi->spi, &msg);
ktime_get_ts(&ts);
ec_spi->last_transfer_ns = timespec_to_ns(&ts);
if (!ret)
ret = final_ret;
if (ret < 0) {
dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
return ret;
}
/* check response error code */
ptr = ec_dev->din;
if (ptr[0]) {
dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n",
ec_msg->cmd, ptr[0]);
debug_packet(ec_dev->dev, "in_err", ptr, len);
return -EINVAL;
}
len = ptr[1];
sum = ptr[0] + ptr[1];
if (len > ec_msg->in_len) {
dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
len, ec_msg->in_len);
return -ENOSPC;
}
/* copy response packet payload and compute checksum */
for (i = 0; i < len; i++) {
sum += ptr[i + 2];
if (ec_msg->in_len)
ec_msg->in_buf[i] = ptr[i + 2];
}
sum &= 0xff;
debug_packet(ec_dev->dev, "in", ptr, len + 3);
if (sum != ptr[len + 2]) {
dev_err(ec_dev->dev,
"bad packet checksum, expected %02x, got %02x\n",
sum, ptr[len + 2]);
return -EBADMSG;
}
return 0;
}
static int cros_ec_probe_spi(struct spi_device *spi)
{
struct device *dev = &spi->dev;
struct cros_ec_device *ec_dev;
struct cros_ec_spi *ec_spi;
int err;
spi->bits_per_word = 8;
spi->mode = SPI_MODE_0;
err = spi_setup(spi);
if (err < 0)
return err;
ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
if (ec_spi == NULL)
return -ENOMEM;
ec_spi->spi = spi;
ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
if (!ec_dev)
return -ENOMEM;
spi_set_drvdata(spi, ec_dev);
ec_dev->name = "SPI";
ec_dev->dev = dev;
ec_dev->priv = ec_spi;
ec_dev->irq = spi->irq;
ec_dev->command_xfer = cros_ec_command_spi_xfer;
ec_dev->ec_name = ec_spi->spi->modalias;
ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
ec_dev->parent = &ec_spi->spi->dev;
ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT;
ec_dev->dout_size = EC_MSG_BYTES;
err = cros_ec_register(ec_dev);
if (err) {
dev_err(dev, "cannot register EC\n");
return err;
}
return 0;
}
static int cros_ec_remove_spi(struct spi_device *spi)
{
struct cros_ec_device *ec_dev;
ec_dev = spi_get_drvdata(spi);
cros_ec_remove(ec_dev);
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int cros_ec_spi_suspend(struct device *dev)
{
struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
return cros_ec_suspend(ec_dev);
}
static int cros_ec_spi_resume(struct device *dev)
{
struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
return cros_ec_resume(ec_dev);
}
#endif
static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
cros_ec_spi_resume);
static const struct spi_device_id cros_ec_spi_id[] = {
{ "cros-ec-spi", 0 },
{ }
};
MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
static struct spi_driver cros_ec_driver_spi = {
.driver = {
.name = "cros-ec-spi",
.owner = THIS_MODULE,
.pm = &cros_ec_spi_pm_ops,
},
.probe = cros_ec_probe_spi,
.remove = cros_ec_remove_spi,
.id_table = cros_ec_spi_id,
};
module_spi_driver(cros_ec_driver_spi);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");

19
drivers/mfd/da903x.c
View File

@ -499,7 +499,8 @@ static int da903x_probe(struct i2c_client *client,
unsigned int tmp;
int ret;
chip = kzalloc(sizeof(struct da903x_chip), GFP_KERNEL);
chip = devm_kzalloc(&client->dev, sizeof(struct da903x_chip),
GFP_KERNEL);
if (chip == NULL)
return -ENOMEM;
@ -515,33 +516,27 @@ static int da903x_probe(struct i2c_client *client,
ret = chip->ops->init_chip(chip);
if (ret)
goto out_free_chip;
return ret;
/* mask and clear all IRQs */
chip->events_mask = 0xffffffff;
chip->ops->mask_events(chip, chip->events_mask);
chip->ops->read_events(chip, &tmp);
ret = request_irq(client->irq, da903x_irq_handler,
ret = devm_request_irq(&client->dev, client->irq, da903x_irq_handler,
IRQF_TRIGGER_FALLING,
"da903x", chip);
if (ret) {
dev_err(&client->dev, "failed to request irq %d\n",
client->irq);
goto out_free_chip;
return ret;
}
ret = da903x_add_subdevs(chip, pdata);
if (ret)
goto out_free_irq;
return ret;
return 0;
out_free_irq:
free_irq(client->irq, chip);
out_free_chip:
kfree(chip);
return ret;
}
static int da903x_remove(struct i2c_client *client)
@ -549,8 +544,6 @@ static int da903x_remove(struct i2c_client *client)
struct da903x_chip *chip = i2c_get_clientdata(client);
da903x_remove_subdevs(chip);
free_irq(client->irq, chip);
kfree(chip);
return 0;
}

4
drivers/mfd/da9052-spi.c
View File

@ -38,7 +38,7 @@ static int da9052_spi_probe(struct spi_device *spi)
da9052->dev = &spi->dev;
da9052->chip_irq = spi->irq;
dev_set_drvdata(&spi->dev, da9052);
spi_set_drvdata(spi, da9052);
da9052_regmap_config.read_flag_mask = 1;
da9052_regmap_config.write_flag_mask = 0;
@ -60,7 +60,7 @@ static int da9052_spi_probe(struct spi_device *spi)
static int da9052_spi_remove(struct spi_device *spi)
{
struct da9052 *da9052 = dev_get_drvdata(&spi->dev);
struct da9052 *da9052 = spi_get_drvdata(spi);
da9052_device_exit(da9052);
return 0;

2
drivers/mfd/da9055-core.c
View File

@ -391,7 +391,7 @@ int da9055_device_init(struct da9055 *da9055)
da9055->irq_base = pdata->irq_base;
ret = regmap_add_irq_chip(da9055->regmap, da9055->chip_irq,
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
da9055->irq_base, &da9055_regmap_irq_chip,
&da9055->irq_data);
if (ret < 0)

12
drivers/mfd/davinci_voicecodec.c
View File

@ -177,17 +177,7 @@ static struct platform_driver davinci_vc_driver = {
.remove = davinci_vc_remove,
};
static int __init davinci_vc_init(void)
{
return platform_driver_probe(&davinci_vc_driver, davinci_vc_probe);
}
module_init(davinci_vc_init);
static void __exit davinci_vc_exit(void)
{
platform_driver_unregister(&davinci_vc_driver);
}
module_exit(davinci_vc_exit);
module_platform_driver_probe(davinci_vc_driver, davinci_vc_probe);
MODULE_AUTHOR("Miguel Aguilar");
MODULE_DESCRIPTION("Texas Instruments DaVinci Voice Codec Core Interface");

72
drivers/mfd/db8500-prcmu.c
View File

@ -24,6 +24,7 @@
#include <linux/jiffies.h>
#include <linux/bitops.h>
#include <linux/fs.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/mfd/core.h>
@ -2704,6 +2705,7 @@ static void dbx500_fw_version_init(struct platform_device *pdev,
{
struct resource *res;
void __iomem *tcpm_base;
u32 version;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"prcmu-tcpm");
@ -2713,26 +2715,27 @@ static void dbx500_fw_version_init(struct platform_device *pdev,
return;
}
tcpm_base = ioremap(res->start, resource_size(res));
if (tcpm_base != NULL) {
u32 version;
version = readl(tcpm_base + version_offset);
fw_info.version.project = (version & 0xFF);
fw_info.version.api_version = (version >> 8) & 0xFF;
fw_info.version.func_version = (version >> 16) & 0xFF;
fw_info.version.errata = (version >> 24) & 0xFF;
strncpy(fw_info.version.project_name,
fw_project_name(fw_info.version.project),
PRCMU_FW_PROJECT_NAME_LEN);
fw_info.valid = true;
pr_info("PRCMU firmware: %s(%d), version %d.%d.%d\n",
fw_info.version.project_name,
fw_info.version.project,
fw_info.version.api_version,
fw_info.version.func_version,
fw_info.version.errata);
iounmap(tcpm_base);
if (!tcpm_base) {
dev_err(&pdev->dev, "no prcmu tcpm mem region provided\n");
return;
}
version = readl(tcpm_base + version_offset);
fw_info.version.project = (version & 0xFF);
fw_info.version.api_version = (version >> 8) & 0xFF;
fw_info.version.func_version = (version >> 16) & 0xFF;
fw_info.version.errata = (version >> 24) & 0xFF;
strncpy(fw_info.version.project_name,
fw_project_name(fw_info.version.project),
PRCMU_FW_PROJECT_NAME_LEN);
fw_info.valid = true;
pr_info("PRCMU firmware: %s(%d), version %d.%d.%d\n",
fw_info.version.project_name,
fw_info.version.project,
fw_info.version.api_version,
fw_info.version.func_version,
fw_info.version.errata);
iounmap(tcpm_base);
}
void __init db8500_prcmu_early_init(u32 phy_base, u32 size)
@ -3065,6 +3068,15 @@ static struct db8500_thsens_platform_data db8500_thsens_data = {
.num_trips = 4,
};
static struct mfd_cell common_prcmu_devs[] = {
{
.name = "ux500_wdt",
.platform_data = &db8500_wdt_pdata,
.pdata_size = sizeof(db8500_wdt_pdata),
.id = -1,
},
};
static struct mfd_cell db8500_prcmu_devs[] = {
{
.name = "db8500-prcmu-regulators",
@ -3078,12 +3090,6 @@ static struct mfd_cell db8500_prcmu_devs[] = {
.platform_data = &db8500_cpufreq_table,
.pdata_size = sizeof(db8500_cpufreq_table),
},
{
.name = "ux500_wdt",
.platform_data = &db8500_wdt_pdata,
.pdata_size = sizeof(db8500_wdt_pdata),
.id = -1,
},
{
.name = "db8500-thermal",
.num_resources = ARRAY_SIZE(db8500_thsens_resources),
@ -3173,13 +3179,25 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
db8500_prcmu_update_cpufreq();
err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs,
ARRAY_SIZE(db8500_prcmu_devs), NULL, 0, db8500_irq_domain);
err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs,
ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain);
if (err) {
pr_err("prcmu: Failed to add subdevices\n");
return err;
}
/* TODO: Remove restriction when clk definitions are available. */
if (!of_machine_is_compatible("st-ericsson,u8540")) {
err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs,
ARRAY_SIZE(db8500_prcmu_devs), NULL, 0,
db8500_irq_domain);
if (err) {
mfd_remove_devices(&pdev->dev);
pr_err("prcmu: Failed to add subdevices\n");
goto no_irq_return;
}
}
err = db8500_prcmu_register_ab8500(&pdev->dev, pdata->ab_platdata,
pdata->ab_irq);
if (err) {

21
drivers/mfd/ezx-pcap.c
View File

@ -393,7 +393,7 @@ static int pcap_add_subdev(struct pcap_chip *pcap,
static int ezx_pcap_remove(struct spi_device *spi)
{
struct pcap_chip *pcap = dev_get_drvdata(&spi->dev);
struct pcap_chip *pcap = spi_get_drvdata(spi);
struct pcap_platform_data *pdata = spi->dev.platform_data;
int i, adc_irq;
@ -403,7 +403,7 @@ static int ezx_pcap_remove(struct spi_device *spi)
/* cleanup ADC */
adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ?
PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE);
free_irq(adc_irq, pcap);
devm_free_irq(&spi->dev, adc_irq, pcap);
mutex_lock(&pcap->adc_mutex);
for (i = 0; i < PCAP_ADC_MAXQ; i++)
kfree(pcap->adc_queue[i]);
@ -415,8 +415,6 @@ static int ezx_pcap_remove(struct spi_device *spi)
destroy_workqueue(pcap->workqueue);
kfree(pcap);
return 0;
}
@ -431,7 +429,7 @@ static int ezx_pcap_probe(struct spi_device *spi)
if (!pdata)
goto ret;
pcap = kzalloc(sizeof(*pcap), GFP_KERNEL);
pcap = devm_kzalloc(&spi->dev, sizeof(*pcap), GFP_KERNEL);
if (!pcap) {
ret = -ENOMEM;
goto ret;
@ -441,14 +439,14 @@ static int ezx_pcap_probe(struct spi_device *spi)
mutex_init(&pcap->adc_mutex);
INIT_WORK(&pcap->isr_work, pcap_isr_work);
INIT_WORK(&pcap->msr_work, pcap_msr_work);
dev_set_drvdata(&spi->dev, pcap);
spi_set_drvdata(spi, pcap);
/* setup spi */
spi->bits_per_word = 32;
spi->mode = SPI_MODE_0 | (pdata->config & PCAP_CS_AH ? SPI_CS_HIGH : 0);
ret = spi_setup(spi);
if (ret)
goto free_pcap;
goto ret;
pcap->spi = spi;
@ -458,7 +456,7 @@ static int ezx_pcap_probe(struct spi_device *spi)
if (!pcap->workqueue) {
ret = -ENOMEM;
dev_err(&spi->dev, "can't create pcap thread\n");
goto free_pcap;
goto ret;
}
/* redirect interrupts to AP, except adcdone2 */
@ -491,7 +489,8 @@ static int ezx_pcap_probe(struct spi_device *spi)
adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ?
PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE);
ret = request_irq(adc_irq, pcap_adc_irq, 0, "ADC", pcap);
ret = devm_request_irq(&spi->dev, adc_irq, pcap_adc_irq, 0, "ADC",
pcap);
if (ret)
goto free_irqchip;
@ -511,14 +510,12 @@ static int ezx_pcap_probe(struct spi_device *spi)
remove_subdevs:
device_for_each_child(&spi->dev, NULL, pcap_remove_subdev);
/* free_adc: */
free_irq(adc_irq, pcap);
devm_free_irq(&spi->dev, adc_irq, pcap);
free_irqchip:
for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
irq_set_chip_and_handler(i, NULL, NULL);
/* destroy_workqueue: */
destroy_workqueue(pcap->workqueue);
free_pcap:
kfree(pcap);
ret:
return ret;
}

13
drivers/mfd/htc-pasic3.c
View File

@ -208,18 +208,7 @@ static struct platform_driver pasic3_driver = {
.remove = pasic3_remove,
};
static int __init pasic3_base_init(void)
{
return platform_driver_probe(&pasic3_driver, pasic3_probe);
}
static void __exit pasic3_base_exit(void)
{
platform_driver_unregister(&pasic3_driver);
}
module_init(pasic3_base_init);
module_exit(pasic3_base_exit);
module_platform_driver_probe(pasic3_driver, pasic3_probe);
MODULE_AUTHOR("Philipp Zabel <philipp.zabel@gmail.com>");
MODULE_DESCRIPTION("Core driver for HTC PASIC3");

10
drivers/mfd/intel_msic.c
View File

@ -323,7 +323,8 @@ static int intel_msic_init_devices(struct intel_msic *msic)
if (pdata->ocd) {
unsigned gpio = pdata->ocd->gpio;
ret = gpio_request_one(gpio, GPIOF_IN, "ocd_gpio");
ret = devm_gpio_request_one(&pdev->dev, gpio,
GPIOF_IN, "ocd_gpio");
if (ret) {
dev_err(&pdev->dev, "failed to register OCD GPIO\n");
return ret;
@ -332,7 +333,6 @@ static int intel_msic_init_devices(struct intel_msic *msic)
ret = gpio_to_irq(gpio);
if (ret < 0) {
dev_err(&pdev->dev, "no IRQ number for OCD GPIO\n");
gpio_free(gpio);
return ret;
}
@ -359,8 +359,6 @@ static int intel_msic_init_devices(struct intel_msic *msic)
fail:
mfd_remove_devices(&pdev->dev);
if (pdata->ocd)
gpio_free(pdata->ocd->gpio);
return ret;
}
@ -368,12 +366,8 @@ fail:
static void intel_msic_remove_devices(struct intel_msic *msic)
{
struct platform_device *pdev = msic->pdev;
struct intel_msic_platform_data *pdata = pdev->dev.platform_data;
mfd_remove_devices(&pdev->dev);
if (pdata->ocd)
gpio_free(pdata->ocd->gpio);
}
static int intel_msic_probe(struct platform_device *pdev)

8
drivers/mfd/lm3533-core.c
View File

@ -496,8 +496,8 @@ static int lm3533_device_init(struct lm3533 *lm3533)
dev_set_drvdata(lm3533->dev, lm3533);
if (gpio_is_valid(lm3533->gpio_hwen)) {
ret = gpio_request_one(lm3533->gpio_hwen, GPIOF_OUT_INIT_LOW,
"lm3533-hwen");
ret = devm_gpio_request_one(lm3533->dev, lm3533->gpio_hwen,
GPIOF_OUT_INIT_LOW, "lm3533-hwen");
if (ret < 0) {
dev_err(lm3533->dev,
"failed to request HWEN GPIO %d\n",
@ -528,8 +528,6 @@ err_unregister:
mfd_remove_devices(lm3533->dev);
err_disable:
lm3533_disable(lm3533);
if (gpio_is_valid(lm3533->gpio_hwen))
gpio_free(lm3533->gpio_hwen);
return ret;
}
@ -542,8 +540,6 @@ static void lm3533_device_exit(struct lm3533 *lm3533)
mfd_remove_devices(lm3533->dev);
lm3533_disable(lm3533);
if (gpio_is_valid(lm3533->gpio_hwen))
gpio_free(lm3533->gpio_hwen);
}
static bool lm3533_readable_register(struct device *dev, unsigned int reg)

2
drivers/mfd/max77686.c
View File

@ -46,7 +46,7 @@ static struct regmap_config max77686_regmap_config = {
#ifdef CONFIG_OF
static struct of_device_id max77686_pmic_dt_match[] = {
{.compatible = "maxim,max77686", .data = 0},
{.compatible = "maxim,max77686", .data = NULL},
{},
};

6
drivers/mfd/mc13xxx-spi.c
View File

@ -131,7 +131,7 @@ static int mc13xxx_spi_probe(struct spi_device *spi)
if (!mc13xxx)
return -ENOMEM;
dev_set_drvdata(&spi->dev, mc13xxx);
spi_set_drvdata(spi, mc13xxx);
spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
mc13xxx->dev = &spi->dev;
@ -144,7 +144,7 @@ static int mc13xxx_spi_probe(struct spi_device *spi)
ret = PTR_ERR(mc13xxx->regmap);
dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n",
ret);
dev_set_drvdata(&spi->dev, NULL);
spi_set_drvdata(spi, NULL);
return ret;
}
@ -164,7 +164,7 @@ static int mc13xxx_spi_probe(struct spi_device *spi)
static int mc13xxx_spi_remove(struct spi_device *spi)
{
struct mc13xxx *mc13xxx = dev_get_drvdata(&spi->dev);
struct mc13xxx *mc13xxx = spi_get_drvdata(spi);
mc13xxx_common_cleanup(mc13xxx);

211
drivers/mfd/omap-usb-host.c
View File

@ -1,8 +1,9 @@
/**
* omap-usb-host.c - The USBHS core driver for OMAP EHCI & OHCI
*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
* Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com
* Author: Keshava Munegowda <keshava_mgowda@ti.com>
* Author: Roger Quadros <rogerq@ti.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 of
@ -27,6 +28,9 @@
#include <linux/platform_device.h>
#include <linux/platform_data/usb-omap.h>
#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/err.h>
#include "omap-usb.h"
@ -137,6 +141,49 @@ static inline u8 usbhs_readb(void __iomem *base, u8 reg)
/*-------------------------------------------------------------------------*/
/**
* Map 'enum usbhs_omap_port_mode' found in <linux/platform_data/usb-omap.h>
* to the device tree binding portN-mode found in
* 'Documentation/devicetree/bindings/mfd/omap-usb-host.txt'
*/
static const char * const port_modes[] = {
[OMAP_USBHS_PORT_MODE_UNUSED] = "",
[OMAP_EHCI_PORT_MODE_PHY] = "ehci-phy",
[OMAP_EHCI_PORT_MODE_TLL] = "ehci-tll",
[OMAP_EHCI_PORT_MODE_HSIC] = "ehci-hsic",
[OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0] = "ohci-phy-6pin-datse0",
[OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM] = "ohci-phy-6pin-dpdm",
[OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0] = "ohci-phy-3pin-datse0",
[OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM] = "ohci-phy-4pin-dpdm",
[OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0] = "ohci-tll-6pin-datse0",
[OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM] = "ohci-tll-6pin-dpdm",
[OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0] = "ohci-tll-3pin-datse0",
[OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM] = "ohci-tll-4pin-dpdm",
[OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0] = "ohci-tll-2pin-datse0",
[OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM] = "ohci-tll-2pin-dpdm",
};
/**
* omap_usbhs_get_dt_port_mode - Get the 'enum usbhs_omap_port_mode'
* from the port mode string.
* @mode: The port mode string, usually obtained from device tree.
*
* The function returns the 'enum usbhs_omap_port_mode' that matches the
* provided port mode string as per the port_modes table.
* If no match is found it returns -ENODEV
*/
static const int omap_usbhs_get_dt_port_mode(const char *mode)
{
int i;
for (i = 0; i < ARRAY_SIZE(port_modes); i++) {
if (!strcmp(mode, port_modes[i]))
return i;
}
return -ENODEV;
}
static struct platform_device *omap_usbhs_alloc_child(const char *name,
struct resource *res, int num_resources, void *pdata,
size_t pdata_size, struct device *dev)
@ -278,7 +325,7 @@ static int usbhs_runtime_resume(struct device *dev)
dev_dbg(dev, "usbhs_runtime_resume\n");
omap_tll_enable();
omap_tll_enable(pdata);
if (!IS_ERR(omap->ehci_logic_fck))
clk_enable(omap->ehci_logic_fck);
@ -353,7 +400,7 @@ static int usbhs_runtime_suspend(struct device *dev)
if (!IS_ERR(omap->ehci_logic_fck))
clk_disable(omap->ehci_logic_fck);
omap_tll_disable();
omap_tll_disable(pdata);
return 0;
}
@ -430,24 +477,10 @@ static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap,
static void omap_usbhs_init(struct device *dev)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
struct usbhs_omap_platform_data *pdata = omap->pdata;
unsigned reg;
dev_dbg(dev, "starting TI HSUSB Controller\n");
if (pdata->phy_reset) {
if (gpio_is_valid(pdata->reset_gpio_port[0]))
gpio_request_one(pdata->reset_gpio_port[0],
GPIOF_OUT_INIT_LOW, "USB1 PHY reset");
if (gpio_is_valid(pdata->reset_gpio_port[1]))
gpio_request_one(pdata->reset_gpio_port[1],
GPIOF_OUT_INIT_LOW, "USB2 PHY reset");
/* Hold the PHY in RESET for enough time till DIR is high */
udelay(10);
}
pm_runtime_get_sync(dev);
reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
@ -476,36 +509,59 @@ static void omap_usbhs_init(struct device *dev)
dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
pm_runtime_put_sync(dev);
if (pdata->phy_reset) {
/* Hold the PHY in RESET for enough time till
* PHY is settled and ready
*/
udelay(10);
if (gpio_is_valid(pdata->reset_gpio_port[0]))
gpio_set_value_cansleep
(pdata->reset_gpio_port[0], 1);
if (gpio_is_valid(pdata->reset_gpio_port[1]))
gpio_set_value_cansleep
(pdata->reset_gpio_port[1], 1);
}
}
static void omap_usbhs_deinit(struct device *dev)
static int usbhs_omap_get_dt_pdata(struct device *dev,
struct usbhs_omap_platform_data *pdata)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
struct usbhs_omap_platform_data *pdata = omap->pdata;
int ret, i;
struct device_node *node = dev->of_node;
if (pdata->phy_reset) {
if (gpio_is_valid(pdata->reset_gpio_port[0]))
gpio_free(pdata->reset_gpio_port[0]);
ret = of_property_read_u32(node, "num-ports", &pdata->nports);
if (ret)
pdata->nports = 0;
if (gpio_is_valid(pdata->reset_gpio_port[1]))
gpio_free(pdata->reset_gpio_port[1]);
if (pdata->nports > OMAP3_HS_USB_PORTS) {
dev_warn(dev, "Too many num_ports <%d> in device tree. Max %d\n",
pdata->nports, OMAP3_HS_USB_PORTS);
return -ENODEV;
}
/* get port modes */
for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
char prop[11];
const char *mode;
pdata->port_mode[i] = OMAP_USBHS_PORT_MODE_UNUSED;
snprintf(prop, sizeof(prop), "port%d-mode", i + 1);
ret = of_property_read_string(node, prop, &mode);
if (ret < 0)
continue;
ret = omap_usbhs_get_dt_port_mode(mode);
if (ret < 0) {
dev_warn(dev, "Invalid port%d-mode \"%s\" in device tree\n",
i, mode);
return -ENODEV;
}
dev_dbg(dev, "port%d-mode: %s -> %d\n", i, mode, ret);
pdata->port_mode[i] = ret;
}
/* get flags */
pdata->single_ulpi_bypass = of_property_read_bool(node,
"single-ulpi-bypass");
return 0;
}
static struct of_device_id usbhs_child_match_table[] = {
{ .compatible = "ti,omap-ehci", },
{ .compatible = "ti,omap-ohci", },
{ }
};
/**
* usbhs_omap_probe - initialize TI-based HCDs
@ -522,26 +578,46 @@ static int usbhs_omap_probe(struct platform_device *pdev)
int i;
bool need_logic_fck;
if (dev->of_node) {
/* For DT boot we populate platform data from OF node */
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
ret = usbhs_omap_get_dt_pdata(dev, pdata);
if (ret)
return ret;
dev->platform_data = pdata;
}
if (!pdata) {
dev_err(dev, "Missing platform data\n");
return -ENODEV;
}
if (pdata->nports > OMAP3_HS_USB_PORTS) {
dev_info(dev, "Too many num_ports <%d> in platform_data. Max %d\n",
pdata->nports, OMAP3_HS_USB_PORTS);
return -ENODEV;
}
omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);
if (!omap) {
dev_err(dev, "Memory allocation failed\n");
return -ENOMEM;
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh");
omap->uhh_base = devm_request_and_ioremap(dev, res);
if (!omap->uhh_base) {
dev_err(dev, "Resource request/ioremap failed\n");
return -EADDRNOTAVAIL;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
omap->uhh_base = devm_ioremap_resource(dev, res);
if (IS_ERR(omap->uhh_base))
return PTR_ERR(omap->uhh_base);
omap->pdata = pdata;
/* Initialize the TLL subsystem */
omap_tll_init(pdata);
pm_runtime_enable(dev);
platform_set_drvdata(pdev, omap);
@ -575,6 +651,7 @@ static int usbhs_omap_probe(struct platform_device *pdev)
omap->usbhs_rev, omap->nports);
break;
}
pdata->nports = omap->nports;
}
i = sizeof(struct clk *) * omap->nports;
@ -700,17 +777,28 @@ static int usbhs_omap_probe(struct platform_device *pdev)
}
omap_usbhs_init(dev);
ret = omap_usbhs_alloc_children(pdev);
if (ret) {
dev_err(dev, "omap_usbhs_alloc_children failed\n");
goto err_alloc;
if (dev->of_node) {
ret = of_platform_populate(dev->of_node,
usbhs_child_match_table, NULL, dev);
if (ret) {
dev_err(dev, "Failed to create DT children: %d\n", ret);
goto err_alloc;
}
} else {
ret = omap_usbhs_alloc_children(pdev);
if (ret) {
dev_err(dev, "omap_usbhs_alloc_children failed: %d\n",
ret);
goto err_alloc;
}
}
return 0;
err_alloc:
omap_usbhs_deinit(&pdev->dev);
for (i = 0; i < omap->nports; i++) {
if (!IS_ERR(omap->utmi_clk[i]))
clk_put(omap->utmi_clk[i]);
@ -744,6 +832,13 @@ err_mem:
return ret;
}
static int usbhs_omap_remove_child(struct device *dev, void *data)
{
dev_info(dev, "unregistering\n");
platform_device_unregister(to_platform_device(dev));
return 0;
}
/**
* usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
* @pdev: USB Host Controller being removed
@ -755,8 +850,6 @@ static int usbhs_omap_remove(struct platform_device *pdev)
struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
int i;
omap_usbhs_deinit(&pdev->dev);
for (i = 0; i < omap->nports; i++) {
if (!IS_ERR(omap->utmi_clk[i]))
clk_put(omap->utmi_clk[i]);
@ -777,6 +870,8 @@ static int usbhs_omap_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
/* remove children */
device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child);
return 0;
}
@ -785,16 +880,26 @@ static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
.runtime_resume = usbhs_runtime_resume,
};
static const struct of_device_id usbhs_omap_dt_ids[] = {
{ .compatible = "ti,usbhs-host" },
{ }
};
MODULE_DEVICE_TABLE(of, usbhs_omap_dt_ids);
static struct platform_driver usbhs_omap_driver = {
.driver = {
.name = (char *)usbhs_driver_name,
.owner = THIS_MODULE,
.pm = &usbhsomap_dev_pm_ops,
.of_match_table = of_match_ptr(usbhs_omap_dt_ids),
},
.remove = usbhs_omap_remove,
};
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");

223
drivers/mfd/omap-usb-tll.c
View File

@ -1,8 +1,9 @@
/**
* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
* Copyright (C) 2012-2013 Texas Instruments Incorporated - http://www.ti.com
* Author: Keshava Munegowda <keshava_mgowda@ti.com>
* Author: Roger Quadros <rogerq@ti.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 of
@ -27,6 +28,7 @@
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/platform_data/usb-omap.h>
#include <linux/of.h>
#define USBTLL_DRIVER_NAME "usbhs_tll"
@ -105,8 +107,8 @@
struct usbtll_omap {
int nch; /* num. of channels */
struct usbhs_omap_platform_data *pdata;
struct clk **ch_clk;
void __iomem *base;
};
/*-------------------------------------------------------------------------*/
@ -210,14 +212,10 @@ static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
static int usbtll_omap_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct usbhs_omap_platform_data *pdata = dev->platform_data;
void __iomem *base;
struct resource *res;
struct usbtll_omap *tll;
unsigned reg;
int ret = 0;
int i, ver;
bool needs_tll;
dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
@ -227,26 +225,16 @@ static int usbtll_omap_probe(struct platform_device *pdev)
return -ENOMEM;
}
if (!pdata) {
dev_err(dev, "Platform data missing\n");
return -ENODEV;
}
tll->pdata = pdata;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_request_and_ioremap(dev, res);
if (!base) {
ret = -EADDRNOTAVAIL;
dev_err(dev, "Resource request/ioremap failed:%d\n", ret);
return ret;
}
tll->base = devm_ioremap_resource(dev, res);
if (IS_ERR(tll->base))
return PTR_ERR(tll->base);
platform_set_drvdata(pdev, tll);
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
ver = usbtll_read(base, OMAP_USBTLL_REVISION);
ver = usbtll_read(tll->base, OMAP_USBTLL_REVISION);
switch (ver) {
case OMAP_USBTLL_REV1:
case OMAP_USBTLL_REV4:
@ -283,11 +271,85 @@ static int usbtll_omap_probe(struct platform_device *pdev)
dev_dbg(dev, "can't get clock : %s\n", clkname);
}
pm_runtime_put_sync(dev);
/* only after this can omap_tll_enable/disable work */
spin_lock(&tll_lock);
tll_dev = dev;
spin_unlock(&tll_lock);
return 0;
err_clk_alloc:
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
return ret;
}
/**
* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
* @pdev: USB Host Controller being removed
*
* Reverses the effect of usbtll_omap_probe().
*/
static int usbtll_omap_remove(struct platform_device *pdev)
{
struct usbtll_omap *tll = platform_get_drvdata(pdev);
int i;
spin_lock(&tll_lock);
tll_dev = NULL;
spin_unlock(&tll_lock);
for (i = 0; i < tll->nch; i++)
if (!IS_ERR(tll->ch_clk[i]))
clk_put(tll->ch_clk[i]);
pm_runtime_disable(&pdev->dev);
return 0;
}
static const struct of_device_id usbtll_omap_dt_ids[] = {
{ .compatible = "ti,usbhs-tll" },
{ }
};
MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
static struct platform_driver usbtll_omap_driver = {
.driver = {
.name = (char *)usbtll_driver_name,
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(usbtll_omap_dt_ids),
},
.probe = usbtll_omap_probe,
.remove = usbtll_omap_remove,
};
int omap_tll_init(struct usbhs_omap_platform_data *pdata)
{
int i;
bool needs_tll;
unsigned reg;
struct usbtll_omap *tll;
spin_lock(&tll_lock);
if (!tll_dev) {
spin_unlock(&tll_lock);
return -ENODEV;
}
tll = dev_get_drvdata(tll_dev);
needs_tll = false;
for (i = 0; i < tll->nch; i++)
needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
pm_runtime_get_sync(tll_dev);
if (needs_tll) {
void __iomem *base = tll->base;
/* Program Common TLL register */
reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
@ -336,51 +398,29 @@ static int usbtll_omap_probe(struct platform_device *pdev)
}
}
pm_runtime_put_sync(dev);
/* only after this can omap_tll_enable/disable work */
spin_lock(&tll_lock);
tll_dev = dev;
pm_runtime_put_sync(tll_dev);
spin_unlock(&tll_lock);
return 0;
err_clk_alloc:
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
return ret;
}
EXPORT_SYMBOL_GPL(omap_tll_init);
/**
* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
* @pdev: USB Host Controller being removed
*
* Reverses the effect of usbtll_omap_probe().
*/
static int usbtll_omap_remove(struct platform_device *pdev)
int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
{
struct usbtll_omap *tll = platform_get_drvdata(pdev);
int i;
struct usbtll_omap *tll;
spin_lock(&tll_lock);
tll_dev = NULL;
spin_unlock(&tll_lock);
for (i = 0; i < tll->nch; i++)
if (!IS_ERR(tll->ch_clk[i]))
clk_put(tll->ch_clk[i]);
if (!tll_dev) {
spin_unlock(&tll_lock);
return -ENODEV;
}
pm_runtime_disable(&pdev->dev);
return 0;
}
tll = dev_get_drvdata(tll_dev);
static int usbtll_runtime_resume(struct device *dev)
{
struct usbtll_omap *tll = dev_get_drvdata(dev);
struct usbhs_omap_platform_data *pdata = tll->pdata;
int i;
dev_dbg(dev, "usbtll_runtime_resume\n");
pm_runtime_get_sync(tll_dev);
for (i = 0; i < tll->nch; i++) {
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
@ -391,22 +431,31 @@ static int usbtll_runtime_resume(struct device *dev)
r = clk_enable(tll->ch_clk[i]);
if (r) {
dev_err(dev,
dev_err(tll_dev,
"Error enabling ch %d clock: %d\n", i, r);
}
}
}
spin_unlock(&tll_lock);
return 0;
}
EXPORT_SYMBOL_GPL(omap_tll_enable);
static int usbtll_runtime_suspend(struct device *dev)
int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
{
struct usbtll_omap *tll = dev_get_drvdata(dev);
struct usbhs_omap_platform_data *pdata = tll->pdata;
int i;
struct usbtll_omap *tll;
dev_dbg(dev, "usbtll_runtime_suspend\n");
spin_lock(&tll_lock);
if (!tll_dev) {
spin_unlock(&tll_lock);
return -ENODEV;
}
tll = dev_get_drvdata(tll_dev);
for (i = 0; i < tll->nch; i++) {
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
@ -415,64 +464,16 @@ static int usbtll_runtime_suspend(struct device *dev)
}
}
pm_runtime_put_sync(tll_dev);
spin_unlock(&tll_lock);
return 0;
}
static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
usbtll_runtime_resume,
NULL)
};
static struct platform_driver usbtll_omap_driver = {
.driver = {
.name = (char *)usbtll_driver_name,
.owner = THIS_MODULE,
.pm = &usbtllomap_dev_pm_ops,
},
.probe = usbtll_omap_probe,
.remove = usbtll_omap_remove,
};
int omap_tll_enable(void)
{
int ret;
spin_lock(&tll_lock);
if (!tll_dev) {
pr_err("%s: OMAP USB TLL not initialized\n", __func__);
ret = -ENODEV;
} else {
ret = pm_runtime_get_sync(tll_dev);
}
spin_unlock(&tll_lock);
return ret;
}
EXPORT_SYMBOL_GPL(omap_tll_enable);
int omap_tll_disable(void)
{
int ret;
spin_lock(&tll_lock);
if (!tll_dev) {
pr_err("%s: OMAP USB TLL not initialized\n", __func__);
ret = -ENODEV;
} else {
ret = pm_runtime_put_sync(tll_dev);
}
spin_unlock(&tll_lock);
return ret;
}
EXPORT_SYMBOL_GPL(omap_tll_disable);
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");

5
drivers/mfd/omap-usb.h
View File

@ -1,2 +1,3 @@
extern int omap_tll_enable(void);
extern int omap_tll_disable(void);
extern int omap_tll_init(struct usbhs_omap_platform_data *pdata);
extern int omap_tll_enable(struct usbhs_omap_platform_data *pdata);
extern int omap_tll_disable(struct usbhs_omap_platform_data *pdata);

7
drivers/mfd/palmas.c
View File

@ -278,20 +278,20 @@ static void palmas_dt_to_pdata(struct i2c_client *i2c,
int ret;
u32 prop;
ret = of_property_read_u32(node, "ti,mux_pad1", &prop);
ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
if (!ret) {
pdata->mux_from_pdata = 1;
pdata->pad1 = prop;
}
ret = of_property_read_u32(node, "ti,mux_pad2", &prop);
ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
if (!ret) {
pdata->mux_from_pdata = 1;
pdata->pad2 = prop;
}
/* The default for this register is all masked */
ret = of_property_read_u32(node, "ti,power_ctrl", &prop);
ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
if (!ret)
pdata->power_ctrl = prop;
else
@ -349,6 +349,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
ret = -ENOMEM;
goto err;
}
palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
}
palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
&palmas_regmap_config[i]);

85
drivers/mfd/retu-mfd.c
View File

@ -1,5 +1,5 @@
/*
* Retu MFD driver
* Retu/Tahvo MFD driver
*
* Copyright (C) 2004, 2005 Nokia Corporation
*
@ -33,7 +33,8 @@
#define RETU_REG_ASICR 0x00 /* ASIC ID and revision */
#define RETU_REG_ASICR_VILMA (1 << 7) /* Bit indicating Vilma */
#define RETU_REG_IDR 0x01 /* Interrupt ID */
#define RETU_REG_IMR 0x02 /* Interrupt mask */
#define RETU_REG_IMR 0x02 /* Interrupt mask (Retu) */
#define TAHVO_REG_IMR 0x03 /* Interrupt mask (Tahvo) */
/* Interrupt sources */
#define RETU_INT_PWR 0 /* Power button */
@ -84,6 +85,62 @@ static struct regmap_irq_chip retu_irq_chip = {
/* Retu device registered for the power off. */
static struct retu_dev *retu_pm_power_off;
static struct resource tahvo_usb_res[] = {
{
.name = "tahvo-usb",
.start = TAHVO_INT_VBUS,
.end = TAHVO_INT_VBUS,
.flags = IORESOURCE_IRQ,
},
};
static struct mfd_cell tahvo_devs[] = {
{
.name = "tahvo-usb",
.resources = tahvo_usb_res,
.num_resources = ARRAY_SIZE(tahvo_usb_res),
},
};
static struct regmap_irq tahvo_irqs[] = {
[TAHVO_INT_VBUS] = {
.mask = 1 << TAHVO_INT_VBUS,
}
};
static struct regmap_irq_chip tahvo_irq_chip = {
.name = "TAHVO",
.irqs = tahvo_irqs,
.num_irqs = ARRAY_SIZE(tahvo_irqs),
.num_regs = 1,
.status_base = RETU_REG_IDR,
.mask_base = TAHVO_REG_IMR,
.ack_base = RETU_REG_IDR,
};
static const struct retu_data {
char *chip_name;
char *companion_name;
struct regmap_irq_chip *irq_chip;
struct mfd_cell *children;
int nchildren;
} retu_data[] = {
[0] = {
.chip_name = "Retu",
.companion_name = "Vilma",
.irq_chip = &retu_irq_chip,
.children = retu_devs,
.nchildren = ARRAY_SIZE(retu_devs),
},
[1] = {
.chip_name = "Tahvo",
.companion_name = "Betty",
.irq_chip = &tahvo_irq_chip,
.children = tahvo_devs,
.nchildren = ARRAY_SIZE(tahvo_devs),
}
};
int retu_read(struct retu_dev *rdev, u8 reg)
{
int ret;
@ -173,9 +230,14 @@ static struct regmap_config retu_config = {
static int retu_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
{
struct retu_data const *rdat;
struct retu_dev *rdev;
int ret;
if (i2c->addr > ARRAY_SIZE(retu_data))
return -ENODEV;
rdat = &retu_data[i2c->addr - 1];
rdev = devm_kzalloc(&i2c->dev, sizeof(*rdev), GFP_KERNEL);
if (rdev == NULL)
return -ENOMEM;
@ -190,25 +252,27 @@ static int retu_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
ret = retu_read(rdev, RETU_REG_ASICR);
if (ret < 0) {
dev_err(rdev->dev, "could not read Retu revision: %d\n", ret);
dev_err(rdev->dev, "could not read %s revision: %d\n",
rdat->chip_name, ret);
return ret;
}
dev_info(rdev->dev, "Retu%s v%d.%d found\n",
(ret & RETU_REG_ASICR_VILMA) ? " & Vilma" : "",
dev_info(rdev->dev, "%s%s%s v%d.%d found\n", rdat->chip_name,
(ret & RETU_REG_ASICR_VILMA) ? " & " : "",
(ret & RETU_REG_ASICR_VILMA) ? rdat->companion_name : "",
(ret >> 4) & 0x7, ret & 0xf);
/* Mask all RETU interrupts. */
ret = retu_write(rdev, RETU_REG_IMR, 0xffff);
/* Mask all interrupts. */
ret = retu_write(rdev, rdat->irq_chip->mask_base, 0xffff);
if (ret < 0)
return ret;
ret = regmap_add_irq_chip(rdev->regmap, i2c->irq, IRQF_ONESHOT, -1,
&retu_irq_chip, &rdev->irq_data);
rdat->irq_chip, &rdev->irq_data);
if (ret < 0)
return ret;
ret = mfd_add_devices(rdev->dev, -1, retu_devs, ARRAY_SIZE(retu_devs),
ret = mfd_add_devices(rdev->dev, -1, rdat->children, rdat->nchildren,
NULL, regmap_irq_chip_get_base(rdev->irq_data),
NULL);
if (ret < 0) {
@ -216,7 +280,7 @@ static int retu_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
return ret;
}
if (!pm_power_off) {
if (i2c->addr == 1 && !pm_power_off) {
retu_pm_power_off = rdev;
pm_power_off = retu_power_off;
}
@ -240,6 +304,7 @@ static int retu_remove(struct i2c_client *i2c)
static const struct i2c_device_id retu_id[] = {
{ "retu-mfd", 0 },
{ "tahvo-mfd", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, retu_id);

241
drivers/mfd/rts5249.c Normal file
View File

@ -0,0 +1,241 @@
/* Driver for Realtek PCI-Express card reader
*
* Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2, or (at your option) any
* later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*
* Author:
* Wei WANG <wei_wang@realsil.com.cn>
* No. 128, West Shenhu Road, Suzhou Industry Park, Suzhou, China
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/mfd/rtsx_pci.h>
#include "rtsx_pcr.h"
static u8 rts5249_get_ic_version(struct rtsx_pcr *pcr)
{
u8 val;
rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
return val & 0x0F;
}
static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
{
rtsx_pci_init_cmd(pcr);
/* Configure GPIO as output */
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
/* Switch LDO3318 source from DV33 to card_3v3 */
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
/* LED shine disabled, set initial shine cycle period */
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
/* Correct driving */
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
SD30_CLK_DRIVE_SEL, 0xFF, 0x99);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
SD30_CMD_DRIVE_SEL, 0xFF, 0x99);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
SD30_DAT_DRIVE_SEL, 0xFF, 0x92);
return rtsx_pci_send_cmd(pcr, 100);
}
static int rts5249_optimize_phy(struct rtsx_pcr *pcr)
{
int err;
err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV, 0xFE46);
if (err < 0)
return err;
msleep(1);
return rtsx_pci_write_phy_register(pcr, PHY_BPCR, 0x05C0);
}
static int rts5249_turn_on_led(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
}
static int rts5249_turn_off_led(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
}
static int rts5249_enable_auto_blink(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
}
static int rts5249_disable_auto_blink(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
}
static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card)
{
int err;
rtsx_pci_init_cmd(pcr);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
SD_POWER_MASK, SD_VCC_PARTIAL_POWER_ON);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
LDO3318_PWR_MASK, 0x02);
err = rtsx_pci_send_cmd(pcr, 100);
if (err < 0)
return err;
msleep(5);
rtsx_pci_init_cmd(pcr);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
SD_POWER_MASK, SD_VCC_POWER_ON);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
LDO3318_PWR_MASK, 0x06);
err = rtsx_pci_send_cmd(pcr, 100);
if (err < 0)
return err;
return 0;
}
static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card)
{
rtsx_pci_init_cmd(pcr);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
SD_POWER_MASK, SD_POWER_OFF);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
LDO3318_PWR_MASK, 0x00);
return rtsx_pci_send_cmd(pcr, 100);
}
static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
{
int err;
u8 clk_drive, cmd_drive, dat_drive;
if (voltage == OUTPUT_3V3) {
err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4FC0 | 0x24);
if (err < 0)
return err;
clk_drive = 0x99;
cmd_drive = 0x99;
dat_drive = 0x92;
} else if (voltage == OUTPUT_1V8) {
err = rtsx_pci_write_phy_register(pcr, PHY_BACR, 0x3C02);
if (err < 0)
return err;
err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4C40 | 0x24);
if (err < 0)
return err;
clk_drive = 0xb3;
cmd_drive = 0xb3;
dat_drive = 0xb3;
} else {
return -EINVAL;
}
/* set pad drive */
rtsx_pci_init_cmd(pcr);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL,
0xFF, clk_drive);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL,
0xFF, cmd_drive);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL,
0xFF, dat_drive);
return rtsx_pci_send_cmd(pcr, 100);
}
static const struct pcr_ops rts5249_pcr_ops = {
.extra_init_hw = rts5249_extra_init_hw,
.optimize_phy = rts5249_optimize_phy,
.turn_on_led = rts5249_turn_on_led,
.turn_off_led = rts5249_turn_off_led,
.enable_auto_blink = rts5249_enable_auto_blink,
.disable_auto_blink = rts5249_disable_auto_blink,
.card_power_on = rts5249_card_power_on,
.card_power_off = rts5249_card_power_off,
.switch_output_voltage = rts5249_switch_output_voltage,
};
/* SD Pull Control Enable:
* SD_DAT[3:0] ==> pull up
* SD_CD ==> pull up
* SD_WP ==> pull up
* SD_CMD ==> pull up
* SD_CLK ==> pull down
*/
static const u32 rts5249_sd_pull_ctl_enable_tbl[] = {
RTSX_REG_PAIR(CARD_PULL_CTL1, 0x66),
RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
RTSX_REG_PAIR(CARD_PULL_CTL4, 0xAA),
0,
};
/* SD Pull Control Disable:
* SD_DAT[3:0] ==> pull down
* SD_CD ==> pull up
* SD_WP ==> pull down
* SD_CMD ==> pull down
* SD_CLK ==> pull down
*/
static const u32 rts5249_sd_pull_ctl_disable_tbl[] = {
RTSX_REG_PAIR(CARD_PULL_CTL1, 0x66),
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
0,
};
/* MS Pull Control Enable:
* MS CD ==> pull up
* others ==> pull down
*/
static const u32 rts5249_ms_pull_ctl_enable_tbl[] = {
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
0,
};
/* MS Pull Control Disable:
* MS CD ==> pull up
* others ==> pull down
*/
static const u32 rts5249_ms_pull_ctl_disable_tbl[] = {
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
0,
};
void rts5249_init_params(struct rtsx_pcr *pcr)
{
pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
pcr->num_slots = 2;
pcr->ops = &rts5249_pcr_ops;
pcr->ic_version = rts5249_get_ic_version(pcr);
pcr->sd_pull_ctl_enable_tbl = rts5249_sd_pull_ctl_enable_tbl;
pcr->sd_pull_ctl_disable_tbl = rts5249_sd_pull_ctl_disable_tbl;
pcr->ms_pull_ctl_enable_tbl = rts5249_ms_pull_ctl_enable_tbl;
pcr->ms_pull_ctl_disable_tbl = rts5249_ms_pull_ctl_disable_tbl;
}

11
drivers/mfd/rtsx_pcr.c
View File

@ -56,6 +56,7 @@ static DEFINE_PCI_DEVICE_TABLE(rtsx_pci_ids) = {
{ PCI_DEVICE(0x10EC, 0x5229), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5289), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5227), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ 0, }
};
@ -1033,6 +1034,10 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
case 0x5227:
rts5227_init_params(pcr);
break;
case 0x5249:
rts5249_init_params(pcr);
break;
}
dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n",
@ -1138,7 +1143,7 @@ static int rtsx_pci_probe(struct pci_dev *pcidev,
ret = rtsx_pci_acquire_irq(pcr);
if (ret < 0)
goto free_dma;
goto disable_msi;
pci_set_master(pcidev);
synchronize_irq(pcr->irq);
@ -1162,7 +1167,9 @@ static int rtsx_pci_probe(struct pci_dev *pcidev,
disable_irq:
free_irq(pcr->irq, (void *)pcr);
free_dma:
disable_msi:
if (pcr->msi_en)
pci_disable_msi(pcr->pci);
dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN,
pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr);
unmap:

1
drivers/mfd/rtsx_pcr.h
View File

@ -32,5 +32,6 @@ void rts5209_init_params(struct rtsx_pcr *pcr);
void rts5229_init_params(struct rtsx_pcr *pcr);
void rtl8411_init_params(struct rtsx_pcr *pcr);
void rts5227_init_params(struct rtsx_pcr *pcr);
void rts5249_init_params(struct rtsx_pcr *pcr);
#endif

1553
drivers/mfd/si476x-cmd.c Normal file
View File

File diff suppressed because it is too large Load Diff

886
drivers/mfd/si476x-i2c.c Normal file
View File

@ -0,0 +1,886 @@
/*
* drivers/mfd/si476x-i2c.c -- Core device driver for si476x MFD
* device
*
* Copyright (C) 2012 Innovative Converged Devices(ICD)
* Copyright (C) 2013 Andrey Smirnov
*
* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/regulator/consumer.h>
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/mfd/si476x-core.h>
#define SI476X_MAX_IO_ERRORS 10
#define SI476X_DRIVER_RDS_FIFO_DEPTH 128
/**
* si476x_core_config_pinmux() - pin function configuration function
*
* @core: Core device structure
*
* Configure the functions of the pins of the radio chip.
*
* The function returns zero in case of succes or negative error code
* otherwise.
*/
static int si476x_core_config_pinmux(struct si476x_core *core)
{
int err;
dev_dbg(&core->client->dev, "Configuring pinmux\n");
err = si476x_core_cmd_dig_audio_pin_cfg(core,
core->pinmux.dclk,
core->pinmux.dfs,
core->pinmux.dout,
core->pinmux.xout);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure digital audio pins(err = %d)\n",
err);
return err;
}
err = si476x_core_cmd_zif_pin_cfg(core,
core->pinmux.iqclk,
core->pinmux.iqfs,
core->pinmux.iout,
core->pinmux.qout);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure ZIF pins(err = %d)\n",
err);
return err;
}
err = si476x_core_cmd_ic_link_gpo_ctl_pin_cfg(core,
core->pinmux.icin,
core->pinmux.icip,
core->pinmux.icon,
core->pinmux.icop);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure IC-Link/GPO pins(err = %d)\n",
err);
return err;
}
err = si476x_core_cmd_ana_audio_pin_cfg(core,
core->pinmux.lrout);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure analog audio pins(err = %d)\n",
err);
return err;
}
err = si476x_core_cmd_intb_pin_cfg(core,
core->pinmux.intb,
core->pinmux.a1);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure interrupt pins(err = %d)\n",
err);
return err;
}
return 0;
}
static inline void si476x_core_schedule_polling_work(struct si476x_core *core)
{
schedule_delayed_work(&core->status_monitor,
usecs_to_jiffies(SI476X_STATUS_POLL_US));
}
/**
* si476x_core_start() - early chip startup function
* @core: Core device structure
* @soft: When set, this flag forces "soft" startup, where "soft"
* power down is the one done by sending appropriate command instead
* of using reset pin of the tuner
*
* Perform required startup sequence to correctly power
* up the chip and perform initial configuration. It does the
* following sequence of actions:
* 1. Claims and enables the power supplies VD and VIO1 required
* for I2C interface of the chip operation.
* 2. Waits for 100us, pulls the reset line up, enables irq,
* waits for another 100us as it is specified by the
* datasheet.
* 3. Sends 'POWER_UP' command to the device with all provided
* information about power-up parameters.
* 4. Configures, pin multiplexor, disables digital audio and
* configures interrupt sources.
*
* The function returns zero in case of succes or negative error code
* otherwise.
*/
int si476x_core_start(struct si476x_core *core, bool soft)
{
struct i2c_client *client = core->client;
int err;
if (!soft) {
if (gpio_is_valid(core->gpio_reset))
gpio_set_value_cansleep(core->gpio_reset, 1);
if (client->irq)
enable_irq(client->irq);
udelay(100);
if (!client->irq) {
atomic_set(&core->is_alive, 1);
si476x_core_schedule_polling_work(core);
}
} else {
if (client->irq)
enable_irq(client->irq);
else {
atomic_set(&core->is_alive, 1);
si476x_core_schedule_polling_work(core);
}
}
err = si476x_core_cmd_power_up(core,
&core->power_up_parameters);
if (err < 0) {
dev_err(&core->client->dev,
"Power up failure(err = %d)\n",
err);
goto disable_irq;
}
if (client->irq)
atomic_set(&core->is_alive, 1);
err = si476x_core_config_pinmux(core);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure pinmux(err = %d)\n",
err);
goto disable_irq;
}
if (client->irq) {
err = regmap_write(core->regmap,
SI476X_PROP_INT_CTL_ENABLE,
SI476X_RDSIEN |
SI476X_STCIEN |
SI476X_CTSIEN);
if (err < 0) {
dev_err(&core->client->dev,
"Failed to configure interrupt sources"
"(err = %d)\n", err);
goto disable_irq;
}
}
return 0;
disable_irq:
if (err == -ENODEV)
atomic_set(&core->is_alive, 0);
if (client->irq)
disable_irq(client->irq);
else
cancel_delayed_work_sync(&core->status_monitor);
if (gpio_is_valid(core->gpio_reset))
gpio_set_value_cansleep(core->gpio_reset, 0);
return err;
}
EXPORT_SYMBOL_GPL(si476x_core_start);
/**
* si476x_core_stop() - chip power-down function
* @core: Core device structure
* @soft: When set, function sends a POWER_DOWN command instead of
* bringing reset line low
*
* Power down the chip by performing following actions:
* 1. Disable IRQ or stop the polling worker
* 2. Send the POWER_DOWN command if the power down is soft or bring
* reset line low if not.
*
* The function returns zero in case of succes or negative error code
* otherwise.
*/
int si476x_core_stop(struct si476x_core *core, bool soft)
{
int err = 0;
atomic_set(&core->is_alive, 0);
if (soft) {
/* TODO: This probably shoud be a configurable option,
* so it is possible to have the chips keep their
* oscillators running
*/
struct si476x_power_down_args args = {
.xosc = false,
};
err = si476x_core_cmd_power_down(core, &args);
}
/* We couldn't disable those before
* 'si476x_core_cmd_power_down' since we expect to get CTS
* interrupt */
if (core->client->irq)
disable_irq(core->client->irq);
else
cancel_delayed_work_sync(&core->status_monitor);
if (!soft) {
if (gpio_is_valid(core->gpio_reset))
gpio_set_value_cansleep(core->gpio_reset, 0);
}
return err;
}
EXPORT_SYMBOL_GPL(si476x_core_stop);
/**
* si476x_core_set_power_state() - set the level at which the power is
* supplied for the chip.
* @core: Core device structure
* @next_state: enum si476x_power_state describing power state to
* switch to.
*
* Switch on all the required power supplies
*
* This function returns 0 in case of suvccess and negative error code
* otherwise.
*/
int si476x_core_set_power_state(struct si476x_core *core,
enum si476x_power_state next_state)
{
/*
It is not clear form the datasheet if it is possible to
work with device if not all power domains are operational.
So for now the power-up policy is "power-up all the things!"
*/
int err = 0;
if (core->power_state == SI476X_POWER_INCONSISTENT) {
dev_err(&core->client->dev,
"The device in inconsistent power state\n");
return -EINVAL;
}
if (next_state != core->power_state) {
switch (next_state) {
case SI476X_POWER_UP_FULL:
err = regulator_bulk_enable(ARRAY_SIZE(core->supplies),
core->supplies);
if (err < 0) {
core->power_state = SI476X_POWER_INCONSISTENT;
break;
}
/*
* Startup timing diagram recommends to have a
* 100 us delay between enabling of the power
* supplies and turning the tuner on.
*/
udelay(100);
err = si476x_core_start(core, false);
if (err < 0)
goto disable_regulators;
core->power_state = next_state;
break;
case SI476X_POWER_DOWN:
core->power_state = next_state;
err = si476x_core_stop(core, false);
if (err < 0)
core->power_state = SI476X_POWER_INCONSISTENT;
disable_regulators:
err = regulator_bulk_disable(ARRAY_SIZE(core->supplies),
core->supplies);
if (err < 0)
core->power_state = SI476X_POWER_INCONSISTENT;
break;
default:
BUG();
}
}
return err;
}
EXPORT_SYMBOL_GPL(si476x_core_set_power_state);
/**
* si476x_core_report_drainer_stop() - mark the completion of the RDS
* buffer drain porcess by the worker.
*
* @core: Core device structure
*/
static inline void si476x_core_report_drainer_stop(struct si476x_core *core)
{
mutex_lock(&core->rds_drainer_status_lock);
core->rds_drainer_is_working = false;
mutex_unlock(&core->rds_drainer_status_lock);
}
/**
* si476x_core_start_rds_drainer_once() - start RDS drainer worker if
* ther is none working, do nothing otherwise
*
* @core: Datastructure corresponding to the chip.
*/
static inline void si476x_core_start_rds_drainer_once(struct si476x_core *core)
{
mutex_lock(&core->rds_drainer_status_lock);
if (!core->rds_drainer_is_working) {
core->rds_drainer_is_working = true;
schedule_work(&core->rds_fifo_drainer);
}
mutex_unlock(&core->rds_drainer_status_lock);
}
/**
* si476x_drain_rds_fifo() - RDS buffer drainer.
* @work: struct work_struct being ppassed to the function by the
* kernel.
*
* Drain the contents of the RDS FIFO of
*/
static void si476x_core_drain_rds_fifo(struct work_struct *work)
{
int err;
struct si476x_core *core = container_of(work, struct si476x_core,
rds_fifo_drainer);
struct si476x_rds_status_report report;
si476x_core_lock(core);
err = si476x_core_cmd_fm_rds_status(core, true, false, false, &report);
if (!err) {
int i = report.rdsfifoused;
dev_dbg(&core->client->dev,
"%d elements in RDS FIFO. Draining.\n", i);
for (; i > 0; --i) {
err = si476x_core_cmd_fm_rds_status(core, false, false,
(i == 1), &report);
if (err < 0)
goto unlock;
kfifo_in(&core->rds_fifo, report.rds,
sizeof(report.rds));
dev_dbg(&core->client->dev, "RDS data:\n %*ph\n",
(int)sizeof(report.rds), report.rds);
}
dev_dbg(&core->client->dev, "Drrrrained!\n");
wake_up_interruptible(&core->rds_read_queue);
}
unlock:
si476x_core_unlock(core);
si476x_core_report_drainer_stop(core);
}
/**
* si476x_core_pronounce_dead()
*
* @core: Core device structure
*
* Mark the device as being dead and wake up all potentially waiting
* threads of execution.
*
*/
static void si476x_core_pronounce_dead(struct si476x_core *core)
{
dev_info(&core->client->dev, "Core device is dead.\n");
atomic_set(&core->is_alive, 0);
/* Wake up al possible waiting processes */
wake_up_interruptible(&core->rds_read_queue);
atomic_set(&core->cts, 1);
wake_up(&core->command);
atomic_set(&core->stc, 1);
wake_up(&core->tuning);
}
/**
* si476x_core_i2c_xfer()
*
* @core: Core device structure
* @type: Transfer type
* @buf: Transfer buffer for/with data
* @count: Transfer buffer size
*
* Perfrom and I2C transfer(either read or write) and keep a counter
* of I/O errors. If the error counter rises above the threshold
* pronounce device dead.
*
* The function returns zero on succes or negative error code on
* failure.
*/
int si476x_core_i2c_xfer(struct si476x_core *core,
enum si476x_i2c_type type,
char *buf, int count)
{
static int io_errors_count;
int err;
if (type == SI476X_I2C_SEND)
err = i2c_master_send(core->client, buf, count);
else
err = i2c_master_recv(core->client, buf, count);
if (err < 0) {
if (io_errors_count++ > SI476X_MAX_IO_ERRORS)
si476x_core_pronounce_dead(core);
} else {
io_errors_count = 0;
}
return err;
}
EXPORT_SYMBOL_GPL(si476x_core_i2c_xfer);
/**
* si476x_get_status()
* @core: Core device structure
*
* Get the status byte of the core device by berforming one byte I2C
* read.
*
* The function returns a status value or a negative error code on
* error.
*/
static int si476x_core_get_status(struct si476x_core *core)
{
u8 response;
int err = si476x_core_i2c_xfer(core, SI476X_I2C_RECV,
&response, sizeof(response));
return (err < 0) ? err : response;
}
/**
* si476x_get_and_signal_status() - IRQ dispatcher
* @core: Core device structure
*
* Dispatch the arrived interrupt request based on the value of the
* status byte reported by the tuner.
*
*/
static void si476x_core_get_and_signal_status(struct si476x_core *core)
{
int status = si476x_core_get_status(core);
if (status < 0) {
dev_err(&core->client->dev, "Failed to get status\n");
return;
}
if (status & SI476X_CTS) {
/* Unfortunately completions could not be used for
* signalling CTS since this flag cannot be cleared
* in status byte, and therefore once it becomes true
* multiple calls to 'complete' would cause the
* commands following the current one to be completed
* before they actually are */
dev_dbg(&core->client->dev, "[interrupt] CTSINT\n");
atomic_set(&core->cts, 1);
wake_up(&core->command);
}
if (status & SI476X_FM_RDS_INT) {
dev_dbg(&core->client->dev, "[interrupt] RDSINT\n");
si476x_core_start_rds_drainer_once(core);
}
if (status & SI476X_STC_INT) {
dev_dbg(&core->client->dev, "[interrupt] STCINT\n");
atomic_set(&core->stc, 1);
wake_up(&core->tuning);
}
}
static void si476x_core_poll_loop(struct work_struct *work)
{
struct si476x_core *core = SI476X_WORK_TO_CORE(work);
si476x_core_get_and_signal_status(core);
if (atomic_read(&core->is_alive))
si476x_core_schedule_polling_work(core);
}
static irqreturn_t si476x_core_interrupt(int irq, void *dev)
{
struct si476x_core *core = dev;
si476x_core_get_and_signal_status(core);
return IRQ_HANDLED;
}
/**
* si476x_firmware_version_to_revision()
* @core: Core device structure
* @major: Firmware major number
* @minor1: Firmware first minor number
* @minor2: Firmware second minor number
*
* Convert a chip's firmware version number into an offset that later
* will be used to as offset in "vtable" of tuner functions
*
* This function returns a positive offset in case of success and a -1
* in case of failure.
*/
static int si476x_core_fwver_to_revision(struct si476x_core *core,
int func, int major,
int minor1, int minor2)
{
switch (func) {
case SI476X_FUNC_FM_RECEIVER:
switch (major) {
case 5:
return SI476X_REVISION_A10;
case 8:
return SI476X_REVISION_A20;
case 10:
return SI476X_REVISION_A30;
default:
goto unknown_revision;
}
case SI476X_FUNC_AM_RECEIVER:
switch (major) {
case 5:
return SI476X_REVISION_A10;
case 7:
return SI476X_REVISION_A20;
case 9:
return SI476X_REVISION_A30;
default:
goto unknown_revision;
}
case SI476X_FUNC_WB_RECEIVER:
switch (major) {
case 3:
return SI476X_REVISION_A10;
case 5:
return SI476X_REVISION_A20;
case 7:
return SI476X_REVISION_A30;
default:
goto unknown_revision;
}
case SI476X_FUNC_BOOTLOADER:
default: /* FALLTHROUG */
BUG();
return -1;
}
unknown_revision:
dev_err(&core->client->dev,
"Unsupported version of the firmware: %d.%d.%d, "
"reverting to A10 comptible functions\n",
major, minor1, minor2);
return SI476X_REVISION_A10;
}
/**
* si476x_get_revision_info()
* @core: Core device structure
*
* Get the firmware version number of the device. It is done in
* following three steps:
* 1. Power-up the device
* 2. Send the 'FUNC_INFO' command
* 3. Powering the device down.
*
* The function return zero on success and a negative error code on
* failure.
*/
static int si476x_core_get_revision_info(struct si476x_core *core)
{
int rval;
struct si476x_func_info info;
si476x_core_lock(core);
rval = si476x_core_set_power_state(core, SI476X_POWER_UP_FULL);
if (rval < 0)
goto exit;
rval = si476x_core_cmd_func_info(core, &info);
if (rval < 0)
goto power_down;
core->revision = si476x_core_fwver_to_revision(core, info.func,
info.firmware.major,
info.firmware.minor[0],
info.firmware.minor[1]);
power_down:
si476x_core_set_power_state(core, SI476X_POWER_DOWN);
exit:
si476x_core_unlock(core);
return rval;
}
bool si476x_core_has_am(struct si476x_core *core)
{
return core->chip_id == SI476X_CHIP_SI4761 ||
core->chip_id == SI476X_CHIP_SI4764;
}
EXPORT_SYMBOL_GPL(si476x_core_has_am);
bool si476x_core_has_diversity(struct si476x_core *core)
{
return core->chip_id == SI476X_CHIP_SI4764;
}
EXPORT_SYMBOL_GPL(si476x_core_has_diversity);
bool si476x_core_is_a_secondary_tuner(struct si476x_core *core)
{
return si476x_core_has_diversity(core) &&
(core->diversity_mode == SI476X_PHDIV_SECONDARY_ANTENNA ||
core->diversity_mode == SI476X_PHDIV_SECONDARY_COMBINING);
}
EXPORT_SYMBOL_GPL(si476x_core_is_a_secondary_tuner);
bool si476x_core_is_a_primary_tuner(struct si476x_core *core)
{
return si476x_core_has_diversity(core) &&
(core->diversity_mode == SI476X_PHDIV_PRIMARY_ANTENNA ||
core->diversity_mode == SI476X_PHDIV_PRIMARY_COMBINING);
}
EXPORT_SYMBOL_GPL(si476x_core_is_a_primary_tuner);
bool si476x_core_is_in_am_receiver_mode(struct si476x_core *core)
{
return si476x_core_has_am(core) &&
(core->power_up_parameters.func == SI476X_FUNC_AM_RECEIVER);
}
EXPORT_SYMBOL_GPL(si476x_core_is_in_am_receiver_mode);
bool si476x_core_is_powered_up(struct si476x_core *core)
{
return core->power_state == SI476X_POWER_UP_FULL;
}
EXPORT_SYMBOL_GPL(si476x_core_is_powered_up);
static int si476x_core_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
int rval;
struct si476x_core *core;
struct si476x_platform_data *pdata;
struct mfd_cell *cell;
int cell_num;
core = devm_kzalloc(&client->dev, sizeof(*core), GFP_KERNEL);
if (!core) {
dev_err(&client->dev,
"failed to allocate 'struct si476x_core'\n");
return -ENOMEM;
}
core->client = client;
core->regmap = devm_regmap_init_si476x(core);
if (IS_ERR(core->regmap)) {
rval = PTR_ERR(core->regmap);
dev_err(&client->dev,
"Failed to allocate register map: %d\n",
rval);
return rval;
}
i2c_set_clientdata(client, core);
atomic_set(&core->is_alive, 0);
core->power_state = SI476X_POWER_DOWN;
pdata = client->dev.platform_data;
if (pdata) {
memcpy(&core->power_up_parameters,
&pdata->power_up_parameters,
sizeof(core->power_up_parameters));
core->gpio_reset = -1;
if (gpio_is_valid(pdata->gpio_reset)) {
rval = gpio_request(pdata->gpio_reset, "si476x reset");
if (rval) {
dev_err(&client->dev,
"Failed to request gpio: %d\n", rval);
return rval;
}
core->gpio_reset = pdata->gpio_reset;
gpio_direction_output(core->gpio_reset, 0);
}
core->diversity_mode = pdata->diversity_mode;
memcpy(&core->pinmux, &pdata->pinmux,
sizeof(struct si476x_pinmux));
} else {
dev_err(&client->dev, "No platform data provided\n");
return -EINVAL;
}
core->supplies[0].supply = "vd";
core->supplies[1].supply = "va";
core->supplies[2].supply = "vio1";
core->supplies[3].supply = "vio2";
rval = devm_regulator_bulk_get(&client->dev,
ARRAY_SIZE(core->supplies),
core->supplies);
if (rval) {
dev_err(&client->dev, "Failet to gett all of the regulators\n");
goto free_gpio;
}
mutex_init(&core->cmd_lock);
init_waitqueue_head(&core->command);
init_waitqueue_head(&core->tuning);
rval = kfifo_alloc(&core->rds_fifo,
SI476X_DRIVER_RDS_FIFO_DEPTH *
sizeof(struct v4l2_rds_data),
GFP_KERNEL);
if (rval) {
dev_err(&client->dev, "Could not alloate the FIFO\n");
goto free_gpio;
}
mutex_init(&core->rds_drainer_status_lock);
init_waitqueue_head(&core->rds_read_queue);
INIT_WORK(&core->rds_fifo_drainer, si476x_core_drain_rds_fifo);
if (client->irq) {
rval = devm_request_threaded_irq(&client->dev,
client->irq, NULL,
si476x_core_interrupt,
IRQF_TRIGGER_FALLING,
client->name, core);
if (rval < 0) {
dev_err(&client->dev, "Could not request IRQ %d\n",
client->irq);
goto free_kfifo;
}
disable_irq(client->irq);
dev_dbg(&client->dev, "IRQ requested.\n");
core->rds_fifo_depth = 20;
} else {
INIT_DELAYED_WORK(&core->status_monitor,
si476x_core_poll_loop);
dev_info(&client->dev,
"No IRQ number specified, will use polling\n");
core->rds_fifo_depth = 5;
}
core->chip_id = id->driver_data;
rval = si476x_core_get_revision_info(core);
if (rval < 0) {
rval = -ENODEV;
goto free_kfifo;
}
cell_num = 0;
cell = &core->cells[SI476X_RADIO_CELL];
cell->name = "si476x-radio";
cell_num++;
#ifdef CONFIG_SND_SOC_SI476X
if ((core->chip_id == SI476X_CHIP_SI4761 ||
core->chip_id == SI476X_CHIP_SI4764) &&
core->pinmux.dclk == SI476X_DCLK_DAUDIO &&
core->pinmux.dfs == SI476X_DFS_DAUDIO &&
core->pinmux.dout == SI476X_DOUT_I2S_OUTPUT &&
core->pinmux.xout == SI476X_XOUT_TRISTATE) {
cell = &core->cells[SI476X_CODEC_CELL];
cell->name = "si476x-codec";
cell_num++;
}
#endif
rval = mfd_add_devices(&client->dev,
(client->adapter->nr << 8) + client->addr,
core->cells, cell_num,
NULL, 0, NULL);
if (!rval)
return 0;
free_kfifo:
kfifo_free(&core->rds_fifo);
free_gpio:
if (gpio_is_valid(core->gpio_reset))
gpio_free(core->gpio_reset);
return rval;
}
static int si476x_core_remove(struct i2c_client *client)
{
struct si476x_core *core = i2c_get_clientdata(client);
si476x_core_pronounce_dead(core);
mfd_remove_devices(&client->dev);
if (client->irq)
disable_irq(client->irq);
else
cancel_delayed_work_sync(&core->status_monitor);
kfifo_free(&core->rds_fifo);
if (gpio_is_valid(core->gpio_reset))
gpio_free(core->gpio_reset);
return 0;
}
static const struct i2c_device_id si476x_id[] = {
{ "si4761", SI476X_CHIP_SI4761 },
{ "si4764", SI476X_CHIP_SI4764 },
{ "si4768", SI476X_CHIP_SI4768 },
{ },
};
MODULE_DEVICE_TABLE(i2c, si476x_id);
static struct i2c_driver si476x_core_driver = {
.driver = {
.name = "si476x-core",
.owner = THIS_MODULE,
},
.probe = si476x_core_probe,
.remove = si476x_core_remove,
.id_table = si476x_id,
};
module_i2c_driver(si476x_core_driver);
MODULE_AUTHOR("Andrey Smirnov <andrew.smirnov@gmail.com>");
MODULE_DESCRIPTION("Si4761/64/68 AM/FM MFD core device driver");
MODULE_LICENSE("GPL");

241
drivers/mfd/si476x-prop.c Normal file
View File

@ -0,0 +1,241 @@
/*
* drivers/mfd/si476x-prop.c -- Subroutines to access
* properties of si476x chips
*
* Copyright (C) 2012 Innovative Converged Devices(ICD)
* Copyright (C) 2013 Andrey Smirnov
*
* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
#include <linux/module.h>
#include <linux/mfd/si476x-core.h>
struct si476x_property_range {
u16 low, high;
};
static bool si476x_core_element_is_in_array(u16 element,
const u16 array[],
size_t size)
{
int i;
for (i = 0; i < size; i++)
if (element == array[i])
return true;
return false;
}
static bool si476x_core_element_is_in_range(u16 element,
const struct si476x_property_range range[],
size_t size)
{
int i;
for (i = 0; i < size; i++)
if (element <= range[i].high && element >= range[i].low)
return true;
return false;
}
static bool si476x_core_is_valid_property_a10(struct si476x_core *core,
u16 property)
{
static const u16 valid_properties[] = {
0x0000,
0x0500, 0x0501,
0x0600,
0x0709, 0x070C, 0x070D, 0x70E, 0x710,
0x0718,
0x1207, 0x1208,
0x2007,
0x2300,
};
static const struct si476x_property_range valid_ranges[] = {
{ 0x0200, 0x0203 },
{ 0x0300, 0x0303 },
{ 0x0400, 0x0404 },
{ 0x0700, 0x0707 },
{ 0x1100, 0x1102 },
{ 0x1200, 0x1204 },
{ 0x1300, 0x1306 },
{ 0x2000, 0x2005 },
{ 0x2100, 0x2104 },
{ 0x2106, 0x2106 },
{ 0x2200, 0x220E },
{ 0x3100, 0x3104 },
{ 0x3207, 0x320F },
{ 0x3300, 0x3304 },
{ 0x3500, 0x3517 },
{ 0x3600, 0x3617 },
{ 0x3700, 0x3717 },
{ 0x4000, 0x4003 },
};
return si476x_core_element_is_in_range(property, valid_ranges,
ARRAY_SIZE(valid_ranges)) ||
si476x_core_element_is_in_array(property, valid_properties,
ARRAY_SIZE(valid_properties));
}
static bool si476x_core_is_valid_property_a20(struct si476x_core *core,
u16 property)
{
static const u16 valid_properties[] = {
0x071B,
0x1006,
0x2210,
0x3401,
};
static const struct si476x_property_range valid_ranges[] = {
{ 0x2215, 0x2219 },
};
return si476x_core_is_valid_property_a10(core, property) ||
si476x_core_element_is_in_range(property, valid_ranges,
ARRAY_SIZE(valid_ranges)) ||
si476x_core_element_is_in_array(property, valid_properties,
ARRAY_SIZE(valid_properties));
}
static bool si476x_core_is_valid_property_a30(struct si476x_core *core,
u16 property)
{
static const u16 valid_properties[] = {
0x071C, 0x071D,
0x1007, 0x1008,
0x220F, 0x2214,
0x2301,
0x3105, 0x3106,
0x3402,
};
static const struct si476x_property_range valid_ranges[] = {
{ 0x0405, 0x0411 },
{ 0x2008, 0x200B },
{ 0x2220, 0x2223 },
{ 0x3100, 0x3106 },
};
return si476x_core_is_valid_property_a20(core, property) ||
si476x_core_element_is_in_range(property, valid_ranges,
ARRAY_SIZE(valid_ranges)) ||
si476x_core_element_is_in_array(property, valid_properties,
ARRAY_SIZE(valid_properties));
}
typedef bool (*valid_property_pred_t) (struct si476x_core *, u16);
static bool si476x_core_is_valid_property(struct si476x_core *core,
u16 property)
{
static const valid_property_pred_t is_valid_property[] = {
[SI476X_REVISION_A10] = si476x_core_is_valid_property_a10,
[SI476X_REVISION_A20] = si476x_core_is_valid_property_a20,
[SI476X_REVISION_A30] = si476x_core_is_valid_property_a30,
};
BUG_ON(core->revision > SI476X_REVISION_A30 ||
core->revision == -1);
return is_valid_property[core->revision](core, property);
}
static bool si476x_core_is_readonly_property(struct si476x_core *core,
u16 property)
{
BUG_ON(core->revision > SI476X_REVISION_A30 ||
core->revision == -1);
switch (core->revision) {
case SI476X_REVISION_A10:
return (property == 0x3200);
case SI476X_REVISION_A20:
return (property == 0x1006 ||
property == 0x2210 ||
property == 0x3200);
case SI476X_REVISION_A30:
return false;
}
return false;
}
static bool si476x_core_regmap_readable_register(struct device *dev,
unsigned int reg)
{
struct i2c_client *client = to_i2c_client(dev);
struct si476x_core *core = i2c_get_clientdata(client);
return si476x_core_is_valid_property(core, (u16) reg);
}
static bool si476x_core_regmap_writable_register(struct device *dev,
unsigned int reg)
{
struct i2c_client *client = to_i2c_client(dev);
struct si476x_core *core = i2c_get_clientdata(client);
return si476x_core_is_valid_property(core, (u16) reg) &&
!si476x_core_is_readonly_property(core, (u16) reg);
}
static int si476x_core_regmap_write(void *context, unsigned int reg,
unsigned int val)
{
return si476x_core_cmd_set_property(context, reg, val);
}
static int si476x_core_regmap_read(void *context, unsigned int reg,
unsigned *val)
{
struct si476x_core *core = context;
int err;
err = si476x_core_cmd_get_property(core, reg);
if (err < 0)
return err;
*val = err;
return 0;
}
static const struct regmap_config si476x_regmap_config = {
.reg_bits = 16,
.val_bits = 16,
.max_register = 0x4003,
.writeable_reg = si476x_core_regmap_writable_register,
.readable_reg = si476x_core_regmap_readable_register,
.reg_read = si476x_core_regmap_read,
.reg_write = si476x_core_regmap_write,
.cache_type = REGCACHE_RBTREE,
};
struct regmap *devm_regmap_init_si476x(struct si476x_core *core)
{
return devm_regmap_init(&core->client->dev, NULL,
core, &si476x_regmap_config);
}
EXPORT_SYMBOL_GPL(devm_regmap_init_si476x);

11
drivers/mfd/sta2x11-mfd.c
View File

@ -98,17 +98,6 @@ static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
return 0;
}
static int mfd_remove(struct pci_dev *pdev)
{
struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
if (!mfd)
return -ENODEV;
list_del(&mfd->list);
kfree(mfd);
return 0;
}
/* This function is exported and is not expected to fail */
u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
enum sta2x11_mfd_plat_dev index)

1
drivers/mfd/stmpe-i2c.c
View File

@ -75,6 +75,7 @@ static const struct i2c_device_id stmpe_i2c_id[] = {
{ "stmpe801", STMPE801 },
{ "stmpe811", STMPE811 },
{ "stmpe1601", STMPE1601 },
{ "stmpe1801", STMPE1801 },
{ "stmpe2401", STMPE2401 },
{ "stmpe2403", STMPE2403 },
{ }

2
drivers/mfd/stmpe-spi.c
View File

@ -103,7 +103,7 @@ stmpe_spi_probe(struct spi_device *spi)
static int stmpe_spi_remove(struct spi_device *spi)
{
struct stmpe *stmpe = dev_get_drvdata(&spi->dev);
struct stmpe *stmpe = spi_get_drvdata(spi);
return stmpe_remove(stmpe);
}

105
drivers/mfd/stmpe.c
View File

@ -19,6 +19,7 @@
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/mfd/core.h>
#include <linux/delay.h>
#include "stmpe.h"
static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
@ -642,6 +643,88 @@ static struct stmpe_variant_info stmpe1601 = {
.enable_autosleep = stmpe1601_autosleep,
};
/*
* STMPE1801
*/
static const u8 stmpe1801_regs[] = {
[STMPE_IDX_CHIP_ID] = STMPE1801_REG_CHIP_ID,
[STMPE_IDX_ICR_LSB] = STMPE1801_REG_INT_CTRL_LOW,
[STMPE_IDX_IER_LSB] = STMPE1801_REG_INT_EN_MASK_LOW,
[STMPE_IDX_ISR_LSB] = STMPE1801_REG_INT_STA_LOW,
[STMPE_IDX_GPMR_LSB] = STMPE1801_REG_GPIO_MP_LOW,
[STMPE_IDX_GPSR_LSB] = STMPE1801_REG_GPIO_SET_LOW,
[STMPE_IDX_GPCR_LSB] = STMPE1801_REG_GPIO_CLR_LOW,
[STMPE_IDX_GPDR_LSB] = STMPE1801_REG_GPIO_SET_DIR_LOW,
[STMPE_IDX_GPRER_LSB] = STMPE1801_REG_GPIO_RE_LOW,
[STMPE_IDX_GPFER_LSB] = STMPE1801_REG_GPIO_FE_LOW,
[STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
[STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW,
};
static struct stmpe_variant_block stmpe1801_blocks[] = {
{
.cell = &stmpe_gpio_cell,
.irq = STMPE1801_IRQ_GPIOC,
.block = STMPE_BLOCK_GPIO,
},
{
.cell = &stmpe_keypad_cell,
.irq = STMPE1801_IRQ_KEYPAD,
.block = STMPE_BLOCK_KEYPAD,
},
};
static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
bool enable)
{
unsigned int mask = 0;
if (blocks & STMPE_BLOCK_GPIO)
mask |= STMPE1801_MSK_INT_EN_GPIO;
if (blocks & STMPE_BLOCK_KEYPAD)
mask |= STMPE1801_MSK_INT_EN_KPC;
return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
enable ? mask : 0);
}
static int stmpe1801_reset(struct stmpe *stmpe)
{
unsigned long timeout;
int ret = 0;
ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL,
STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET);
if (ret < 0)
return ret;
timeout = jiffies + msecs_to_jiffies(100);
while (time_before(jiffies, timeout)) {
ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);
if (ret < 0)
return ret;
if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET))
return 0;
usleep_range(100, 200);
};
return -EIO;
}
static struct stmpe_variant_info stmpe1801 = {
.name = "stmpe1801",
.id_val = STMPE1801_ID,
.id_mask = 0xfff0,
.num_gpios = 18,
.af_bits = 0,
.regs = stmpe1801_regs,
.blocks = stmpe1801_blocks,
.num_blocks = ARRAY_SIZE(stmpe1801_blocks),
.num_irqs = STMPE1801_NR_INTERNAL_IRQS,
.enable = stmpe1801_enable,
/* stmpe1801 do not have any gpio alternate function */
.get_altfunc = NULL,
};
/*
* STMPE24XX
*/
@ -740,6 +823,7 @@ static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
[STMPE801] = &stmpe801,
[STMPE811] = &stmpe811,
[STMPE1601] = &stmpe1601,
[STMPE1801] = &stmpe1801,
[STMPE2401] = &stmpe2401,
[STMPE2403] = &stmpe2403,
};
@ -759,7 +843,7 @@ static irqreturn_t stmpe_irq(int irq, void *data)
struct stmpe *stmpe = data;
struct stmpe_variant_info *variant = stmpe->variant;
int num = DIV_ROUND_UP(variant->num_irqs, 8);
u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
u8 israddr;
u8 isr[num];
int ret;
int i;
@ -771,6 +855,11 @@ static irqreturn_t stmpe_irq(int irq, void *data)
return IRQ_HANDLED;
}
if (variant->id_val == STMPE1801_ID)
israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
else
israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
ret = stmpe_block_read(stmpe, israddr, num, isr);
if (ret < 0)
return IRQ_NONE;
@ -938,6 +1027,12 @@ static int stmpe_chip_init(struct stmpe *stmpe)
if (ret)
return ret;
if (id == STMPE1801_ID) {
ret = stmpe1801_reset(stmpe);
if (ret < 0)
return ret;
}
if (stmpe->irq >= 0) {
if (id == STMPE801_ID)
icr = STMPE801_REG_SYS_CTRL_INT_EN;
@ -1015,7 +1110,10 @@ void stmpe_of_probe(struct stmpe_platform_data *pdata, struct device_node *np)
{
struct device_node *child;
pdata->id = -1;
pdata->id = of_alias_get_id(np, "stmpe-i2c");
if (pdata->id < 0)
pdata->id = -1;
pdata->irq_trigger = IRQF_TRIGGER_NONE;
of_property_read_u32(np, "st,autosleep-timeout",
@ -1057,6 +1155,9 @@ int stmpe_probe(struct stmpe_client_info *ci, int partnum)
return -ENOMEM;
stmpe_of_probe(pdata, np);
if (of_find_property(np, "interrupts", NULL) == NULL)
ci->irq = -1;
}
stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);

49
drivers/mfd/stmpe.h
View File

@ -198,6 +198,55 @@ int stmpe_remove(struct stmpe *stmpe);
#define STMPE1601_AUTOSLEEP_TIMEOUT_MASK (0x7)
#define STPME1601_AUTOSLEEP_ENABLE (1 << 3)
/*
* STMPE1801
*/
#define STMPE1801_ID 0xc110
#define STMPE1801_NR_INTERNAL_IRQS 5
#define STMPE1801_IRQ_KEYPAD_COMBI 4
#define STMPE1801_IRQ_GPIOC 3
#define STMPE1801_IRQ_KEYPAD_OVER 2
#define STMPE1801_IRQ_KEYPAD 1
#define STMPE1801_IRQ_WAKEUP 0
#define STMPE1801_REG_CHIP_ID 0x00
#define STMPE1801_REG_SYS_CTRL 0x02
#define STMPE1801_REG_INT_CTRL_LOW 0x04
#define STMPE1801_REG_INT_EN_MASK_LOW 0x06
#define STMPE1801_REG_INT_STA_LOW 0x08
#define STMPE1801_REG_INT_EN_GPIO_MASK_LOW 0x0A
#define STMPE1801_REG_INT_EN_GPIO_MASK_MID 0x0B
#define STMPE1801_REG_INT_EN_GPIO_MASK_HIGH 0x0C
#define STMPE1801_REG_INT_STA_GPIO_LOW 0x0D
#define STMPE1801_REG_INT_STA_GPIO_MID 0x0E
#define STMPE1801_REG_INT_STA_GPIO_HIGH 0x0F
#define STMPE1801_REG_GPIO_SET_LOW 0x10
#define STMPE1801_REG_GPIO_SET_MID 0x11
#define STMPE1801_REG_GPIO_SET_HIGH 0x12
#define STMPE1801_REG_GPIO_CLR_LOW 0x13
#define STMPE1801_REG_GPIO_CLR_MID 0x14
#define STMPE1801_REG_GPIO_CLR_HIGH 0x15
#define STMPE1801_REG_GPIO_MP_LOW 0x16
#define STMPE1801_REG_GPIO_MP_MID 0x17
#define STMPE1801_REG_GPIO_MP_HIGH 0x18
#define STMPE1801_REG_GPIO_SET_DIR_LOW 0x19
#define STMPE1801_REG_GPIO_SET_DIR_MID 0x1A
#define STMPE1801_REG_GPIO_SET_DIR_HIGH 0x1B
#define STMPE1801_REG_GPIO_RE_LOW 0x1C
#define STMPE1801_REG_GPIO_RE_MID 0x1D
#define STMPE1801_REG_GPIO_RE_HIGH 0x1E
#define STMPE1801_REG_GPIO_FE_LOW 0x1F
#define STMPE1801_REG_GPIO_FE_MID 0x20
#define STMPE1801_REG_GPIO_FE_HIGH 0x21
#define STMPE1801_REG_GPIO_PULL_UP_LOW 0x22
#define STMPE1801_REG_GPIO_PULL_UP_MID 0x23
#define STMPE1801_REG_GPIO_PULL_UP_HIGH 0x24
#define STMPE1801_MSK_SYS_CTRL_RESET (1 << 7)
#define STMPE1801_MSK_INT_EN_KPC (1 << 1)
#define STMPE1801_MSK_INT_EN_GPIO (1 << 3)
/*
* STMPE24xx
*/

80
drivers/mfd/syscon.c
View File

@ -25,17 +25,15 @@
static struct platform_driver syscon_driver;
struct syscon {
struct device *dev;
void __iomem *base;
struct regmap *regmap;
};
static int syscon_match(struct device *dev, void *data)
static int syscon_match_node(struct device *dev, void *data)
{
struct syscon *syscon = dev_get_drvdata(dev);
struct device_node *dn = data;
return (syscon->dev->of_node == dn) ? 1 : 0;
return (dev->of_node == dn) ? 1 : 0;
}
struct regmap *syscon_node_to_regmap(struct device_node *np)
@ -44,7 +42,7 @@ struct regmap *syscon_node_to_regmap(struct device_node *np)
struct device *dev;
dev = driver_find_device(&syscon_driver.driver, NULL, np,
syscon_match);
syscon_match_node);
if (!dev)
return ERR_PTR(-EPROBE_DEFER);
@ -70,6 +68,34 @@ struct regmap *syscon_regmap_lookup_by_compatible(const char *s)
}
EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_compatible);
static int syscon_match_pdevname(struct device *dev, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
const struct platform_device_id *id = platform_get_device_id(pdev);
if (id)
if (!strcmp(id->name, (const char *)data))
return 1;
return !strcmp(dev_name(dev), (const char *)data);
}
struct regmap *syscon_regmap_lookup_by_pdevname(const char *s)
{
struct device *dev;
struct syscon *syscon;
dev = driver_find_device(&syscon_driver.driver, NULL, (void *)s,
syscon_match_pdevname);
if (!dev)
return ERR_PTR(-EPROBE_DEFER);
syscon = dev_get_drvdata(dev);
return syscon->regmap;
}
EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_pdevname);
struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np,
const char *property)
{
@ -101,28 +127,22 @@ static struct regmap_config syscon_regmap_config = {
static int syscon_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct syscon *syscon;
struct resource res;
int ret;
struct resource *res;
if (!np)
return -ENOENT;
syscon = devm_kzalloc(dev, sizeof(struct syscon),
GFP_KERNEL);
syscon = devm_kzalloc(dev, sizeof(*syscon), GFP_KERNEL);
if (!syscon)
return -ENOMEM;
syscon->base = of_iomap(np, 0);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENOENT;
syscon->base = devm_ioremap(dev, res->start, resource_size(res));
if (!syscon->base)
return -EADDRNOTAVAIL;
return -ENOMEM;
ret = of_address_to_resource(np, 0, &res);
if (ret)
return ret;
syscon_regmap_config.max_register = res.end - res.start - 3;
syscon_regmap_config.max_register = res->end - res->start - 3;
syscon->regmap = devm_regmap_init_mmio(dev, syscon->base,
&syscon_regmap_config);
if (IS_ERR(syscon->regmap)) {
@ -130,25 +150,17 @@ static int syscon_probe(struct platform_device *pdev)
return PTR_ERR(syscon->regmap);
}
syscon->dev = dev;
platform_set_drvdata(pdev, syscon);
dev_info(dev, "syscon regmap start 0x%x end 0x%x registered\n",
res.start, res.end);
dev_info(dev, "regmap %pR registered\n", res);
return 0;
}
static int syscon_remove(struct platform_device *pdev)
{
struct syscon *syscon;
syscon = platform_get_drvdata(pdev);
iounmap(syscon->base);
platform_set_drvdata(pdev, NULL);
return 0;
}
static const struct platform_device_id syscon_ids[] = {
{ "syscon", },
{ }
};
static struct platform_driver syscon_driver = {
.driver = {
@ -157,7 +169,7 @@ static struct platform_driver syscon_driver = {
.of_match_table = of_syscon_match,
},
.probe = syscon_probe,
.remove = syscon_remove,
.id_table = syscon_ids,
};
static int __init syscon_init(void)

21
drivers/mfd/tc3589x.c
View File

@ -350,7 +350,8 @@ static int tc3589x_probe(struct i2c_client *i2c,
| I2C_FUNC_SMBUS_I2C_BLOCK))
return -EIO;
tc3589x = kzalloc(sizeof(struct tc3589x), GFP_KERNEL);
tc3589x = devm_kzalloc(&i2c->dev, sizeof(struct tc3589x),
GFP_KERNEL);
if (!tc3589x)
return -ENOMEM;
@ -366,33 +367,27 @@ static int tc3589x_probe(struct i2c_client *i2c,
ret = tc3589x_chip_init(tc3589x);
if (ret)
goto out_free;
return ret;
ret = tc3589x_irq_init(tc3589x, np);
if (ret)
goto out_free;
return ret;
ret = request_threaded_irq(tc3589x->i2c->irq, NULL, tc3589x_irq,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
"tc3589x", tc3589x);
if (ret) {
dev_err(tc3589x->dev, "failed to request IRQ: %d\n", ret);
goto out_free;
return ret;
}
ret = tc3589x_device_init(tc3589x);
if (ret) {
dev_err(tc3589x->dev, "failed to add child devices\n");
goto out_freeirq;
return ret;
}
return 0;
out_freeirq:
free_irq(tc3589x->i2c->irq, tc3589x);
out_free:
kfree(tc3589x);
return ret;
}
static int tc3589x_remove(struct i2c_client *client)
@ -401,10 +396,6 @@ static int tc3589x_remove(struct i2c_client *client)
mfd_remove_devices(tc3589x->dev);
free_irq(tc3589x->i2c->irq, tc3589x);
kfree(tc3589x);
return 0;
}

11
drivers/mfd/tps65090.c
View File

@ -56,12 +56,23 @@
#define TPS65090_INT2_MASK_OVERLOAD_FET6 6
#define TPS65090_INT2_MASK_OVERLOAD_FET7 7
static struct resource charger_resources[] = {
{
.start = TPS65090_IRQ_VAC_STATUS_CHANGE,
.end = TPS65090_IRQ_VAC_STATUS_CHANGE,
.flags = IORESOURCE_IRQ,
}
};
static struct mfd_cell tps65090s[] = {
{
.name = "tps65090-pmic",
},
{
.name = "tps65090-charger",
.num_resources = ARRAY_SIZE(charger_resources),
.resources = &charger_resources[0],
.of_compatible = "ti,tps65090-charger",
},
};

14
drivers/mfd/twl4030-madc.c
View File

@ -211,12 +211,14 @@ static int twl4030battery_current(int raw_volt)
* @reg_base - Base address of the first channel
* @Channels - 16 bit bitmap. If the bit is set, channel value is read
* @buf - The channel values are stored here. if read fails error
* @raw - Return raw values without conversion
* value is stored
* Returns the number of successfully read channels.
*/
static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
u8 reg_base, unsigned
long channels, int *buf)
long channels, int *buf,
bool raw)
{
int count = 0, count_req = 0, i;
u8 reg;
@ -230,6 +232,10 @@ static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
count_req++;
continue;
}
if (raw) {
count++;
continue;
}
switch (i) {
case 10:
buf[i] = twl4030battery_current(buf[i]);
@ -371,7 +377,7 @@ static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
method = &twl4030_conversion_methods[r->method];
/* Read results */
len = twl4030_madc_read_channels(madc, method->rbase,
r->channels, r->rbuf);
r->channels, r->rbuf, r->raw);
/* Return results to caller */
if (r->func_cb != NULL) {
r->func_cb(len, r->channels, r->rbuf);
@ -397,7 +403,7 @@ err_i2c:
method = &twl4030_conversion_methods[r->method];
/* Read results */
len = twl4030_madc_read_channels(madc, method->rbase,
r->channels, r->rbuf);
r->channels, r->rbuf, r->raw);
/* Return results to caller */
if (r->func_cb != NULL) {
r->func_cb(len, r->channels, r->rbuf);
@ -585,7 +591,7 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
goto out;
}
ret = twl4030_madc_read_channels(twl4030_madc, method->rbase,
req->channels, req->rbuf);
req->channels, req->rbuf, req->raw);
twl4030_madc->requests[req->method].active = 0;
out:

31
drivers/mfd/twl6040.c
View File

@ -554,7 +554,7 @@ static int twl6040_probe(struct i2c_client *client,
twl6040->supplies[0].supply = "vio";
twl6040->supplies[1].supply = "v2v1";
ret = regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
twl6040->supplies);
if (ret != 0) {
dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
@ -564,7 +564,7 @@ static int twl6040_probe(struct i2c_client *client,
ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
if (ret != 0) {
dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
goto power_err;
goto regulator_get_err;
}
twl6040->dev = &client->dev;
@ -586,8 +586,8 @@ static int twl6040_probe(struct i2c_client *client,
twl6040->audpwron = -EINVAL;
if (gpio_is_valid(twl6040->audpwron)) {
ret = gpio_request_one(twl6040->audpwron, GPIOF_OUT_INIT_LOW,
"audpwron");
ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
GPIOF_OUT_INIT_LOW, "audpwron");
if (ret)
goto gpio_err;
}
@ -596,14 +596,14 @@ static int twl6040_probe(struct i2c_client *client,
IRQF_ONESHOT, 0, &twl6040_irq_chip,
&twl6040->irq_data);
if (ret < 0)
goto irq_init_err;
goto gpio_err;
twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
TWL6040_IRQ_READY);
twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
TWL6040_IRQ_TH);
ret = request_threaded_irq(twl6040->irq_ready, NULL,
ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
twl6040_readyint_handler, IRQF_ONESHOT,
"twl6040_irq_ready", twl6040);
if (ret) {
@ -611,7 +611,7 @@ static int twl6040_probe(struct i2c_client *client,
goto readyirq_err;
}
ret = request_threaded_irq(twl6040->irq_th, NULL,
ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
twl6040_thint_handler, IRQF_ONESHOT,
"twl6040_irq_th", twl6040);
if (ret) {
@ -681,18 +681,13 @@ static int twl6040_probe(struct i2c_client *client,
return 0;
mfd_err:
free_irq(twl6040->irq_th, twl6040);
devm_free_irq(&client->dev, twl6040->irq_th, twl6040);
thirq_err:
free_irq(twl6040->irq_ready, twl6040);
devm_free_irq(&client->dev, twl6040->irq_ready, twl6040);
readyirq_err:
regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
irq_init_err:
if (gpio_is_valid(twl6040->audpwron))
gpio_free(twl6040->audpwron);
gpio_err:
regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
power_err:
regulator_bulk_free(TWL6040_NUM_SUPPLIES, twl6040->supplies);
regulator_get_err:
i2c_set_clientdata(client, NULL);
err:
@ -706,18 +701,14 @@ static int twl6040_remove(struct i2c_client *client)
if (twl6040->power_count)
twl6040_power(twl6040, 0);
if (gpio_is_valid(twl6040->audpwron))
gpio_free(twl6040->audpwron);
free_irq(twl6040->irq_ready, twl6040);
free_irq(twl6040->irq_th, twl6040);
devm_free_irq(&client->dev, twl6040->irq_ready, twl6040);
devm_free_irq(&client->dev, twl6040->irq_th, twl6040);
regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
mfd_remove_devices(&client->dev);
i2c_set_clientdata(client, NULL);
regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
regulator_bulk_free(TWL6040_NUM_SUPPLIES, twl6040->supplies);
return 0;
}

5
drivers/mfd/ucb1400_core.c
View File

@ -75,6 +75,11 @@ static int ucb1400_core_probe(struct device *dev)
/* GPIO */
ucb_gpio.ac97 = ac97;
if (pdata) {
ucb_gpio.gpio_setup = pdata->gpio_setup;
ucb_gpio.gpio_teardown = pdata->gpio_teardown;
ucb_gpio.gpio_offset = pdata->gpio_offset;
}
ucb->ucb1400_gpio = platform_device_alloc("ucb1400_gpio", -1);
if (!ucb->ucb1400_gpio) {
err = -ENOMEM;

35
drivers/mfd/vexpress-config.c
View File

@ -184,13 +184,14 @@ static int vexpress_config_schedule(struct vexpress_config_trans *trans)
spin_lock_irqsave(&bridge->transactions_lock, flags);
vexpress_config_dump_trans("Executing", trans);
if (list_empty(&bridge->transactions))
if (list_empty(&bridge->transactions)) {
vexpress_config_dump_trans("Executing", trans);
status = bridge->info->func_exec(trans->func->func,
trans->offset, trans->write, trans->data);
else
} else {
vexpress_config_dump_trans("Queuing", trans);
status = VEXPRESS_CONFIG_STATUS_WAIT;
}
switch (status) {
case VEXPRESS_CONFIG_STATUS_DONE:
@ -212,25 +213,31 @@ void vexpress_config_complete(struct vexpress_config_bridge *bridge,
{
struct vexpress_config_trans *trans;
unsigned long flags;
const char *message = "Completed";
spin_lock_irqsave(&bridge->transactions_lock, flags);
trans = list_first_entry(&bridge->transactions,
struct vexpress_config_trans, list);
vexpress_config_dump_trans("Completed", trans);
trans->status = status;
list_del(&trans->list);
if (!list_empty(&bridge->transactions)) {
vexpress_config_dump_trans("Pending", trans);
do {
vexpress_config_dump_trans(message, trans);
list_del(&trans->list);
complete(&trans->completion);
if (list_empty(&bridge->transactions))
break;
trans = list_first_entry(&bridge->transactions,
struct vexpress_config_trans, list);
vexpress_config_dump_trans("Executing pending", trans);
trans->status = bridge->info->func_exec(trans->func->func,
trans->offset, trans->write, trans->data);
message = "Finished pending";
} while (trans->status == VEXPRESS_CONFIG_STATUS_DONE);
bridge->info->func_exec(trans->func->func, trans->offset,
trans->write, trans->data);
}
spin_unlock_irqrestore(&bridge->transactions_lock, flags);
complete(&trans->completion);
}
EXPORT_SYMBOL(vexpress_config_complete);

4
drivers/mfd/vexpress-sysreg.c
View File

@ -490,12 +490,12 @@ static int vexpress_sysreg_probe(struct platform_device *pdev)
return err;
}
vexpress_sysreg_dev = &pdev->dev;
platform_device_register_data(vexpress_sysreg_dev, "leds-gpio",
PLATFORM_DEVID_AUTO, &vexpress_sysreg_leds_pdata,
sizeof(vexpress_sysreg_leds_pdata));
vexpress_sysreg_dev = &pdev->dev;
device_create_file(vexpress_sysreg_dev, &dev_attr_sys_id);
return 0;

56
drivers/mfd/wm5102-tables.c
View File

@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/mfd/arizona/core.h>
@ -57,31 +58,54 @@ static const struct reg_default wm5102_reva_patch[] = {
};
static const struct reg_default wm5102_revb_patch[] = {
{ 0x19, 0x0001 },
{ 0x80, 0x0003 },
{ 0x081, 0xE022 },
{ 0x410, 0x4080 },
{ 0x418, 0x4080 },
{ 0x420, 0x4080 },
{ 0x428, 0xC000 },
{ 0x410, 0x6080 },
{ 0x418, 0xa080 },
{ 0x420, 0xa080 },
{ 0x428, 0xe000 },
{ 0x443, 0xDC1A },
{ 0x4B0, 0x0066 },
{ 0x458, 0x000b },
{ 0x212, 0x0000 },
{ 0x171, 0x0000 },
{ 0x35E, 0x000C },
{ 0x2D4, 0x0000 },
{ 0x80, 0x0000 },
};
/* We use a function so we can use ARRAY_SIZE() */
int wm5102_patch(struct arizona *arizona)
{
const struct reg_default *wm5102_patch;
int ret = 0;
int i, patch_size;
switch (arizona->rev) {
case 0:
return regmap_register_patch(arizona->regmap,
wm5102_reva_patch,
ARRAY_SIZE(wm5102_reva_patch));
wm5102_patch = wm5102_reva_patch;
patch_size = ARRAY_SIZE(wm5102_reva_patch);
default:
return regmap_register_patch(arizona->regmap,
wm5102_revb_patch,
ARRAY_SIZE(wm5102_revb_patch));
wm5102_patch = wm5102_revb_patch;
patch_size = ARRAY_SIZE(wm5102_revb_patch);
}
regcache_cache_bypass(arizona->regmap, true);
for (i = 0; i < patch_size; i++) {
ret = regmap_write(arizona->regmap, wm5102_patch[i].reg,
wm5102_patch[i].def);
if (ret != 0) {
dev_err(arizona->dev, "Failed to write %x = %x: %d\n",
wm5102_patch[i].reg, wm5102_patch[i].def, ret);
goto out;
}
}
out:
regcache_cache_bypass(arizona->regmap, false);
return ret;
}
static const struct regmap_irq wm5102_aod_irqs[ARIZONA_NUM_IRQ] = {
@ -282,7 +306,7 @@ static const struct reg_default wm5102_reg_default[] = {
{ 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */
{ 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */
{ 0x00000161, 0x0000 }, /* R353 - Dynamic Frequency Scaling 1 */
{ 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */
{ 0x00000171, 0x0000 }, /* R369 - FLL1 Control 1 */
{ 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */
{ 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */
{ 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */
@ -366,7 +390,7 @@ static const struct reg_default wm5102_reg_default[] = {
{ 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */
{ 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */
{ 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */
{ 0x00000410, 0x4080 }, /* R1040 - Output Path Config 1L */
{ 0x00000410, 0x6080 }, /* R1040 - Output Path Config 1L */
{ 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */
{ 0x00000412, 0x0081 }, /* R1042 - DAC Volume Limit 1L */
{ 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */
@ -374,7 +398,7 @@ static const struct reg_default wm5102_reg_default[] = {
{ 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */
{ 0x00000416, 0x0081 }, /* R1046 - DAC Volume Limit 1R */
{ 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */
{ 0x00000418, 0x4080 }, /* R1048 - Output Path Config 2L */
{ 0x00000418, 0xA080 }, /* R1048 - Output Path Config 2L */
{ 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */
{ 0x0000041A, 0x0081 }, /* R1050 - DAC Volume Limit 2L */
{ 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */
@ -382,11 +406,11 @@ static const struct reg_default wm5102_reg_default[] = {
{ 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */
{ 0x0000041E, 0x0081 }, /* R1054 - DAC Volume Limit 2R */
{ 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */
{ 0x00000420, 0x4080 }, /* R1056 - Output Path Config 3L */
{ 0x00000420, 0xA080 }, /* R1056 - Output Path Config 3L */
{ 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */
{ 0x00000422, 0x0081 }, /* R1058 - DAC Volume Limit 3L */
{ 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */
{ 0x00000428, 0xC000 }, /* R1064 - Output Path Config 4L */
{ 0x00000428, 0xE000 }, /* R1064 - Output Path Config 4L */
{ 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */
{ 0x0000042A, 0x0081 }, /* R1066 - Out Volume 4L */
{ 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */
@ -401,7 +425,7 @@ static const struct reg_default wm5102_reg_default[] = {
{ 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */
{ 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */
{ 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */
{ 0x00000458, 0x0001 }, /* R1112 - Noise Gate Control */
{ 0x00000458, 0x000B }, /* R1112 - Noise Gate Control */
{ 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */
{ 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */
{ 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */

6
drivers/mfd/wm831x-spi.c
View File

@ -37,7 +37,7 @@ static int wm831x_spi_probe(struct spi_device *spi)
spi->bits_per_word = 16;
spi->mode = SPI_MODE_0;
dev_set_drvdata(&spi->dev, wm831x);
spi_set_drvdata(spi, wm831x);
wm831x->dev = &spi->dev;
wm831x->regmap = devm_regmap_init_spi(spi, &wm831x_regmap_config);
@ -53,7 +53,7 @@ static int wm831x_spi_probe(struct spi_device *spi)
static int wm831x_spi_remove(struct spi_device *spi)
{
struct wm831x *wm831x = dev_get_drvdata(&spi->dev);
struct wm831x *wm831x = spi_get_drvdata(spi);
wm831x_device_exit(wm831x);
@ -69,7 +69,7 @@ static int wm831x_spi_suspend(struct device *dev)
static void wm831x_spi_shutdown(struct spi_device *spi)
{
struct wm831x *wm831x = dev_get_drvdata(&spi->dev);
struct wm831x *wm831x = spi_get_drvdata(spi);
wm831x_device_shutdown(wm831x);
}

88
drivers/mfd/wm8994-core.c
View File

@ -19,6 +19,9 @@
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/mfd/core.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
@ -191,7 +194,7 @@ static const char *wm8958_main_supplies[] = {
"SPKVDD2",
};
#ifdef CONFIG_PM
#ifdef CONFIG_PM_RUNTIME
static int wm8994_suspend(struct device *dev)
{
struct wm8994 *wm8994 = dev_get_drvdata(dev);
@ -396,6 +399,60 @@ static const struct reg_default wm1811_reva_patch[] = {
{ 0x102, 0x0 },
};
#ifdef CONFIG_OF
static int wm8994_set_pdata_from_of(struct wm8994 *wm8994)
{
struct device_node *np = wm8994->dev->of_node;
struct wm8994_pdata *pdata = &wm8994->pdata;
int i;
if (!np)
return 0;
if (of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_defaults,
ARRAY_SIZE(pdata->gpio_defaults)) >= 0) {
for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
if (wm8994->pdata.gpio_defaults[i] == 0)
pdata->gpio_defaults[i]
= WM8994_CONFIGURE_GPIO;
}
}
of_property_read_u32_array(np, "wlf,micbias-cfg", pdata->micbias,
ARRAY_SIZE(pdata->micbias));
pdata->lineout1_diff = true;
pdata->lineout2_diff = true;
if (of_find_property(np, "wlf,lineout1-se", NULL))
pdata->lineout1_diff = false;
if (of_find_property(np, "wlf,lineout2-se", NULL))
pdata->lineout2_diff = false;
if (of_find_property(np, "wlf,lineout1-feedback", NULL))
pdata->lineout1fb = true;
if (of_find_property(np, "wlf,lineout2-feedback", NULL))
pdata->lineout2fb = true;
if (of_find_property(np, "wlf,ldoena-always-driven", NULL))
pdata->lineout2fb = true;
pdata->ldo[0].enable = of_get_named_gpio(np, "wlf,ldo1ena", 0);
if (pdata->ldo[0].enable < 0)
pdata->ldo[0].enable = 0;
pdata->ldo[1].enable = of_get_named_gpio(np, "wlf,ldo2ena", 0);
if (pdata->ldo[1].enable < 0)
pdata->ldo[1].enable = 0;
return 0;
}
#else
static int wm8994_set_pdata_from_of(struct wm8994 *wm8994)
{
return 0;
}
#endif
/*
* Instantiate the generic non-control parts of the device.
*/
@ -405,7 +462,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
struct regmap_config *regmap_config;
const struct reg_default *regmap_patch = NULL;
const char *devname;
int ret, i, patch_regs;
int ret, i, patch_regs = 0;
int pulls = 0;
if (dev_get_platdata(wm8994->dev)) {
@ -414,6 +471,10 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
}
pdata = &wm8994->pdata;
ret = wm8994_set_pdata_from_of(wm8994);
if (ret != 0)
return ret;
dev_set_drvdata(wm8994->dev, wm8994);
/* Add the on-chip regulators first for bootstrapping */
@ -673,9 +734,9 @@ static void wm8994_device_exit(struct wm8994 *wm8994)
}
static const struct of_device_id wm8994_of_match[] = {
{ .compatible = "wlf,wm1811", },
{ .compatible = "wlf,wm8994", },
{ .compatible = "wlf,wm8958", },
{ .compatible = "wlf,wm1811", .data = (void *)WM1811 },
{ .compatible = "wlf,wm8994", .data = (void *)WM8994 },
{ .compatible = "wlf,wm8958", .data = (void *)WM8958 },
{ }
};
MODULE_DEVICE_TABLE(of, wm8994_of_match);
@ -683,6 +744,7 @@ MODULE_DEVICE_TABLE(of, wm8994_of_match);
static int wm8994_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
const struct of_device_id *of_id;
struct wm8994 *wm8994;
int ret;
@ -693,7 +755,14 @@ static int wm8994_i2c_probe(struct i2c_client *i2c,
i2c_set_clientdata(i2c, wm8994);
wm8994->dev = &i2c->dev;
wm8994->irq = i2c->irq;
wm8994->type = id->driver_data;
if (i2c->dev.of_node) {
of_id = of_match_device(wm8994_of_match, &i2c->dev);
if (of_id)
wm8994->type = (int)of_id->data;
} else {
wm8994->type = id->driver_data;
}
wm8994->regmap = devm_regmap_init_i2c(i2c, &wm8994_base_regmap_config);
if (IS_ERR(wm8994->regmap)) {
@ -724,15 +793,16 @@ static const struct i2c_device_id wm8994_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, wm8994_i2c_id);
static UNIVERSAL_DEV_PM_OPS(wm8994_pm_ops, wm8994_suspend, wm8994_resume,
NULL);
static const struct dev_pm_ops wm8994_pm_ops = {
SET_RUNTIME_PM_OPS(wm8994_suspend, wm8994_resume, NULL)
};
static struct i2c_driver wm8994_i2c_driver = {
.driver = {
.name = "wm8994",
.owner = THIS_MODULE,
.pm = &wm8994_pm_ops,
.of_match_table = wm8994_of_match,
.of_match_table = of_match_ptr(wm8994_of_match),
},
.probe = wm8994_i2c_probe,
.remove = wm8994_i2c_remove,

1
drivers/power/rx51_battery.c
View File

@ -42,6 +42,7 @@ static int rx51_battery_read_adc(int channel)
req.method = TWL4030_MADC_SW1;
req.func_cb = NULL;
req.type = TWL4030_MADC_WAIT;
req.raw = true;
if (twl4030_madc_conversion(&req) <= 0)
return -ENODATA;

2
include/linux/i2c/twl4030-madc.h
View File

@ -39,6 +39,7 @@ struct twl4030_madc_conversion_method {
* @do_avgP: sample the input channel for 4 consecutive cycles
* @method: RT, SW1, SW2
* @type: Polling or interrupt based method
* @raw: Return raw value, do not convert it
*/
struct twl4030_madc_request {
@ -48,6 +49,7 @@ struct twl4030_madc_request {
u16 type;
bool active;
bool result_pending;
bool raw;
int rbuf[TWL4030_MADC_MAX_CHANNELS];
void (*func_cb)(int len, int channels, int *buf);
};

19
include/linux/input/matrix_keypad.h
View File

@ -81,4 +81,23 @@ int matrix_keypad_build_keymap(const struct matrix_keymap_data *keymap_data,
unsigned short *keymap,
struct input_dev *input_dev);
#ifdef CONFIG_OF
/**
* matrix_keypad_parse_of_params() - Read parameters from matrix-keypad node
*
* @dev: Device containing of_node
* @rows: Returns number of matrix rows
* @cols: Returns number of matrix columns
* @return 0 if OK, <0 on error
*/
int matrix_keypad_parse_of_params(struct device *dev,
unsigned int *rows, unsigned int *cols);
#else
static inline int matrix_keypad_parse_of_params(struct device *dev,
unsigned int *rows, unsigned int *cols)
{
return -ENOSYS;
}
#endif /* CONFIG_OF */
#endif /* _MATRIX_KEYPAD_H */

7
include/linux/mfd/arizona/pdata.h
View File

@ -78,6 +78,7 @@ struct arizona_micbias {
unsigned int ext_cap:1; /** External capacitor fitted */
unsigned int discharge:1; /** Actively discharge */
unsigned int fast_start:1; /** Enable aggressive startup ramp rate */
unsigned int bypass:1; /** Use bypass mode */
};
struct arizona_micd_config {
@ -104,7 +105,8 @@ struct arizona_pdata {
/** If a direct 32kHz clock is provided on an MCLK specify it here */
int clk32k_src;
bool irq_active_high; /** IRQ polarity */
/** Mode for primary IRQ (defaults to active low) */
unsigned int irq_flags;
/* Base GPIO */
int gpio_base;
@ -183,6 +185,9 @@ struct arizona_pdata {
/** Haptic actuator type */
unsigned int hap_act;
/** GPIO for primary IRQ (used for edge triggered emulation) */
int irq_gpio;
};
#endif

170
include/linux/mfd/cros_ec.h Normal file
View File

@ -0,0 +1,170 @@
/*
* ChromeOS EC multi-function device
*
* Copyright (C) 2012 Google, Inc
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __LINUX_MFD_CROS_EC_H
#define __LINUX_MFD_CROS_EC_H
#include <linux/mfd/cros_ec_commands.h>
/*
* Command interface between EC and AP, for LPC, I2C and SPI interfaces.
*/
enum {
EC_MSG_TX_HEADER_BYTES = 3,
EC_MSG_TX_TRAILER_BYTES = 1,
EC_MSG_TX_PROTO_BYTES = EC_MSG_TX_HEADER_BYTES +
EC_MSG_TX_TRAILER_BYTES,
EC_MSG_RX_PROTO_BYTES = 3,
/* Max length of messages */
EC_MSG_BYTES = EC_HOST_PARAM_SIZE + EC_MSG_TX_PROTO_BYTES,
};
/**
* struct cros_ec_msg - A message sent to the EC, and its reply
*
* @version: Command version number (often 0)
* @cmd: Command to send (EC_CMD_...)
* @out_buf: Outgoing payload (to EC)
* @outlen: Outgoing length
* @in_buf: Incoming payload (from EC)
* @in_len: Incoming length
*/
struct cros_ec_msg {
u8 version;
u8 cmd;
uint8_t *out_buf;
int out_len;
uint8_t *in_buf;
int in_len;
};
/**
* struct cros_ec_device - Information about a ChromeOS EC device
*
* @name: Name of this EC interface
* @priv: Private data
* @irq: Interrupt to use
* @din: input buffer (from EC)
* @dout: output buffer (to EC)
* \note
* These two buffers will always be dword-aligned and include enough
* space for up to 7 word-alignment bytes also, so we can ensure that
* the body of the message is always dword-aligned (64-bit).
*
* We use this alignment to keep ARM and x86 happy. Probably word
* alignment would be OK, there might be a small performance advantage
* to using dword.
* @din_size: size of din buffer
* @dout_size: size of dout buffer
* @command_send: send a command
* @command_recv: receive a command
* @ec_name: name of EC device (e.g. 'chromeos-ec')
* @phys_name: name of physical comms layer (e.g. 'i2c-4')
* @parent: pointer to parent device (e.g. i2c or spi device)
* @dev: Device pointer
* dev_lock: Lock to prevent concurrent access
* @wake_enabled: true if this device can wake the system from sleep
* @was_wake_device: true if this device was set to wake the system from
* sleep at the last suspend
* @event_notifier: interrupt event notifier for transport devices
*/
struct cros_ec_device {
const char *name;
void *priv;
int irq;
uint8_t *din;
uint8_t *dout;
int din_size;
int dout_size;
int (*command_send)(struct cros_ec_device *ec,
uint16_t cmd, void *out_buf, int out_len);
int (*command_recv)(struct cros_ec_device *ec,
uint16_t cmd, void *in_buf, int in_len);
int (*command_sendrecv)(struct cros_ec_device *ec,
uint16_t cmd, void *out_buf, int out_len,
void *in_buf, int in_len);
int (*command_xfer)(struct cros_ec_device *ec,
struct cros_ec_msg *msg);
const char *ec_name;
const char *phys_name;
struct device *parent;
/* These are --private-- fields - do not assign */
struct device *dev;
struct mutex dev_lock;
bool wake_enabled;
bool was_wake_device;
struct blocking_notifier_head event_notifier;
};
/**
* cros_ec_suspend - Handle a suspend operation for the ChromeOS EC device
*
* This can be called by drivers to handle a suspend event.
*
* ec_dev: Device to suspend
* @return 0 if ok, -ve on error
*/
int cros_ec_suspend(struct cros_ec_device *ec_dev);
/**
* cros_ec_resume - Handle a resume operation for the ChromeOS EC device
*
* This can be called by drivers to handle a resume event.
*
* @ec_dev: Device to resume
* @return 0 if ok, -ve on error
*/
int cros_ec_resume(struct cros_ec_device *ec_dev);
/**
* cros_ec_prepare_tx - Prepare an outgoing message in the output buffer
*
* This is intended to be used by all ChromeOS EC drivers, but at present
* only SPI uses it. Once LPC uses the same protocol it can start using it.
* I2C could use it now, with a refactor of the existing code.
*
* @ec_dev: Device to register
* @msg: Message to write
*/
int cros_ec_prepare_tx(struct cros_ec_device *ec_dev,
struct cros_ec_msg *msg);
/**
* cros_ec_remove - Remove a ChromeOS EC
*
* Call this to deregister a ChromeOS EC. After this you should call
* cros_ec_free().
*
* @ec_dev: Device to register
* @return 0 if ok, -ve on error
*/
int cros_ec_remove(struct cros_ec_device *ec_dev);
/**
* cros_ec_register - Register a new ChromeOS EC, using the provided info
*
* Before calling this, allocate a pointer to a new device and then fill
* in all the fields up to the --private-- marker.
*
* @ec_dev: Device to register
* @return 0 if ok, -ve on error
*/
int cros_ec_register(struct cros_ec_device *ec_dev);
#endif /* __LINUX_MFD_CROS_EC_H */

1369
include/linux/mfd/cros_ec_commands.h Normal file
View File

File diff suppressed because it is too large Load Diff

12
include/linux/mfd/palmas.h
View File

@ -1,9 +1,10 @@
/*
* TI Palmas
*
* Copyright 2011 Texas Instruments Inc.
* Copyright 2011-2013 Texas Instruments Inc.
*
* Author: Graeme Gregory <gg@slimlogic.co.uk>
* Author: Ian Lartey <ian@slimlogic.co.uk>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@ -22,6 +23,15 @@
#define PALMAS_NUM_CLIENTS 3
/* The ID_REVISION NUMBERS */
#define PALMAS_CHIP_OLD_ID 0x0000
#define PALMAS_CHIP_ID 0xC035
#define PALMAS_CHIP_CHARGER_ID 0xC036
#define is_palmas(a) (((a) == PALMAS_CHIP_OLD_ID) || \
((a) == PALMAS_CHIP_ID))
#define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID)
struct palmas_pmic;
struct palmas_gpadc;
struct palmas_resource;

8
include/linux/mfd/retu.h
View File

@ -1,5 +1,5 @@
/*
* Retu MFD driver interface
* Retu/Tahvo MFD driver interface
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file "COPYING" in the main directory of this
@ -19,4 +19,10 @@ int retu_write(struct retu_dev *, u8, u16);
#define RETU_REG_CC1 0x0d /* Common control register 1 */
#define RETU_REG_STATUS 0x16 /* Status register */
/* Interrupt sources */
#define TAHVO_INT_VBUS 0 /* VBUS state */
/* Interrupt status */
#define TAHVO_STAT_VBUS (1 << TAHVO_INT_VBUS)
#endif /* __LINUX_MFD_RETU_H */

36
include/linux/mfd/rtsx_pci.h
View File

@ -500,6 +500,8 @@
#define BPP_POWER_15_PERCENT_ON 0x08
#define BPP_POWER_ON 0x00
#define BPP_POWER_MASK 0x0F
#define SD_VCC_PARTIAL_POWER_ON 0x02
#define SD_VCC_POWER_ON 0x00
/* PWR_GATE_CTRL */
#define PWR_GATE_EN 0x01
@ -689,6 +691,40 @@
#define IMAGE_FLAG_ADDR0 0xCE80
#define IMAGE_FLAG_ADDR1 0xCE81
/* Phy register */
#define PHY_PCR 0x00
#define PHY_RCR0 0x01
#define PHY_RCR1 0x02
#define PHY_RCR2 0x03
#define PHY_RTCR 0x04
#define PHY_RDR 0x05
#define PHY_TCR0 0x06
#define PHY_TCR1 0x07
#define PHY_TUNE 0x08
#define PHY_IMR 0x09
#define PHY_BPCR 0x0A
#define PHY_BIST 0x0B
#define PHY_RAW_L 0x0C
#define PHY_RAW_H 0x0D
#define PHY_RAW_DATA 0x0E
#define PHY_HOST_CLK_CTRL 0x0F
#define PHY_DMR 0x10
#define PHY_BACR 0x11
#define PHY_IER 0x12
#define PHY_BCSR 0x13
#define PHY_BPR 0x14
#define PHY_BPNR2 0x15
#define PHY_BPNR 0x16
#define PHY_BRNR2 0x17
#define PHY_BENR 0x18
#define PHY_REG_REV 0x19
#define PHY_FLD0 0x1A
#define PHY_FLD1 0x1B
#define PHY_FLD2 0x1C
#define PHY_FLD3 0x1D
#define PHY_FLD4 0x1E
#define PHY_DUM_REG 0x1F
#define rtsx_pci_init_cmd(pcr) ((pcr)->ci = 0)
struct rtsx_pcr;

533
include/linux/mfd/si476x-core.h Normal file
View File

@ -0,0 +1,533 @@
/*
* include/media/si476x-core.h -- Common definitions for si476x core
* device
*
* Copyright (C) 2012 Innovative Converged Devices(ICD)
* Copyright (C) 2013 Andrey Smirnov
*
* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
*/
#ifndef SI476X_CORE_H
#define SI476X_CORE_H
#include <linux/kfifo.h>
#include <linux/atomic.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/mutex.h>
#include <linux/mfd/core.h>
#include <linux/videodev2.h>
#include <linux/regulator/consumer.h>
#include <linux/mfd/si476x-platform.h>
#include <linux/mfd/si476x-reports.h>
/* Command Timeouts */
#define SI476X_DEFAULT_TIMEOUT 100000
#define SI476X_TIMEOUT_TUNE 700000
#define SI476X_TIMEOUT_POWER_UP 330000
#define SI476X_STATUS_POLL_US 0
/* -------------------- si476x-i2c.c ----------------------- */
enum si476x_freq_supported_chips {
SI476X_CHIP_SI4761 = 1,
SI476X_CHIP_SI4764,
SI476X_CHIP_SI4768,
};
enum si476x_part_revisions {
SI476X_REVISION_A10 = 0,
SI476X_REVISION_A20 = 1,
SI476X_REVISION_A30 = 2,
};
enum si476x_mfd_cells {
SI476X_RADIO_CELL = 0,
SI476X_CODEC_CELL,
SI476X_MFD_CELLS,
};
/**
* enum si476x_power_state - possible power state of the si476x
* device.
*
* @SI476X_POWER_DOWN: In this state all regulators are turned off
* and the reset line is pulled low. The device is completely
* inactive.
* @SI476X_POWER_UP_FULL: In this state all the power regualtors are
* turned on, reset line pulled high, IRQ line is enabled(polling is
* active for polling use scenario) and device is turned on with
* POWER_UP command. The device is ready to be used.
* @SI476X_POWER_INCONSISTENT: This state indicates that previous
* power down was inconsistent, meaning some of the regulators were
* not turned down and thus use of the device, without power-cycling
* is impossible.
*/
enum si476x_power_state {
SI476X_POWER_DOWN = 0,
SI476X_POWER_UP_FULL = 1,
SI476X_POWER_INCONSISTENT = 2,
};
/**
* struct si476x_core - internal data structure representing the
* underlying "core" device which all the MFD cell-devices use.
*
* @client: Actual I2C client used to transfer commands to the chip.
* @chip_id: Last digit of the chip model(E.g. "1" for SI4761)
* @cells: MFD cell devices created by this driver.
* @cmd_lock: Mutex used to serialize all the requests to the core
* device. This filed should not be used directly. Instead
* si476x_core_lock()/si476x_core_unlock() should be used to get
* exclusive access to the "core" device.
* @users: Active users counter(Used by the radio cell)
* @rds_read_queue: Wait queue used to wait for RDS data.
* @rds_fifo: FIFO in which all the RDS data received from the chip is
* placed.
* @rds_fifo_drainer: Worker that drains on-chip RDS FIFO.
* @rds_drainer_is_working: Flag used for launching only one instance
* of the @rds_fifo_drainer.
* @rds_drainer_status_lock: Lock used to guard access to the
* @rds_drainer_is_working variable.
* @command: Wait queue for wainting on the command comapletion.
* @cts: Clear To Send flag set upon receiving first status with CTS
* set.
* @tuning: Wait queue used for wainting for tune/seek comand
* completion.
* @stc: Similar to @cts, but for the STC bit of the status value.
* @power_up_parameters: Parameters used as argument for POWER_UP
* command when the device is started.
* @state: Current power state of the device.
* @supplues: Structure containing handles to all power supplies used
* by the device (NULL ones are ignored).
* @gpio_reset: GPIO pin connectet to the RSTB pin of the chip.
* @pinmux: Chip's configurable pins configuration.
* @diversity_mode: Chips role when functioning in diversity mode.
* @status_monitor: Polling worker used in polling use case scenarion
* (when IRQ is not avalible).
* @revision: Chip's running firmware revision number(Used for correct
* command set support).
*/
struct si476x_core {
struct i2c_client *client;
struct regmap *regmap;
int chip_id;
struct mfd_cell cells[SI476X_MFD_CELLS];
struct mutex cmd_lock; /* for serializing fm radio operations */
atomic_t users;
wait_queue_head_t rds_read_queue;
struct kfifo rds_fifo;
struct work_struct rds_fifo_drainer;
bool rds_drainer_is_working;
struct mutex rds_drainer_status_lock;
wait_queue_head_t command;
atomic_t cts;
wait_queue_head_t tuning;
atomic_t stc;
struct si476x_power_up_args power_up_parameters;
enum si476x_power_state power_state;
struct regulator_bulk_data supplies[4];
int gpio_reset;
struct si476x_pinmux pinmux;
enum si476x_phase_diversity_mode diversity_mode;
atomic_t is_alive;
struct delayed_work status_monitor;
#define SI476X_WORK_TO_CORE(w) container_of(to_delayed_work(w), \
struct si476x_core, \
status_monitor)
int revision;
int rds_fifo_depth;
};
static inline struct si476x_core *i2c_mfd_cell_to_core(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev->parent);
return i2c_get_clientdata(client);
}
/**
* si476x_core_lock() - lock the core device to get an exclusive access
* to it.
*/
static inline void si476x_core_lock(struct si476x_core *core)
{
mutex_lock(&core->cmd_lock);
}
/**
* si476x_core_unlock() - unlock the core device to relinquish an
* exclusive access to it.
*/
static inline void si476x_core_unlock(struct si476x_core *core)
{
mutex_unlock(&core->cmd_lock);
}
/* *_TUNE_FREQ family of commands accept frequency in multiples of
10kHz */
static inline u16 hz_to_si476x(struct si476x_core *core, int freq)
{
u16 result;
switch (core->power_up_parameters.func) {
default:
case SI476X_FUNC_FM_RECEIVER:
result = freq / 10000;
break;
case SI476X_FUNC_AM_RECEIVER:
result = freq / 1000;
break;
}
return result;
}
static inline int si476x_to_hz(struct si476x_core *core, u16 freq)
{
int result;
switch (core->power_up_parameters.func) {
default:
case SI476X_FUNC_FM_RECEIVER:
result = freq * 10000;
break;
case SI476X_FUNC_AM_RECEIVER:
result = freq * 1000;
break;
}
return result;
}
/* Since the V4L2_TUNER_CAP_LOW flag is supplied, V4L2 subsystem
* mesures frequency in 62.5 Hz units */
static inline int hz_to_v4l2(int freq)
{
return (freq * 10) / 625;
}
static inline int v4l2_to_hz(int freq)
{
return (freq * 625) / 10;
}
static inline u16 v4l2_to_si476x(struct si476x_core *core, int freq)
{
return hz_to_si476x(core, v4l2_to_hz(freq));
}
static inline int si476x_to_v4l2(struct si476x_core *core, u16 freq)
{
return hz_to_v4l2(si476x_to_hz(core, freq));
}
/**
* struct si476x_func_info - structure containing result of the
* FUNC_INFO command.
*
* @firmware.major: Firmware major number.
* @firmware.minor[...]: Firmware minor numbers.
* @patch_id:
* @func: Mode tuner is working in.
*/
struct si476x_func_info {
struct {
u8 major, minor[2];
} firmware;
u16 patch_id;
enum si476x_func func;
};
/**
* struct si476x_power_down_args - structure used to pass parameters
* to POWER_DOWN command
*
* @xosc: true - Power down, but leav oscillator running.
* false - Full power down.
*/
struct si476x_power_down_args {
bool xosc;
};
/**
* enum si476x_tunemode - enum representing possible tune modes for
* the chip.
* @SI476X_TM_VALIDATED_NORMAL_TUNE: Unconditionally stay on the new
* channel after tune, tune status is valid.
* @SI476X_TM_INVALIDATED_FAST_TUNE: Unconditionally stay in the new
* channel after tune, tune status invalid.
* @SI476X_TM_VALIDATED_AF_TUNE: Jump back to previous channel if
* metric thresholds are not met.
* @SI476X_TM_VALIDATED_AF_CHECK: Unconditionally jump back to the
* previous channel.
*/
enum si476x_tunemode {
SI476X_TM_VALIDATED_NORMAL_TUNE = 0,
SI476X_TM_INVALIDATED_FAST_TUNE = 1,
SI476X_TM_VALIDATED_AF_TUNE = 2,
SI476X_TM_VALIDATED_AF_CHECK = 3,
};
/**
* enum si476x_smoothmetrics - enum containing the possible setting fo
* audio transitioning of the chip
* @SI476X_SM_INITIALIZE_AUDIO: Initialize audio state to match this
* new channel
* @SI476X_SM_TRANSITION_AUDIO: Transition audio state from previous
* channel values to the new values
*/
enum si476x_smoothmetrics {
SI476X_SM_INITIALIZE_AUDIO = 0,
SI476X_SM_TRANSITION_AUDIO = 1,
};
/**
* struct si476x_rds_status_report - the structure representing the
* response to 'FM_RD_STATUS' command
* @rdstpptyint: Traffic program flag(TP) and/or program type(PTY)
* code has changed.
* @rdspiint: Program indentifiaction(PI) code has changed.
* @rdssyncint: RDS synchronization has changed.
* @rdsfifoint: RDS was received and the RDS FIFO has at least
* 'FM_RDS_INTERRUPT_FIFO_COUNT' elements in it.
* @tpptyvalid: TP flag and PTY code are valid falg.
* @pivalid: PI code is valid flag.
* @rdssync: RDS is currently synchronized.
* @rdsfifolost: On or more RDS groups have been lost/discarded flag.
* @tp: Current channel's TP flag.
* @pty: Current channel's PTY code.
* @pi: Current channel's PI code.
* @rdsfifoused: Number of blocks remaining in the RDS FIFO (0 if
* empty).
*/
struct si476x_rds_status_report {
bool rdstpptyint, rdspiint, rdssyncint, rdsfifoint;
bool tpptyvalid, pivalid, rdssync, rdsfifolost;
bool tp;
u8 pty;
u16 pi;
u8 rdsfifoused;
u8 ble[4];
struct v4l2_rds_data rds[4];
};
struct si476x_rsq_status_args {
bool primary;
bool rsqack;
bool attune;
bool cancel;
bool stcack;
};
enum si476x_injside {
SI476X_INJSIDE_AUTO = 0,
SI476X_INJSIDE_LOW = 1,
SI476X_INJSIDE_HIGH = 2,
};
struct si476x_tune_freq_args {
bool zifsr;
bool hd;
enum si476x_injside injside;
int freq;
enum si476x_tunemode tunemode;
enum si476x_smoothmetrics smoothmetrics;
int antcap;
};
int si476x_core_stop(struct si476x_core *, bool);
int si476x_core_start(struct si476x_core *, bool);
int si476x_core_set_power_state(struct si476x_core *, enum si476x_power_state);
bool si476x_core_has_am(struct si476x_core *);
bool si476x_core_has_diversity(struct si476x_core *);
bool si476x_core_is_a_secondary_tuner(struct si476x_core *);
bool si476x_core_is_a_primary_tuner(struct si476x_core *);
bool si476x_core_is_in_am_receiver_mode(struct si476x_core *core);
bool si476x_core_is_powered_up(struct si476x_core *core);
enum si476x_i2c_type {
SI476X_I2C_SEND,
SI476X_I2C_RECV
};
int si476x_core_i2c_xfer(struct si476x_core *,
enum si476x_i2c_type,
char *, int);
/* -------------------- si476x-cmd.c ----------------------- */
int si476x_core_cmd_func_info(struct si476x_core *, struct si476x_func_info *);
int si476x_core_cmd_set_property(struct si476x_core *, u16, u16);
int si476x_core_cmd_get_property(struct si476x_core *, u16);
int si476x_core_cmd_dig_audio_pin_cfg(struct si476x_core *,
enum si476x_dclk_config,
enum si476x_dfs_config,
enum si476x_dout_config,
enum si476x_xout_config);
int si476x_core_cmd_zif_pin_cfg(struct si476x_core *,
enum si476x_iqclk_config,
enum si476x_iqfs_config,
enum si476x_iout_config,
enum si476x_qout_config);
int si476x_core_cmd_ic_link_gpo_ctl_pin_cfg(struct si476x_core *,
enum si476x_icin_config,
enum si476x_icip_config,
enum si476x_icon_config,
enum si476x_icop_config);
int si476x_core_cmd_ana_audio_pin_cfg(struct si476x_core *,
enum si476x_lrout_config);
int si476x_core_cmd_intb_pin_cfg(struct si476x_core *, enum si476x_intb_config,
enum si476x_a1_config);
int si476x_core_cmd_fm_seek_start(struct si476x_core *, bool, bool);
int si476x_core_cmd_am_seek_start(struct si476x_core *, bool, bool);
int si476x_core_cmd_fm_rds_status(struct si476x_core *, bool, bool, bool,
struct si476x_rds_status_report *);
int si476x_core_cmd_fm_rds_blockcount(struct si476x_core *, bool,
struct si476x_rds_blockcount_report *);
int si476x_core_cmd_fm_tune_freq(struct si476x_core *,
struct si476x_tune_freq_args *);
int si476x_core_cmd_am_tune_freq(struct si476x_core *,
struct si476x_tune_freq_args *);
int si476x_core_cmd_am_rsq_status(struct si476x_core *,
struct si476x_rsq_status_args *,
struct si476x_rsq_status_report *);
int si476x_core_cmd_fm_rsq_status(struct si476x_core *,
struct si476x_rsq_status_args *,
struct si476x_rsq_status_report *);
int si476x_core_cmd_power_up(struct si476x_core *,
struct si476x_power_up_args *);
int si476x_core_cmd_power_down(struct si476x_core *,
struct si476x_power_down_args *);
int si476x_core_cmd_fm_phase_div_status(struct si476x_core *);
int si476x_core_cmd_fm_phase_diversity(struct si476x_core *,
enum si476x_phase_diversity_mode);
int si476x_core_cmd_fm_acf_status(struct si476x_core *,
struct si476x_acf_status_report *);
int si476x_core_cmd_am_acf_status(struct si476x_core *,
struct si476x_acf_status_report *);
int si476x_core_cmd_agc_status(struct si476x_core *,
struct si476x_agc_status_report *);
enum si476x_power_grid_type {
SI476X_POWER_GRID_50HZ = 0,
SI476X_POWER_GRID_60HZ,
};
/* Properties */
enum si476x_interrupt_flags {
SI476X_STCIEN = (1 << 0),
SI476X_ACFIEN = (1 << 1),
SI476X_RDSIEN = (1 << 2),
SI476X_RSQIEN = (1 << 3),
SI476X_ERRIEN = (1 << 6),
SI476X_CTSIEN = (1 << 7),
SI476X_STCREP = (1 << 8),
SI476X_ACFREP = (1 << 9),
SI476X_RDSREP = (1 << 10),
SI476X_RSQREP = (1 << 11),
};
enum si476x_rdsint_sources {
SI476X_RDSTPPTY = (1 << 4),
SI476X_RDSPI = (1 << 3),
SI476X_RDSSYNC = (1 << 1),
SI476X_RDSRECV = (1 << 0),
};
enum si476x_status_response_bits {
SI476X_CTS = (1 << 7),
SI476X_ERR = (1 << 6),
/* Status response for WB receiver */
SI476X_WB_ASQ_INT = (1 << 4),
SI476X_RSQ_INT = (1 << 3),
/* Status response for FM receiver */
SI476X_FM_RDS_INT = (1 << 2),
SI476X_ACF_INT = (1 << 1),
SI476X_STC_INT = (1 << 0),
};
/* -------------------- si476x-prop.c ----------------------- */
enum si476x_common_receiver_properties {
SI476X_PROP_INT_CTL_ENABLE = 0x0000,
SI476X_PROP_DIGITAL_IO_INPUT_SAMPLE_RATE = 0x0200,
SI476X_PROP_DIGITAL_IO_INPUT_FORMAT = 0x0201,
SI476X_PROP_DIGITAL_IO_OUTPUT_SAMPLE_RATE = 0x0202,
SI476X_PROP_DIGITAL_IO_OUTPUT_FORMAT = 0x0203,
SI476X_PROP_SEEK_BAND_BOTTOM = 0x1100,
SI476X_PROP_SEEK_BAND_TOP = 0x1101,
SI476X_PROP_SEEK_FREQUENCY_SPACING = 0x1102,
SI476X_PROP_VALID_MAX_TUNE_ERROR = 0x2000,
SI476X_PROP_VALID_SNR_THRESHOLD = 0x2003,
SI476X_PROP_VALID_RSSI_THRESHOLD = 0x2004,
};
enum si476x_am_receiver_properties {
SI476X_PROP_AUDIO_PWR_LINE_FILTER = 0x0303,
};
enum si476x_fm_receiver_properties {
SI476X_PROP_AUDIO_DEEMPHASIS = 0x0302,
SI476X_PROP_FM_RDS_INTERRUPT_SOURCE = 0x4000,
SI476X_PROP_FM_RDS_INTERRUPT_FIFO_COUNT = 0x4001,
SI476X_PROP_FM_RDS_CONFIG = 0x4002,
};
enum si476x_prop_audio_pwr_line_filter_bits {
SI476X_PROP_PWR_HARMONICS_MASK = 0x001f,
SI476X_PROP_PWR_GRID_MASK = 0x0100,
SI476X_PROP_PWR_ENABLE_MASK = 0x0200,
SI476X_PROP_PWR_GRID_50HZ = 0x0000,
SI476X_PROP_PWR_GRID_60HZ = 0x0100,
};
enum si476x_prop_fm_rds_config_bits {
SI476X_PROP_RDSEN_MASK = 0x1,
SI476X_PROP_RDSEN = 0x1,
};
struct regmap *devm_regmap_init_si476x(struct si476x_core *);
#endif /* SI476X_CORE_H */

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/*
* include/media/si476x-platform.h -- Platform data specific definitions
*
* Copyright (C) 2013 Andrey Smirnov
*
* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
*/
#ifndef __SI476X_PLATFORM_H__
#define __SI476X_PLATFORM_H__
/* It is possible to select one of the four adresses using pins A0
* and A1 on SI476x */
#define SI476X_I2C_ADDR_1 0x60
#define SI476X_I2C_ADDR_2 0x61
#define SI476X_I2C_ADDR_3 0x62
#define SI476X_I2C_ADDR_4 0x63
enum si476x_iqclk_config {
SI476X_IQCLK_NOOP = 0,
SI476X_IQCLK_TRISTATE = 1,
SI476X_IQCLK_IQ = 21,
};
enum si476x_iqfs_config {
SI476X_IQFS_NOOP = 0,
SI476X_IQFS_TRISTATE = 1,
SI476X_IQFS_IQ = 21,
};
enum si476x_iout_config {
SI476X_IOUT_NOOP = 0,
SI476X_IOUT_TRISTATE = 1,
SI476X_IOUT_OUTPUT = 22,
};
enum si476x_qout_config {
SI476X_QOUT_NOOP = 0,
SI476X_QOUT_TRISTATE = 1,
SI476X_QOUT_OUTPUT = 22,
};
enum si476x_dclk_config {
SI476X_DCLK_NOOP = 0,
SI476X_DCLK_TRISTATE = 1,
SI476X_DCLK_DAUDIO = 10,
};
enum si476x_dfs_config {
SI476X_DFS_NOOP = 0,
SI476X_DFS_TRISTATE = 1,
SI476X_DFS_DAUDIO = 10,
};
enum si476x_dout_config {
SI476X_DOUT_NOOP = 0,
SI476X_DOUT_TRISTATE = 1,
SI476X_DOUT_I2S_OUTPUT = 12,
SI476X_DOUT_I2S_INPUT = 13,
};
enum si476x_xout_config {
SI476X_XOUT_NOOP = 0,
SI476X_XOUT_TRISTATE = 1,
SI476X_XOUT_I2S_INPUT = 13,
SI476X_XOUT_MODE_SELECT = 23,
};
enum si476x_icin_config {
SI476X_ICIN_NOOP = 0,
SI476X_ICIN_TRISTATE = 1,
SI476X_ICIN_GPO1_HIGH = 2,
SI476X_ICIN_GPO1_LOW = 3,
SI476X_ICIN_IC_LINK = 30,
};
enum si476x_icip_config {
SI476X_ICIP_NOOP = 0,
SI476X_ICIP_TRISTATE = 1,
SI476X_ICIP_GPO2_HIGH = 2,
SI476X_ICIP_GPO2_LOW = 3,
SI476X_ICIP_IC_LINK = 30,
};
enum si476x_icon_config {
SI476X_ICON_NOOP = 0,
SI476X_ICON_TRISTATE = 1,
SI476X_ICON_I2S = 10,
SI476X_ICON_IC_LINK = 30,
};
enum si476x_icop_config {
SI476X_ICOP_NOOP = 0,
SI476X_ICOP_TRISTATE = 1,
SI476X_ICOP_I2S = 10,
SI476X_ICOP_IC_LINK = 30,
};
enum si476x_lrout_config {
SI476X_LROUT_NOOP = 0,
SI476X_LROUT_TRISTATE = 1,
SI476X_LROUT_AUDIO = 2,
SI476X_LROUT_MPX = 3,
};
enum si476x_intb_config {
SI476X_INTB_NOOP = 0,
SI476X_INTB_TRISTATE = 1,
SI476X_INTB_DAUDIO = 10,
SI476X_INTB_IRQ = 40,
};
enum si476x_a1_config {
SI476X_A1_NOOP = 0,
SI476X_A1_TRISTATE = 1,
SI476X_A1_IRQ = 40,
};
struct si476x_pinmux {
enum si476x_dclk_config dclk;
enum si476x_dfs_config dfs;
enum si476x_dout_config dout;
enum si476x_xout_config xout;
enum si476x_iqclk_config iqclk;
enum si476x_iqfs_config iqfs;
enum si476x_iout_config iout;
enum si476x_qout_config qout;
enum si476x_icin_config icin;
enum si476x_icip_config icip;
enum si476x_icon_config icon;
enum si476x_icop_config icop;
enum si476x_lrout_config lrout;
enum si476x_intb_config intb;
enum si476x_a1_config a1;
};
enum si476x_ibias6x {
SI476X_IBIAS6X_OTHER = 0,
SI476X_IBIAS6X_RCVR1_NON_4MHZ_CLK = 1,
};
enum si476x_xstart {
SI476X_XSTART_MULTIPLE_TUNER = 0x11,
SI476X_XSTART_NORMAL = 0x77,
};
enum si476x_freq {
SI476X_FREQ_4_MHZ = 0,
SI476X_FREQ_37P209375_MHZ = 1,
SI476X_FREQ_36P4_MHZ = 2,
SI476X_FREQ_37P8_MHZ = 3,
};
enum si476x_xmode {
SI476X_XMODE_CRYSTAL_RCVR1 = 1,
SI476X_XMODE_EXT_CLOCK = 2,
SI476X_XMODE_CRYSTAL_RCVR2_3 = 3,
};
enum si476x_xbiashc {
SI476X_XBIASHC_SINGLE_RECEIVER = 0,
SI476X_XBIASHC_MULTIPLE_RECEIVER = 1,
};
enum si476x_xbias {
SI476X_XBIAS_RCVR2_3 = 0,
SI476X_XBIAS_4MHZ_RCVR1 = 3,
SI476X_XBIAS_RCVR1 = 7,
};
enum si476x_func {
SI476X_FUNC_BOOTLOADER = 0,
SI476X_FUNC_FM_RECEIVER = 1,
SI476X_FUNC_AM_RECEIVER = 2,
SI476X_FUNC_WB_RECEIVER = 3,
};
/**
* @xcload: Selects the amount of additional on-chip capacitance to
* be connected between XTAL1 and gnd and between XTAL2 and
* GND. One half of the capacitance value shown here is the
* additional load capacitance presented to the xtal. The
* minimum step size is 0.277 pF. Recommended value is 0x28
* but it will be layout dependent. Range is 0–0x3F i.e.
* (0–16.33 pF)
* @ctsien: enable CTSINT(interrupt request when CTS condition
* arises) when set
* @intsel: when set A1 pin becomes the interrupt pin; otherwise,
* INTB is the interrupt pin
* @func: selects the boot function of the device. I.e.
* SI476X_BOOTLOADER - Boot loader
* SI476X_FM_RECEIVER - FM receiver
* SI476X_AM_RECEIVER - AM receiver
* SI476X_WB_RECEIVER - Weatherband receiver
* @freq: oscillator's crystal frequency:
* SI476X_XTAL_37P209375_MHZ - 37.209375 Mhz
* SI476X_XTAL_36P4_MHZ - 36.4 Mhz
* SI476X_XTAL_37P8_MHZ - 37.8 Mhz
*/
struct si476x_power_up_args {
enum si476x_ibias6x ibias6x;
enum si476x_xstart xstart;
u8 xcload;
bool fastboot;
enum si476x_xbiashc xbiashc;
enum si476x_xbias xbias;
enum si476x_func func;
enum si476x_freq freq;
enum si476x_xmode xmode;
};
/**
* enum si476x_phase_diversity_mode - possbile phase diversity modes
* for SI4764/5/6/7 chips.
*
* @SI476X_PHDIV_DISABLED: Phase diversity feature is
* disabled.
* @SI476X_PHDIV_PRIMARY_COMBINING: Tuner works as a primary tuner
* in combination with a
* secondary one.
* @SI476X_PHDIV_PRIMARY_ANTENNA: Tuner works as a primary tuner
* using only its own antenna.
* @SI476X_PHDIV_SECONDARY_ANTENNA: Tuner works as a primary tuner
* usning seconary tuner's antenna.
* @SI476X_PHDIV_SECONDARY_COMBINING: Tuner works as a secondary
* tuner in combination with the
* primary one.
*/
enum si476x_phase_diversity_mode {
SI476X_PHDIV_DISABLED = 0,
SI476X_PHDIV_PRIMARY_COMBINING = 1,
SI476X_PHDIV_PRIMARY_ANTENNA = 2,
SI476X_PHDIV_SECONDARY_ANTENNA = 3,
SI476X_PHDIV_SECONDARY_COMBINING = 5,
};
/*
* Platform dependent definition
*/
struct si476x_platform_data {
int gpio_reset; /* < 0 if not used */
struct si476x_power_up_args power_up_parameters;
enum si476x_phase_diversity_mode diversity_mode;
struct si476x_pinmux pinmux;
};
#endif /* __SI476X_PLATFORM_H__ */

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/*
* include/media/si476x-platform.h -- Definitions of the data formats
* returned by debugfs hooks
*
* Copyright (C) 2013 Andrey Smirnov
*
* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
*/
#ifndef __SI476X_REPORTS_H__
#define __SI476X_REPORTS_H__
/**
* struct si476x_rsq_status - structure containing received signal
* quality
* @multhint: Multipath Detect High.
* true - Indicatedes that the value is below
* FM_RSQ_MULTIPATH_HIGH_THRESHOLD
* false - Indicatedes that the value is above
* FM_RSQ_MULTIPATH_HIGH_THRESHOLD
* @multlint: Multipath Detect Low.
* true - Indicatedes that the value is below
* FM_RSQ_MULTIPATH_LOW_THRESHOLD
* false - Indicatedes that the value is above
* FM_RSQ_MULTIPATH_LOW_THRESHOLD
* @snrhint: SNR Detect High.
* true - Indicatedes that the value is below
* FM_RSQ_SNR_HIGH_THRESHOLD
* false - Indicatedes that the value is above
* FM_RSQ_SNR_HIGH_THRESHOLD
* @snrlint: SNR Detect Low.
* true - Indicatedes that the value is below
* FM_RSQ_SNR_LOW_THRESHOLD
* false - Indicatedes that the value is above
* FM_RSQ_SNR_LOW_THRESHOLD
* @rssihint: RSSI Detect High.
* true - Indicatedes that the value is below
* FM_RSQ_RSSI_HIGH_THRESHOLD
* false - Indicatedes that the value is above
* FM_RSQ_RSSI_HIGH_THRESHOLD
* @rssilint: RSSI Detect Low.
* true - Indicatedes that the value is below
* FM_RSQ_RSSI_LOW_THRESHOLD
* false - Indicatedes that the value is above
* FM_RSQ_RSSI_LOW_THRESHOLD
* @bltf: Band Limit.
* Set if seek command hits the band limit or wrapped to
* the original frequency.
* @snr_ready: SNR measurement in progress.
* @rssiready: RSSI measurement in progress.
* @afcrl: Set if FREQOFF >= MAX_TUNE_ERROR
* @valid: Set if the channel is valid
* rssi < FM_VALID_RSSI_THRESHOLD
* snr < FM_VALID_SNR_THRESHOLD
* tune_error < FM_VALID_MAX_TUNE_ERROR
* @readfreq: Current tuned frequency.
* @freqoff: Signed frequency offset.
* @rssi: Received Signal Strength Indicator(dBuV).
* @snr: RF SNR Indicator(dB).
* @lassi:
* @hassi: Low/High side Adjacent(100 kHz) Channel Strength Indicator
* @mult: Multipath indicator
* @dev: Who knows? But values may vary.
* @readantcap: Antenna tuning capacity value.
* @assi: Adjacent Channel(+/- 200kHz) Strength Indicator
* @usn: Ultrasonic Noise Inticator in -DBFS
*/
struct si476x_rsq_status_report {
__u8 multhint, multlint;
__u8 snrhint, snrlint;
__u8 rssihint, rssilint;
__u8 bltf;
__u8 snr_ready;
__u8 rssiready;
__u8 injside;
__u8 afcrl;
__u8 valid;
__u16 readfreq;
__s8 freqoff;
__s8 rssi;
__s8 snr;
__s8 issi;
__s8 lassi, hassi;
__s8 mult;
__u8 dev;
__u16 readantcap;
__s8 assi;
__s8 usn;
__u8 pilotdev;
__u8 rdsdev;
__u8 assidev;
__u8 strongdev;
__u16 rdspi;
} __packed;
/**
* si476x_acf_status_report - ACF report results
*
* @blend_int: If set, indicates that stereo separation has crossed
* below the blend threshold as set by FM_ACF_BLEND_THRESHOLD
* @hblend_int: If set, indicates that HiBlend cutoff frequency is
* lower than threshold as set by FM_ACF_HBLEND_THRESHOLD
* @hicut_int: If set, indicates that HiCut cutoff frequency is lower
* than the threshold set by ACF_
*/
struct si476x_acf_status_report {
__u8 blend_int;
__u8 hblend_int;
__u8 hicut_int;
__u8 chbw_int;
__u8 softmute_int;
__u8 smute;
__u8 smattn;
__u8 chbw;
__u8 hicut;
__u8 hiblend;
__u8 pilot;
__u8 stblend;
} __packed;
enum si476x_fmagc {
SI476X_FMAGC_10K_OHM = 0,
SI476X_FMAGC_800_OHM = 1,
SI476X_FMAGC_400_OHM = 2,
SI476X_FMAGC_200_OHM = 4,
SI476X_FMAGC_100_OHM = 8,
SI476X_FMAGC_50_OHM = 16,
SI476X_FMAGC_25_OHM = 32,
SI476X_FMAGC_12P5_OHM = 64,
SI476X_FMAGC_6P25_OHM = 128,
};
struct si476x_agc_status_report {
__u8 mxhi;
__u8 mxlo;
__u8 lnahi;
__u8 lnalo;
__u8 fmagc1;
__u8 fmagc2;
__u8 pgagain;
__u8 fmwblang;
} __packed;
struct si476x_rds_blockcount_report {
__u16 expected;
__u16 received;
__u16 uncorrectable;
} __packed;
#endif /* __SI476X_REPORTS_H__ */

3
include/linux/mfd/stmpe.h
View File

@ -26,6 +26,7 @@ enum stmpe_partnum {
STMPE801,
STMPE811,
STMPE1601,
STMPE1801,
STMPE2401,
STMPE2403,
STMPE_NBR_PARTS
@ -39,6 +40,7 @@ enum {
STMPE_IDX_CHIP_ID,
STMPE_IDX_ICR_LSB,
STMPE_IDX_IER_LSB,
STMPE_IDX_ISR_LSB,
STMPE_IDX_ISR_MSB,
STMPE_IDX_GPMR_LSB,
STMPE_IDX_GPSR_LSB,
@ -49,6 +51,7 @@ enum {
STMPE_IDX_GPFER_LSB,
STMPE_IDX_GPAFR_U_MSB,
STMPE_IDX_IEGPIOR_LSB,
STMPE_IDX_ISGPIOR_LSB,
STMPE_IDX_ISGPIOR_MSB,
STMPE_IDX_MAX,
};

3
include/linux/mfd/syscon.h
View File

@ -15,8 +15,11 @@
#ifndef __LINUX_MFD_SYSCON_H__
#define __LINUX_MFD_SYSCON_H__
struct device_node;
extern struct regmap *syscon_node_to_regmap(struct device_node *np);
extern struct regmap *syscon_regmap_lookup_by_compatible(const char *s);
extern struct regmap *syscon_regmap_lookup_by_pdevname(const char *s);
extern struct regmap *syscon_regmap_lookup_by_phandle(
struct device_node *np,
const char *property);

1
include/linux/mfd/tps65090.h
View File

@ -27,6 +27,7 @@
/* TPS65090 IRQs */
enum {
TPS65090_IRQ_INTERRUPT,
TPS65090_IRQ_VAC_STATUS_CHANGE,
TPS65090_IRQ_VSYS_STATUS_CHANGE,
TPS65090_IRQ_BAT_STATUS_CHANGE,

5
include/linux/of.h
View File

@ -356,6 +356,11 @@ static inline struct device_node *of_find_node_by_name(struct device_node *from,
return NULL;
}
static inline struct device_node *of_get_parent(const struct device_node *node)
{
return NULL;
}
static inline bool of_have_populated_dt(void)
{
return false;

18
include/linux/ucb1400.h
View File

@ -83,15 +83,12 @@
#define UCB_ID 0x7e
#define UCB_ID_1400 0x4304
struct ucb1400_gpio_data {
int gpio_offset;
int (*gpio_setup)(struct device *dev, int ngpio);
int (*gpio_teardown)(struct device *dev, int ngpio);
};
struct ucb1400_gpio {
struct gpio_chip gc;
struct snd_ac97 *ac97;
int gpio_offset;
int (*gpio_setup)(struct device *dev, int ngpio);
int (*gpio_teardown)(struct device *dev, int ngpio);
};
struct ucb1400_ts {
@ -110,6 +107,9 @@ struct ucb1400 {
struct ucb1400_pdata {
int irq;
int gpio_offset;
int (*gpio_setup)(struct device *dev, int ngpio);
int (*gpio_teardown)(struct device *dev, int ngpio);
};
static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
@ -162,10 +162,4 @@ static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
int adcsync);
#ifdef CONFIG_GPIO_UCB1400
void __init ucb1400_gpio_set_data(struct ucb1400_gpio_data *data);
#else
static inline void ucb1400_gpio_set_data(struct ucb1400_gpio_data *data) {}
#endif
#endif