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iommu/tegra-smmu: smmu_flush_ptc() wants device addresses
Pass smmu_flush_ptc() the device address rather than struct page pointer. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -170,10 +170,9 @@ static void smmu_flush_ptc_all(struct tegra_smmu *smmu)
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smmu_writel(smmu, SMMU_PTC_FLUSH_TYPE_ALL, SMMU_PTC_FLUSH);
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}
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static inline void smmu_flush_ptc(struct tegra_smmu *smmu, struct page *page,
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static inline void smmu_flush_ptc(struct tegra_smmu *smmu, phys_addr_t phys,
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unsigned long offset)
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{
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phys_addr_t phys = page_to_phys(page);
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u32 value;
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offset &= ~(smmu->mc->soc->atom_size - 1);
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@ -413,7 +412,7 @@ static int tegra_smmu_as_prepare(struct tegra_smmu *smmu,
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return err;
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smmu_flush_dcache(as->pd, 0, SMMU_SIZE_PD);
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smmu_flush_ptc(smmu, as->pd, 0);
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smmu_flush_ptc(smmu, page_to_phys(as->pd), 0);
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smmu_flush_tlb_asid(smmu, as->id);
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smmu_writel(smmu, as->id & 0x7f, SMMU_PTB_ASID);
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@ -546,7 +545,7 @@ static u32 *as_get_pte(struct tegra_smmu_as *as, dma_addr_t iova,
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pd[pde] = SMMU_MK_PDE(page, SMMU_PDE_ATTR | SMMU_PDE_NEXT);
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smmu_flush_dcache(as->pd, pde << 2, 4);
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smmu_flush_ptc(smmu, as->pd, pde << 2);
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smmu_flush_ptc(smmu, page_to_phys(as->pd), pde << 2);
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smmu_flush_tlb_section(smmu, as->id, iova);
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smmu_flush(smmu);
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} else {
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@ -583,7 +582,7 @@ static void tegra_smmu_pte_put_use(struct tegra_smmu_as *as, unsigned long iova)
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/* Flush the page directory entry */
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smmu_flush_dcache(as->pd, offset, sizeof(*pd));
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smmu_flush_ptc(smmu, as->pd, offset);
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smmu_flush_ptc(smmu, page_to_phys(as->pd), offset);
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smmu_flush_tlb_section(smmu, as->id, iova);
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smmu_flush(smmu);
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@ -603,7 +602,7 @@ static void tegra_smmu_set_pte(struct tegra_smmu_as *as, unsigned long iova,
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*pte = val;
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smmu_flush_dcache(pte_page, offset, 4);
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smmu_flush_ptc(smmu, pte_page, offset);
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smmu_flush_ptc(smmu, page_to_phys(pte_page), offset);
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smmu_flush_tlb_group(smmu, as->id, iova);
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smmu_flush(smmu);
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}
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