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phy/micrel: add ability to support 50MHz RMII clock on KZS8051RNL
Platform code can now set the MICREL_PHY_50MHZ_CLK bit of dev_flags in a fixup routine (registered with phy_register_fixup_for_uid()), to make the KZS8051RNL PHY work with 50MHz RMII reference clock. Cc: David J. Choi <david.choi@micrel.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -19,13 +19,7 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#define PHY_ID_KSZ9021 0x00221611
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#define PHY_ID_KS8737 0x00221720
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#define PHY_ID_KS8041 0x00221510
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#define PHY_ID_KS8051 0x00221550
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/* both for ks8001 Rev. A/B, and for ks8721 Rev 3. */
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#define PHY_ID_KS8001 0x0022161A
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#include <linux/micrel_phy.h>
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/* general Interrupt control/status reg in vendor specific block. */
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#define MII_KSZPHY_INTCS 0x1B
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@ -46,6 +40,7 @@
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#define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9)
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#define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14)
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#define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14)
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#define KSZ8051_RMII_50MHZ_CLK (1 << 7)
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static int kszphy_ack_interrupt(struct phy_device *phydev)
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{
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@ -106,6 +101,19 @@ static int kszphy_config_init(struct phy_device *phydev)
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return 0;
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}
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static int ks8051_config_init(struct phy_device *phydev)
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{
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int regval;
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if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
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regval = phy_read(phydev, MII_KSZPHY_CTRL);
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regval |= KSZ8051_RMII_50MHZ_CLK;
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phy_write(phydev, MII_KSZPHY_CTRL, regval);
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}
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return 0;
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}
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static struct phy_driver ks8737_driver = {
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.phy_id = PHY_ID_KS8737,
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.phy_id_mask = 0x00fffff0,
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@ -142,7 +150,7 @@ static struct phy_driver ks8051_driver = {
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.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
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| SUPPORTED_Asym_Pause),
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.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
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.config_init = kszphy_config_init,
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.config_init = ks8051_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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.ack_interrupt = kszphy_ack_interrupt,
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16
include/linux/micrel_phy.h
Normal file
16
include/linux/micrel_phy.h
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@ -0,0 +1,16 @@
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#ifndef _MICREL_PHY_H
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#define _MICREL_PHY_H
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#define MICREL_PHY_ID_MASK 0x00fffff0
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#define PHY_ID_KSZ9021 0x00221611
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#define PHY_ID_KS8737 0x00221720
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#define PHY_ID_KS8041 0x00221510
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#define PHY_ID_KS8051 0x00221550
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/* both for ks8001 Rev. A/B, and for ks8721 Rev 3. */
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#define PHY_ID_KS8001 0x0022161A
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/* struct phy_device dev_flags definitions */
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#define MICREL_PHY_50MHZ_CLK 0x00000001
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#endif /* _MICREL_PHY_H */
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