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MIPS: lantiq: remove old GPHY loader code
The GPHY loader was replaced by a new more flexible driver. Remove the old driver. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17129/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Hauke Mehrtens
Ralf Baechle
parent
126534141b
commit
d5103604f7
@ -1,5 +1,3 @@
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obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
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obj-y += vmmc.o
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obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
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@ -27,18 +27,6 @@
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#define RCU_RST_REQ 0x0010
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/* reset status register */
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#define RCU_RST_STAT 0x0014
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/* vr9 gphy registers */
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#define RCU_GFS_ADD0_XRX200 0x0020
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#define RCU_GFS_ADD1_XRX200 0x0068
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/* xRX300 gphy registers */
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#define RCU_GFS_ADD0_XRX300 0x0020
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#define RCU_GFS_ADD1_XRX300 0x0058
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#define RCU_GFS_ADD2_XRX300 0x00AC
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/* xRX330 gphy registers */
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#define RCU_GFS_ADD0_XRX330 0x0020
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#define RCU_GFS_ADD1_XRX330 0x0058
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#define RCU_GFS_ADD2_XRX330 0x00AC
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#define RCU_GFS_ADD3_XRX330 0x0264
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/* xbar BE flag */
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#define RCU_AHB_ENDIAN 0x004C
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@ -48,15 +36,6 @@
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#define RCU_RD_GPHY0_XRX200 BIT(31)
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#define RCU_RD_SRST BIT(30)
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#define RCU_RD_GPHY1_XRX200 BIT(29)
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/* xRX300 bits */
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#define RCU_RD_GPHY0_XRX300 BIT(31)
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#define RCU_RD_GPHY1_XRX300 BIT(29)
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#define RCU_RD_GPHY2_XRX300 BIT(28)
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/* xRX330 bits */
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#define RCU_RD_GPHY0_XRX330 BIT(31)
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#define RCU_RD_GPHY1_XRX330 BIT(29)
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#define RCU_RD_GPHY2_XRX330 BIT(28)
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#define RCU_RD_GPHY3_XRX330 BIT(10)
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/* reset cause */
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#define RCU_STAT_SHIFT 26
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@ -98,7 +77,6 @@
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/* remapped base addr of the reset control unit */
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static void __iomem *ltq_rcu_membase;
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static struct device_node *ltq_rcu_np;
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static DEFINE_SPINLOCK(ltq_rcu_lock);
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static void ltq_rcu_w32(uint32_t val, uint32_t reg_off)
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{
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@ -110,90 +88,6 @@ static uint32_t ltq_rcu_r32(uint32_t reg_off)
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return ltq_r32(ltq_rcu_membase + reg_off);
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}
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static void ltq_rcu_w32_mask(uint32_t clr, uint32_t set, uint32_t reg_off)
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{
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unsigned long flags;
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spin_lock_irqsave(<q_rcu_lock, flags);
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ltq_rcu_w32((ltq_rcu_r32(reg_off) & ~(clr)) | (set), reg_off);
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spin_unlock_irqrestore(<q_rcu_lock, flags);
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}
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struct ltq_gphy_reset {
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u32 rd;
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u32 addr;
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};
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/* reset / boot a gphy */
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static struct ltq_gphy_reset xrx200_gphy[] = {
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{RCU_RD_GPHY0_XRX200, RCU_GFS_ADD0_XRX200},
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{RCU_RD_GPHY1_XRX200, RCU_GFS_ADD1_XRX200},
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};
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/* reset / boot a gphy */
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static struct ltq_gphy_reset xrx300_gphy[] = {
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{RCU_RD_GPHY0_XRX300, RCU_GFS_ADD0_XRX300},
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{RCU_RD_GPHY1_XRX300, RCU_GFS_ADD1_XRX300},
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{RCU_RD_GPHY2_XRX300, RCU_GFS_ADD2_XRX300},
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};
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/* reset / boot a gphy */
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static struct ltq_gphy_reset xrx330_gphy[] = {
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{RCU_RD_GPHY0_XRX330, RCU_GFS_ADD0_XRX330},
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{RCU_RD_GPHY1_XRX330, RCU_GFS_ADD1_XRX330},
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{RCU_RD_GPHY2_XRX330, RCU_GFS_ADD2_XRX330},
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{RCU_RD_GPHY3_XRX330, RCU_GFS_ADD3_XRX330},
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};
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static void xrx200_gphy_boot_addr(struct ltq_gphy_reset *phy_regs,
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dma_addr_t dev_addr)
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{
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ltq_rcu_w32_mask(0, phy_regs->rd, RCU_RST_REQ);
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ltq_rcu_w32(dev_addr, phy_regs->addr);
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ltq_rcu_w32_mask(phy_regs->rd, 0, RCU_RST_REQ);
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}
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/* reset and boot a gphy. these phys only exist on xrx200 SoC */
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int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr)
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{
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struct clk *clk;
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if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) {
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dev_err(dev, "this SoC has no GPHY\n");
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return -EINVAL;
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}
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if (of_machine_is_compatible("lantiq,vr9")) {
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clk = clk_get_sys("1f203000.rcu", "gphy");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_enable(clk);
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}
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dev_info(dev, "booting GPHY%u firmware at %X\n", id, dev_addr);
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if (of_machine_is_compatible("lantiq,vr9")) {
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if (id >= ARRAY_SIZE(xrx200_gphy)) {
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dev_err(dev, "%u is an invalid gphy id\n", id);
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return -EINVAL;
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}
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xrx200_gphy_boot_addr(&xrx200_gphy[id], dev_addr);
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} else if (of_machine_is_compatible("lantiq,ar10")) {
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if (id >= ARRAY_SIZE(xrx300_gphy)) {
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dev_err(dev, "%u is an invalid gphy id\n", id);
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return -EINVAL;
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}
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xrx200_gphy_boot_addr(&xrx300_gphy[id], dev_addr);
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} else if (of_machine_is_compatible("lantiq,grx390")) {
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if (id >= ARRAY_SIZE(xrx330_gphy)) {
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dev_err(dev, "%u is an invalid gphy id\n", id);
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return -EINVAL;
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}
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xrx200_gphy_boot_addr(&xrx330_gphy[id], dev_addr);
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}
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return 0;
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}
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static void ltq_machine_restart(char *command)
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{
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u32 val = ltq_rcu_r32(RCU_RST_REQ);
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@ -1,113 +0,0 @@
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/*
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* Lantiq XRX200 PHY Firmware Loader
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* Author: John Crispin
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2012 John Crispin <john@phrozen.org>
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*/
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/firmware.h>
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#include <linux/of_platform.h>
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#include <lantiq_soc.h>
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#define XRX200_GPHY_FW_ALIGN (16 * 1024)
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static dma_addr_t xway_gphy_load(struct platform_device *pdev)
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{
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const struct firmware *fw;
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dma_addr_t dev_addr = 0;
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const char *fw_name;
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void *fw_addr;
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size_t size;
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if (of_get_property(pdev->dev.of_node, "firmware1", NULL) ||
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of_get_property(pdev->dev.of_node, "firmware2", NULL)) {
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switch (ltq_soc_type()) {
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case SOC_TYPE_VR9:
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if (of_property_read_string(pdev->dev.of_node,
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"firmware1", &fw_name)) {
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dev_err(&pdev->dev,
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"failed to load firmware filename\n");
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return 0;
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}
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break;
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case SOC_TYPE_VR9_2:
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if (of_property_read_string(pdev->dev.of_node,
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"firmware2", &fw_name)) {
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dev_err(&pdev->dev,
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"failed to load firmware filename\n");
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return 0;
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}
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break;
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}
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} else if (of_property_read_string(pdev->dev.of_node,
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"firmware", &fw_name)) {
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dev_err(&pdev->dev, "failed to load firmware filename\n");
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return 0;
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}
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dev_info(&pdev->dev, "requesting %s\n", fw_name);
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if (request_firmware(&fw, fw_name, &pdev->dev)) {
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dev_err(&pdev->dev, "failed to load firmware: %s\n", fw_name);
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return 0;
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}
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/*
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* GPHY cores need the firmware code in a persistent and contiguous
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* memory area with a 16 kB boundary aligned start address
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*/
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size = fw->size + XRX200_GPHY_FW_ALIGN;
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fw_addr = dma_alloc_coherent(&pdev->dev, size, &dev_addr, GFP_KERNEL);
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if (fw_addr) {
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fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN);
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dev_addr = ALIGN(dev_addr, XRX200_GPHY_FW_ALIGN);
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memcpy(fw_addr, fw->data, fw->size);
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} else {
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dev_err(&pdev->dev, "failed to alloc firmware memory\n");
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}
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release_firmware(fw);
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return dev_addr;
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}
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static int xway_phy_fw_probe(struct platform_device *pdev)
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{
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dma_addr_t fw_addr;
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struct property *pp;
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unsigned char *phyids;
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int i, ret = 0;
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fw_addr = xway_gphy_load(pdev);
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if (!fw_addr)
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return -EINVAL;
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pp = of_find_property(pdev->dev.of_node, "phys", NULL);
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if (!pp)
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return -ENOENT;
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phyids = pp->value;
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for (i = 0; i < pp->length && !ret; i++)
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ret = xrx200_gphy_boot(&pdev->dev, phyids[i], fw_addr);
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if (!ret)
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mdelay(100);
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return ret;
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}
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static const struct of_device_id xway_phy_match[] = {
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{ .compatible = "lantiq,phy-xrx200" },
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{},
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};
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static struct platform_driver xway_phy_driver = {
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.probe = xway_phy_fw_probe,
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.driver = {
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.name = "phy-xrx200",
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.of_match_table = xway_phy_match,
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},
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};
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builtin_platform_driver(xway_phy_driver);
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