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arch: simplify architecture specific page size configuration
arc, arm64, parisc and powerpc all have their own Kconfig symbols in place of the common CONFIG_PAGE_SIZE_4KB symbols. Change these so the common symbols are the ones that are actually used, while leaving the arhcitecture specific ones as the user visible place for configuring it, to avoid breaking user configs. Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> (powerpc32) Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Helge Deller <deller@gmx.de> # parisc Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -284,14 +284,17 @@ choice
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config ARC_PAGE_SIZE_8K
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bool "8KB"
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select HAVE_PAGE_SIZE_8KB
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help
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Choose between 8k vs 16k
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config ARC_PAGE_SIZE_16K
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select HAVE_PAGE_SIZE_16KB
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bool "16KB"
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config ARC_PAGE_SIZE_4K
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bool "4KB"
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select HAVE_PAGE_SIZE_4KB
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depends on ARC_MMU_V3 || ARC_MMU_V4
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endchoice
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@ -13,10 +13,8 @@
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#include <linux/const.h>
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/* PAGE_SHIFT determines the page size */
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#if defined(CONFIG_ARC_PAGE_SIZE_16K)
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#define PAGE_SHIFT 14
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#elif defined(CONFIG_ARC_PAGE_SIZE_4K)
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#define PAGE_SHIFT 12
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#ifdef __KERNEL__
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#define PAGE_SHIFT CONFIG_PAGE_SHIFT
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#else
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/*
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* Default 8k
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@ -277,27 +277,21 @@ config 64BIT
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config MMU
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def_bool y
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config ARM64_PAGE_SHIFT
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int
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default 16 if ARM64_64K_PAGES
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default 14 if ARM64_16K_PAGES
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default 12
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config ARM64_CONT_PTE_SHIFT
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int
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default 5 if ARM64_64K_PAGES
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default 7 if ARM64_16K_PAGES
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default 5 if PAGE_SIZE_64KB
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default 7 if PAGE_SIZE_16KB
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default 4
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config ARM64_CONT_PMD_SHIFT
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int
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default 5 if ARM64_64K_PAGES
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default 5 if ARM64_16K_PAGES
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default 5 if PAGE_SIZE_64KB
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default 5 if PAGE_SIZE_16KB
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default 4
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config ARCH_MMAP_RND_BITS_MIN
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default 14 if ARM64_64K_PAGES
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default 16 if ARM64_16K_PAGES
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default 14 if PAGE_SIZE_64KB
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default 16 if PAGE_SIZE_16KB
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default 18
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# max bits determined by the following formula:
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@ -1259,11 +1253,13 @@ choice
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config ARM64_4K_PAGES
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bool "4KB"
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select HAVE_PAGE_SIZE_4KB
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help
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This feature enables 4KB pages support.
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config ARM64_16K_PAGES
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bool "16KB"
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select HAVE_PAGE_SIZE_16KB
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help
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The system will use 16KB pages support. AArch32 emulation
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requires applications compiled with 16K (or a multiple of 16K)
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@ -1271,6 +1267,7 @@ config ARM64_16K_PAGES
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config ARM64_64K_PAGES
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bool "64KB"
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select HAVE_PAGE_SIZE_64KB
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help
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This feature enables 64KB pages support (4KB by default)
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allowing only two levels of page tables and faster TLB
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@ -1291,19 +1288,19 @@ choice
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config ARM64_VA_BITS_36
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bool "36-bit" if EXPERT
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depends on ARM64_16K_PAGES
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depends on PAGE_SIZE_16KB
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config ARM64_VA_BITS_39
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bool "39-bit"
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depends on ARM64_4K_PAGES
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depends on PAGE_SIZE_4KB
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config ARM64_VA_BITS_42
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bool "42-bit"
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depends on ARM64_64K_PAGES
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depends on PAGE_SIZE_64KB
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config ARM64_VA_BITS_47
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bool "47-bit"
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depends on ARM64_16K_PAGES
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depends on PAGE_SIZE_16KB
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config ARM64_VA_BITS_48
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bool "48-bit"
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@ -11,7 +11,7 @@
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#include <linux/const.h>
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/* PAGE_SHIFT determines the page size */
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#define PAGE_SHIFT CONFIG_ARM64_PAGE_SHIFT
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#define PAGE_SHIFT CONFIG_PAGE_SHIFT
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#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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@ -273,6 +273,7 @@ choice
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config PARISC_PAGE_SIZE_4KB
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bool "4KB"
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select HAVE_PAGE_SIZE_4KB
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help
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This lets you select the page size of the kernel. For best
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performance, a page size of 16KB is recommended. For best
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@ -288,10 +289,12 @@ config PARISC_PAGE_SIZE_4KB
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config PARISC_PAGE_SIZE_16KB
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bool "16KB"
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select HAVE_PAGE_SIZE_16KB
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depends on PA8X00 && BROKEN && !KFENCE
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config PARISC_PAGE_SIZE_64KB
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bool "64KB"
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select HAVE_PAGE_SIZE_64KB
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depends on PA8X00 && BROKEN && !KFENCE
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endchoice
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@ -4,15 +4,7 @@
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#include <linux/const.h>
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#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
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# define PAGE_SHIFT 12
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#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
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# define PAGE_SHIFT 14
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#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
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# define PAGE_SHIFT 16
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#else
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# error "unknown default kernel page size"
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#endif
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#define PAGE_SHIFT CONFIG_PAGE_SHIFT
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#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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@ -212,7 +212,7 @@ config PPC
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select HAVE_ARCH_HUGE_VMAP if PPC_RADIX_MMU || PPC_8xx
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select HAVE_ARCH_JUMP_LABEL
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select HAVE_ARCH_JUMP_LABEL_RELATIVE
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select HAVE_ARCH_KASAN if PPC32 && PPC_PAGE_SHIFT <= 14
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select HAVE_ARCH_KASAN if PPC32 && PAGE_SHIFT <= 14
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select HAVE_ARCH_KASAN if PPC_RADIX_MMU
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select HAVE_ARCH_KASAN if PPC_BOOK3E_64
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select HAVE_ARCH_KASAN_VMALLOC if HAVE_ARCH_KASAN
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@ -809,19 +809,23 @@ choice
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config PPC_4K_PAGES
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bool "4k page size"
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select HAVE_ARCH_SOFT_DIRTY if PPC_BOOK3S_64
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select HAVE_PAGE_SIZE_4KB
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config PPC_16K_PAGES
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bool "16k page size"
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depends on 44x || PPC_8xx
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select HAVE_PAGE_SIZE_16KB
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config PPC_64K_PAGES
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bool "64k page size"
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depends on 44x || PPC_BOOK3S_64
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select HAVE_ARCH_SOFT_DIRTY if PPC_BOOK3S_64
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select HAVE_PAGE_SIZE_64KB
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config PPC_256K_PAGES
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bool "256k page size (Requires non-standard binutils settings)"
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depends on 44x && !PPC_47x
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select HAVE_PAGE_SIZE_256KB
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help
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Make the page size 256k.
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@ -832,29 +836,6 @@ config PPC_256K_PAGES
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endchoice
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config PAGE_SIZE_4KB
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def_bool y
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depends on PPC_4K_PAGES
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config PAGE_SIZE_16KB
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def_bool y
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depends on PPC_16K_PAGES
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config PAGE_SIZE_64KB
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def_bool y
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depends on PPC_64K_PAGES
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config PAGE_SIZE_256KB
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def_bool y
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depends on PPC_256K_PAGES
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config PPC_PAGE_SHIFT
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int
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default 18 if PPC_256K_PAGES
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default 16 if PPC_64K_PAGES
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default 14 if PPC_16K_PAGES
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default 12
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config THREAD_SHIFT
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int "Thread shift" if EXPERT
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range 13 15
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@ -891,7 +872,7 @@ config DATA_SHIFT
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default 23 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx && PIN_TLB_DATA
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default 19 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx
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default 24 if STRICT_KERNEL_RWX && PPC_85xx
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default PPC_PAGE_SHIFT
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default PAGE_SHIFT
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help
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On Book3S 32 (603+), DBATs are used to map kernel text and rodata RO.
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Smaller is the alignment, greater is the number of necessary DBATs.
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@ -21,7 +21,7 @@
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* page size. When using 64K pages however, whether we are really supporting
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* 64K pages in HW or not is irrelevant to those definitions.
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*/
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#define PAGE_SHIFT CONFIG_PPC_PAGE_SHIFT
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#define PAGE_SHIFT CONFIG_PAGE_SHIFT
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#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
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#ifndef __ASSEMBLY__
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@ -139,7 +139,7 @@ LX_CONFIG(CONFIG_ARM64_64K_PAGES)
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if IS_BUILTIN(CONFIG_ARM64):
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LX_VALUE(CONFIG_ARM64_PA_BITS)
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LX_VALUE(CONFIG_ARM64_VA_BITS)
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LX_VALUE(CONFIG_ARM64_PAGE_SHIFT)
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LX_VALUE(CONFIG_PAGE_SHIFT)
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LX_VALUE(CONFIG_ARCH_FORCE_MAX_ORDER)
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LX_CONFIG(CONFIG_SPARSEMEM)
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LX_CONFIG(CONFIG_SPARSEMEM_EXTREME)
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@ -41,7 +41,7 @@ class aarch64_page_ops():
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self.SECTION_SIZE_BITS = 27
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self.MAX_PHYSMEM_BITS = constants.LX_CONFIG_ARM64_VA_BITS
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self.PAGE_SHIFT = constants.LX_CONFIG_ARM64_PAGE_SHIFT
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self.PAGE_SHIFT = constants.LX_CONFIG_PAGE_SHIFT
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self.PAGE_SIZE = 1 << self.PAGE_SHIFT
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self.PAGE_MASK = (~(self.PAGE_SIZE - 1)) & ((1 << 64) - 1)
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