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[ACPI] Reduce acpi-cpufreq switching latency by 50%
The acpi-cpufreq driver does a P-state get after a P-state set to verify whether set went through successfully. This test is kind of redundant as set goes throught most of the times, and the test is also expensive as a get of P-states can take a lot of time (same as a set operation) as it goes through SMM mode. Effectively, we are doubling the P-state latency due to this get opertion. momdule parameter "acpi_pstate_strict" restores orginal paranoia. http://bugzilla.kernel.org/show_bug.cgi?id=5129 Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -31,6 +31,7 @@
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#include <linux/cpufreq.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/compiler.h>
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#include <asm/io.h>
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#include <asm/delay.h>
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#include <asm/uaccess.h>
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@ -57,6 +58,8 @@ static struct cpufreq_acpi_io *acpi_io_data[NR_CPUS];
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static struct cpufreq_driver acpi_cpufreq_driver;
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static unsigned int acpi_pstate_strict;
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static int
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acpi_processor_write_port(
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u16 port,
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@ -163,34 +166,44 @@ acpi_processor_set_performance (
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}
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/*
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* Then we read the 'status_register' and compare the value with the
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* target state's 'status' to make sure the transition was successful.
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* Note that we'll poll for up to 1ms (100 cycles of 10us) before
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* giving up.
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* Assume the write went through when acpi_pstate_strict is not used.
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* As read status_register is an expensive operation and there
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* are no specific error cases where an IO port write will fail.
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*/
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if (acpi_pstate_strict) {
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/* Then we read the 'status_register' and compare the value
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* with the target state's 'status' to make sure the
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* transition was successful.
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* Note that we'll poll for up to 1ms (100 cycles of 10us)
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* before giving up.
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*/
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port = data->acpi_data.status_register.address;
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bit_width = data->acpi_data.status_register.bit_width;
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port = data->acpi_data.status_register.address;
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bit_width = data->acpi_data.status_register.bit_width;
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dprintk("Looking for 0x%08x from port 0x%04x\n",
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(u32) data->acpi_data.states[state].status, port);
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dprintk("Looking for 0x%08x from port 0x%04x\n",
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(u32) data->acpi_data.states[state].status, port);
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for (i=0; i<100; i++) {
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ret = acpi_processor_read_port(port, bit_width, &value);
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if (ret) {
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dprintk("Invalid port width 0x%04x\n", bit_width);
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retval = ret;
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goto migrate_end;
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for (i=0; i<100; i++) {
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ret = acpi_processor_read_port(port, bit_width, &value);
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if (ret) {
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dprintk("Invalid port width 0x%04x\n", bit_width);
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retval = ret;
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goto migrate_end;
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}
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if (value == (u32) data->acpi_data.states[state].status)
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break;
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udelay(10);
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}
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if (value == (u32) data->acpi_data.states[state].status)
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break;
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udelay(10);
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} else {
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i = 0;
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value = (u32) data->acpi_data.states[state].status;
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}
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/* notify cpufreq */
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cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
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if (value != (u32) data->acpi_data.states[state].status) {
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if (unlikely(value != (u32) data->acpi_data.states[state].status)) {
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unsigned int tmp = cpufreq_freqs.new;
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cpufreq_freqs.new = cpufreq_freqs.old;
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cpufreq_freqs.old = tmp;
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@ -537,6 +550,8 @@ acpi_cpufreq_exit (void)
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return;
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}
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module_param(acpi_pstate_strict, uint, 0644);
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MODULE_PARM_DESC(acpi_pstate_strict, "value 0 or non-zero. non-zero -> strict ACPI checks are performed during frequency changes.");
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late_initcall(acpi_cpufreq_init);
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module_exit(acpi_cpufreq_exit);
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