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ixgb: Use pr_<level> and netdev_<level>
Convert DEBUGOUTx to pr_debug Convert DEBUGFUNC to more commonly used ENTER Convert mac address output to %pM Use #define pr_fmt Convert a few printks to pr_<level> Improve ixgb_mc_addr_list_update: use a temporary for current mc address Use etherdevice.h functions for mac address testing Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Joe Perches
David S. Miller
parent
c0dfb90e5b
commit
d328bc839e
@ -78,9 +78,13 @@ struct ixgb_adapter;
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#define PFX "ixgb: "
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#ifdef _DEBUG_DRIVER_
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#define IXGB_DBG(args...) printk(KERN_DEBUG PFX args)
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#define IXGB_DBG(fmt, args...) printk(KERN_DEBUG PFX fmt, ##args)
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#else
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#define IXGB_DBG(args...)
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#define IXGB_DBG(fmt, args...) \
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do { \
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if (0) \
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printk(KERN_DEBUG PFX fmt, ##args); \
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} while (0)
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#endif
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/* TX/RX descriptor defines */
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@ -26,6 +26,8 @@
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*******************************************************************************/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include "ixgb_hw.h"
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#include "ixgb_ee.h"
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/* Local prototypes */
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@ -467,11 +469,11 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
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u16 checksum = 0;
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struct ixgb_ee_map_type *ee_map;
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DEBUGFUNC("ixgb_get_eeprom_data");
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ENTER();
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ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
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DEBUGOUT("ixgb_ee: Reading eeprom data\n");
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pr_debug("Reading eeprom data\n");
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for (i = 0; i < IXGB_EEPROM_SIZE ; i++) {
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u16 ee_data;
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ee_data = ixgb_read_eeprom(hw, i);
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@ -480,7 +482,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
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}
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if (checksum != (u16) EEPROM_SUM) {
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DEBUGOUT("ixgb_ee: Checksum invalid.\n");
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pr_debug("Checksum invalid\n");
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/* clear the init_ctrl_reg_1 to signify that the cache is
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* invalidated */
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ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
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@ -489,7 +491,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
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if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
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!= cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
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DEBUGOUT("ixgb_ee: Signature invalid.\n");
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pr_debug("Signature invalid\n");
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return(false);
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}
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@ -555,13 +557,13 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
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int i;
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struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
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DEBUGFUNC("ixgb_get_ee_mac_addr");
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ENTER();
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if (ixgb_check_and_get_eeprom_data(hw) == true) {
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for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
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mac_addr[i] = ee_map->mac_addr[i];
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DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]);
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}
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pr_debug("eeprom mac address = %pM\n", mac_addr);
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}
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}
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@ -30,9 +30,13 @@
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* Shared functions for accessing and configuring the adapter
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include "ixgb_hw.h"
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#include "ixgb_ids.h"
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#include <linux/etherdevice.h>
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/* Local function prototypes */
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static u32 ixgb_hash_mc_addr(struct ixgb_hw *hw, u8 * mc_addr);
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@ -120,13 +124,13 @@ ixgb_adapter_stop(struct ixgb_hw *hw)
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u32 ctrl_reg;
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u32 icr_reg;
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DEBUGFUNC("ixgb_adapter_stop");
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ENTER();
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/* If we are stopped or resetting exit gracefully and wait to be
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* started again before accessing the hardware.
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*/
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if (hw->adapter_stopped) {
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DEBUGOUT("Exiting because the adapter is already stopped!!!\n");
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pr_debug("Exiting because the adapter is already stopped!!!\n");
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return false;
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}
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@ -136,7 +140,7 @@ ixgb_adapter_stop(struct ixgb_hw *hw)
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hw->adapter_stopped = true;
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/* Clear interrupt mask to stop board from generating interrupts */
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DEBUGOUT("Masking off all interrupts\n");
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pr_debug("Masking off all interrupts\n");
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IXGB_WRITE_REG(hw, IMC, 0xFFFFFFFF);
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/* Disable the Transmit and Receive units. Then delay to allow
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@ -152,12 +156,12 @@ ixgb_adapter_stop(struct ixgb_hw *hw)
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* the current PCI configuration. The global reset bit is self-
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* clearing, and should clear within a microsecond.
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*/
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DEBUGOUT("Issuing a global reset to MAC\n");
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pr_debug("Issuing a global reset to MAC\n");
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ctrl_reg = ixgb_mac_reset(hw);
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/* Clear interrupt mask to stop board from generating interrupts */
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DEBUGOUT("Masking off all interrupts\n");
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pr_debug("Masking off all interrupts\n");
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IXGB_WRITE_REG(hw, IMC, 0xffffffff);
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/* Clear any pending interrupt events. */
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@ -183,7 +187,7 @@ ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
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u16 vendor_name[5];
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ixgb_xpak_vendor xpak_vendor;
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DEBUGFUNC("ixgb_identify_xpak_vendor");
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ENTER();
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/* Read the first few bytes of the vendor string from the XPAK NVR
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* registers. These are standard XENPAK/XPAK registers, so all XPAK
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@ -222,12 +226,12 @@ ixgb_identify_phy(struct ixgb_hw *hw)
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ixgb_phy_type phy_type;
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ixgb_xpak_vendor xpak_vendor;
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DEBUGFUNC("ixgb_identify_phy");
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ENTER();
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/* Infer the transceiver/phy type from the device id */
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switch (hw->device_id) {
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case IXGB_DEVICE_ID_82597EX:
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DEBUGOUT("Identified TXN17401 optics\n");
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pr_debug("Identified TXN17401 optics\n");
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phy_type = ixgb_phy_type_txn17401;
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break;
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@ -237,30 +241,30 @@ ixgb_identify_phy(struct ixgb_hw *hw)
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* type of optics. */
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xpak_vendor = ixgb_identify_xpak_vendor(hw);
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if (xpak_vendor == ixgb_xpak_vendor_intel) {
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DEBUGOUT("Identified TXN17201 optics\n");
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pr_debug("Identified TXN17201 optics\n");
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phy_type = ixgb_phy_type_txn17201;
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} else {
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DEBUGOUT("Identified G6005 optics\n");
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pr_debug("Identified G6005 optics\n");
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phy_type = ixgb_phy_type_g6005;
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}
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break;
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case IXGB_DEVICE_ID_82597EX_LR:
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DEBUGOUT("Identified G6104 optics\n");
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pr_debug("Identified G6104 optics\n");
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phy_type = ixgb_phy_type_g6104;
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break;
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case IXGB_DEVICE_ID_82597EX_CX4:
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DEBUGOUT("Identified CX4\n");
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pr_debug("Identified CX4\n");
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xpak_vendor = ixgb_identify_xpak_vendor(hw);
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if (xpak_vendor == ixgb_xpak_vendor_intel) {
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DEBUGOUT("Identified TXN17201 optics\n");
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pr_debug("Identified TXN17201 optics\n");
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phy_type = ixgb_phy_type_txn17201;
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} else {
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DEBUGOUT("Identified G6005 optics\n");
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pr_debug("Identified G6005 optics\n");
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phy_type = ixgb_phy_type_g6005;
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}
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break;
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default:
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DEBUGOUT("Unknown physical layer module\n");
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pr_debug("Unknown physical layer module\n");
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phy_type = ixgb_phy_type_unknown;
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break;
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}
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@ -296,18 +300,18 @@ ixgb_init_hw(struct ixgb_hw *hw)
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u32 ctrl_reg;
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bool status;
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DEBUGFUNC("ixgb_init_hw");
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ENTER();
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/* Issue a global reset to the MAC. This will reset the chip's
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* transmit, receive, DMA, and link units. It will not effect
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* the current PCI configuration. The global reset bit is self-
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* clearing, and should clear within a microsecond.
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*/
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DEBUGOUT("Issuing a global reset to MAC\n");
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pr_debug("Issuing a global reset to MAC\n");
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ctrl_reg = ixgb_mac_reset(hw);
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DEBUGOUT("Issuing an EE reset to MAC\n");
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pr_debug("Issuing an EE reset to MAC\n");
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#ifdef HP_ZX1
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/* Workaround for 82597EX reset errata */
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IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST);
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@ -335,7 +339,7 @@ ixgb_init_hw(struct ixgb_hw *hw)
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* If it is not valid, we fail hardware init.
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*/
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if (!mac_addr_valid(hw->curr_mac_addr)) {
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DEBUGOUT("MAC address invalid after ixgb_init_rx_addrs\n");
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pr_debug("MAC address invalid after ixgb_init_rx_addrs\n");
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return(false);
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}
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@ -346,7 +350,7 @@ ixgb_init_hw(struct ixgb_hw *hw)
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ixgb_get_bus_info(hw);
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/* Zero out the Multicast HASH table */
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DEBUGOUT("Zeroing the MTA\n");
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pr_debug("Zeroing the MTA\n");
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for (i = 0; i < IXGB_MC_TBL_SIZE; i++)
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IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);
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@ -379,7 +383,7 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw)
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{
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u32 i;
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DEBUGFUNC("ixgb_init_rx_addrs");
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ENTER();
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/*
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* If the current mac address is valid, assume it is a software override
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@ -391,28 +395,19 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw)
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/* Get the MAC address from the eeprom for later reference */
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ixgb_get_ee_mac_addr(hw, hw->curr_mac_addr);
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DEBUGOUT3(" Keeping Permanent MAC Addr =%.2X %.2X %.2X ",
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hw->curr_mac_addr[0],
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hw->curr_mac_addr[1], hw->curr_mac_addr[2]);
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DEBUGOUT3("%.2X %.2X %.2X\n",
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hw->curr_mac_addr[3],
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hw->curr_mac_addr[4], hw->curr_mac_addr[5]);
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pr_debug("Keeping Permanent MAC Addr = %pM\n",
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hw->curr_mac_addr);
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} else {
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/* Setup the receive address. */
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DEBUGOUT("Overriding MAC Address in RAR[0]\n");
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DEBUGOUT3(" New MAC Addr =%.2X %.2X %.2X ",
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hw->curr_mac_addr[0],
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hw->curr_mac_addr[1], hw->curr_mac_addr[2]);
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DEBUGOUT3("%.2X %.2X %.2X\n",
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hw->curr_mac_addr[3],
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hw->curr_mac_addr[4], hw->curr_mac_addr[5]);
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pr_debug("Overriding MAC Address in RAR[0]\n");
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pr_debug("New MAC Addr = %pM\n", hw->curr_mac_addr);
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ixgb_rar_set(hw, hw->curr_mac_addr, 0);
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}
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/* Zero out the other 15 receive addresses. */
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DEBUGOUT("Clearing RAR[1-15]\n");
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pr_debug("Clearing RAR[1-15]\n");
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for (i = 1; i < IXGB_RAR_ENTRIES; i++) {
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/* Write high reg first to disable the AV bit first */
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IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
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@ -444,64 +439,50 @@ ixgb_mc_addr_list_update(struct ixgb_hw *hw,
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u32 hash_value;
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u32 i;
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u32 rar_used_count = 1; /* RAR[0] is used for our MAC address */
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u8 *mca;
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DEBUGFUNC("ixgb_mc_addr_list_update");
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ENTER();
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/* Set the new number of MC addresses that we are being requested to use. */
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hw->num_mc_addrs = mc_addr_count;
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/* Clear RAR[1-15] */
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DEBUGOUT(" Clearing RAR[1-15]\n");
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pr_debug("Clearing RAR[1-15]\n");
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for (i = rar_used_count; i < IXGB_RAR_ENTRIES; i++) {
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IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
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IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
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}
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/* Clear the MTA */
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DEBUGOUT(" Clearing MTA\n");
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pr_debug("Clearing MTA\n");
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for (i = 0; i < IXGB_MC_TBL_SIZE; i++)
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IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);
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/* Add the new addresses */
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mca = mc_addr_list;
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for (i = 0; i < mc_addr_count; i++) {
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DEBUGOUT(" Adding the multicast addresses:\n");
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DEBUGOUT7(" MC Addr #%d =%.2X %.2X %.2X %.2X %.2X %.2X\n", i,
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mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad)],
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mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) +
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1],
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mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) +
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2],
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mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) +
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3],
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mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) +
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4],
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mc_addr_list[i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad) +
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5]);
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pr_debug("Adding the multicast addresses:\n");
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pr_debug("MC Addr #%d = %pM\n", i, mca);
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/* Place this multicast address in the RAR if there is room, *
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* else put it in the MTA
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*/
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if (rar_used_count < IXGB_RAR_ENTRIES) {
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ixgb_rar_set(hw,
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mc_addr_list +
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(i * (IXGB_ETH_LENGTH_OF_ADDRESS + pad)),
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rar_used_count);
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DEBUGOUT1("Added a multicast address to RAR[%d]\n", i);
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ixgb_rar_set(hw, mca, rar_used_count);
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pr_debug("Added a multicast address to RAR[%d]\n", i);
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rar_used_count++;
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} else {
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hash_value = ixgb_hash_mc_addr(hw,
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mc_addr_list +
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(i *
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(IXGB_ETH_LENGTH_OF_ADDRESS
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+ pad)));
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hash_value = ixgb_hash_mc_addr(hw, mca);
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DEBUGOUT1(" Hash value = 0x%03X\n", hash_value);
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pr_debug("Hash value = 0x%03X\n", hash_value);
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ixgb_mta_set(hw, hash_value);
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}
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mca += IXGB_ETH_LENGTH_OF_ADDRESS + pad;
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}
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DEBUGOUT("MC Update Complete\n");
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pr_debug("MC Update Complete\n");
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return;
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}
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@ -520,7 +501,7 @@ ixgb_hash_mc_addr(struct ixgb_hw *hw,
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{
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u32 hash_value = 0;
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DEBUGFUNC("ixgb_hash_mc_addr");
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ENTER();
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/* The portion of the address that is used for the hash table is
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* determined by the mc_filter_type setting.
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@ -547,7 +528,7 @@ ixgb_hash_mc_addr(struct ixgb_hw *hw,
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break;
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default:
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/* Invalid mc_filter_type, what should we do? */
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DEBUGOUT("MC filter type param set incorrectly\n");
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pr_debug("MC filter type param set incorrectly\n");
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ASSERT(0);
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break;
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}
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@ -603,7 +584,7 @@ ixgb_rar_set(struct ixgb_hw *hw,
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{
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u32 rar_low, rar_high;
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DEBUGFUNC("ixgb_rar_set");
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ENTER();
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/* HW expects these in little endian so we reverse the byte order
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* from network order (big endian) to little endian
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@ -666,7 +647,7 @@ ixgb_setup_fc(struct ixgb_hw *hw)
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u32 pap_reg = 0; /* by default, assume no pause time */
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bool status = true;
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DEBUGFUNC("ixgb_setup_fc");
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ENTER();
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/* Get the current control reg 0 settings */
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ctrl_reg = IXGB_READ_REG(hw, CTRL0);
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@ -710,7 +691,7 @@ ixgb_setup_fc(struct ixgb_hw *hw)
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break;
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default:
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/* We should never get here. The value should be 0-3. */
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DEBUGOUT("Flow control param set incorrectly\n");
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pr_debug("Flow control param set incorrectly\n");
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ASSERT(0);
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break;
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}
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@ -940,7 +921,7 @@ ixgb_check_for_link(struct ixgb_hw *hw)
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u32 status_reg;
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u32 xpcss_reg;
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DEBUGFUNC("ixgb_check_for_link");
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ENTER();
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xpcss_reg = IXGB_READ_REG(hw, XPCSS);
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status_reg = IXGB_READ_REG(hw, STATUS);
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@ -950,7 +931,7 @@ ixgb_check_for_link(struct ixgb_hw *hw)
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hw->link_up = true;
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} else if (!(xpcss_reg & IXGB_XPCSS_ALIGN_STATUS) &&
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(status_reg & IXGB_STATUS_LU)) {
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DEBUGOUT("XPCSS Not Aligned while Status:LU is set.\n");
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pr_debug("XPCSS Not Aligned while Status:LU is set\n");
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hw->link_up = ixgb_link_reset(hw);
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} else {
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/*
|
||||
@ -981,8 +962,7 @@ bool ixgb_check_for_bad_link(struct ixgb_hw *hw)
|
||||
newRFC = IXGB_READ_REG(hw, RFC);
|
||||
if ((hw->lastLFC + 250 < newLFC)
|
||||
|| (hw->lastRFC + 250 < newRFC)) {
|
||||
DEBUGOUT
|
||||
("BAD LINK! too many LFC/RFC since last check\n");
|
||||
pr_debug("BAD LINK! too many LFC/RFC since last check\n");
|
||||
bad_link_returncode = true;
|
||||
}
|
||||
hw->lastLFC = newLFC;
|
||||
@ -1002,11 +982,11 @@ ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
|
||||
{
|
||||
volatile u32 temp_reg;
|
||||
|
||||
DEBUGFUNC("ixgb_clear_hw_cntrs");
|
||||
ENTER();
|
||||
|
||||
/* if we are stopped or resetting exit gracefully */
|
||||
if (hw->adapter_stopped) {
|
||||
DEBUGOUT("Exiting because the adapter is stopped!!!\n");
|
||||
pr_debug("Exiting because the adapter is stopped!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1156,26 +1136,21 @@ static bool
|
||||
mac_addr_valid(u8 *mac_addr)
|
||||
{
|
||||
bool is_valid = true;
|
||||
DEBUGFUNC("mac_addr_valid");
|
||||
ENTER();
|
||||
|
||||
/* Make sure it is not a multicast address */
|
||||
if (IS_MULTICAST(mac_addr)) {
|
||||
DEBUGOUT("MAC address is multicast\n");
|
||||
if (is_multicast_ether_addr(mac_addr)) {
|
||||
pr_debug("MAC address is multicast\n");
|
||||
is_valid = false;
|
||||
}
|
||||
/* Not a broadcast address */
|
||||
else if (IS_BROADCAST(mac_addr)) {
|
||||
DEBUGOUT("MAC address is broadcast\n");
|
||||
else if (is_broadcast_ether_addr(mac_addr)) {
|
||||
pr_debug("MAC address is broadcast\n");
|
||||
is_valid = false;
|
||||
}
|
||||
/* Reject the zero address */
|
||||
else if (mac_addr[0] == 0 &&
|
||||
mac_addr[1] == 0 &&
|
||||
mac_addr[2] == 0 &&
|
||||
mac_addr[3] == 0 &&
|
||||
mac_addr[4] == 0 &&
|
||||
mac_addr[5] == 0) {
|
||||
DEBUGOUT("MAC address is all zeros\n");
|
||||
else if (is_zero_ether_addr(mac_addr)) {
|
||||
pr_debug("MAC address is all zeros\n");
|
||||
is_valid = false;
|
||||
}
|
||||
return (is_valid);
|
||||
|
||||
@ -636,18 +636,6 @@ struct ixgb_flash_buffer {
|
||||
u8 filler3[0xAAAA];
|
||||
};
|
||||
|
||||
/*
|
||||
* This is a little-endian specific check.
|
||||
*/
|
||||
#define IS_MULTICAST(Address) \
|
||||
(bool)(((u8 *)(Address))[0] & ((u8)0x01))
|
||||
|
||||
/*
|
||||
* Check whether an address is broadcast.
|
||||
*/
|
||||
#define IS_BROADCAST(Address) \
|
||||
((((u8 *)(Address))[0] == ((u8)0xff)) && (((u8 *)(Address))[1] == ((u8)0xff)))
|
||||
|
||||
/* Flow control parameters */
|
||||
struct ixgb_fc {
|
||||
u32 high_water; /* Flow Control High-water */
|
||||
|
||||
@ -26,6 +26,8 @@
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include "ixgb.h"
|
||||
|
||||
char ixgb_driver_name[] = "ixgb";
|
||||
@ -146,10 +148,8 @@ MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
|
||||
static int __init
|
||||
ixgb_init_module(void)
|
||||
{
|
||||
printk(KERN_INFO "%s - version %s\n",
|
||||
ixgb_driver_string, ixgb_driver_version);
|
||||
|
||||
printk(KERN_INFO "%s\n", ixgb_copyright);
|
||||
pr_info("%s - version %s\n", ixgb_driver_string, ixgb_driver_version);
|
||||
pr_info("%s\n", ixgb_copyright);
|
||||
|
||||
return pci_register_driver(&ixgb_driver);
|
||||
}
|
||||
@ -374,8 +374,7 @@ ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
} else {
|
||||
if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) ||
|
||||
(err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))) {
|
||||
printk(KERN_ERR
|
||||
"ixgb: No usable DMA configuration, aborting\n");
|
||||
pr_err("No usable DMA configuration, aborting\n");
|
||||
goto err_dma_mask;
|
||||
}
|
||||
pci_using_dac = 0;
|
||||
@ -1118,15 +1117,14 @@ ixgb_watchdog(unsigned long data)
|
||||
|
||||
if (adapter->hw.link_up) {
|
||||
if (!netif_carrier_ok(netdev)) {
|
||||
printk(KERN_INFO "ixgb: %s NIC Link is Up 10 Gbps "
|
||||
"Full Duplex, Flow Control: %s\n",
|
||||
netdev->name,
|
||||
(adapter->hw.fc.type == ixgb_fc_full) ?
|
||||
"RX/TX" :
|
||||
((adapter->hw.fc.type == ixgb_fc_rx_pause) ?
|
||||
"RX" :
|
||||
((adapter->hw.fc.type == ixgb_fc_tx_pause) ?
|
||||
"TX" : "None")));
|
||||
netdev_info(netdev,
|
||||
"NIC Link is Up 10 Gbps Full Duplex, Flow Control: %s\n",
|
||||
(adapter->hw.fc.type == ixgb_fc_full) ?
|
||||
"RX/TX" :
|
||||
(adapter->hw.fc.type == ixgb_fc_rx_pause) ?
|
||||
"RX" :
|
||||
(adapter->hw.fc.type == ixgb_fc_tx_pause) ?
|
||||
"TX" : "None");
|
||||
adapter->link_speed = 10000;
|
||||
adapter->link_duplex = FULL_DUPLEX;
|
||||
netif_carrier_on(netdev);
|
||||
@ -1135,8 +1133,7 @@ ixgb_watchdog(unsigned long data)
|
||||
if (netif_carrier_ok(netdev)) {
|
||||
adapter->link_speed = 0;
|
||||
adapter->link_duplex = 0;
|
||||
printk(KERN_INFO "ixgb: %s NIC Link is Down\n",
|
||||
netdev->name);
|
||||
netdev_info(netdev, "NIC Link is Down\n");
|
||||
netif_carrier_off(netdev);
|
||||
}
|
||||
}
|
||||
@ -2322,7 +2319,7 @@ static void ixgb_io_resume(struct pci_dev *pdev)
|
||||
|
||||
if (netif_running(netdev)) {
|
||||
if (ixgb_up(adapter)) {
|
||||
printk ("ixgb: can't bring device back up after reset\n");
|
||||
pr_err("can't bring device back up after reset\n");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
@ -41,20 +41,8 @@
|
||||
|
||||
#undef ASSERT
|
||||
#define ASSERT(x) BUG_ON(!(x))
|
||||
#define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B)
|
||||
|
||||
#ifdef DBG
|
||||
#define DEBUGOUT(S) printk(KERN_DEBUG S "\n")
|
||||
#define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A)
|
||||
#else
|
||||
#define DEBUGOUT(S)
|
||||
#define DEBUGOUT1(S, A...)
|
||||
#endif
|
||||
|
||||
#define DEBUGFUNC(F) DEBUGOUT(F)
|
||||
#define DEBUGOUT2 DEBUGOUT1
|
||||
#define DEBUGOUT3 DEBUGOUT2
|
||||
#define DEBUGOUT7 DEBUGOUT3
|
||||
#define ENTER() pr_debug("%s\n", __func__);
|
||||
|
||||
#define IXGB_WRITE_REG(a, reg, value) ( \
|
||||
writel((value), ((a)->hw_addr + IXGB_##reg)))
|
||||
|
||||
@ -26,6 +26,8 @@
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include "ixgb.h"
|
||||
|
||||
/* This is the only thing that needs to be changed to adjust the
|
||||
@ -209,16 +211,16 @@ ixgb_validate_option(unsigned int *value, const struct ixgb_option *opt)
|
||||
case enable_option:
|
||||
switch (*value) {
|
||||
case OPTION_ENABLED:
|
||||
printk(KERN_INFO "%s Enabled\n", opt->name);
|
||||
pr_info("%s Enabled\n", opt->name);
|
||||
return 0;
|
||||
case OPTION_DISABLED:
|
||||
printk(KERN_INFO "%s Disabled\n", opt->name);
|
||||
pr_info("%s Disabled\n", opt->name);
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
case range_option:
|
||||
if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
|
||||
printk(KERN_INFO "%s set to %i\n", opt->name, *value);
|
||||
pr_info("%s set to %i\n", opt->name, *value);
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
@ -230,7 +232,7 @@ ixgb_validate_option(unsigned int *value, const struct ixgb_option *opt)
|
||||
ent = &opt->arg.l.p[i];
|
||||
if (*value == ent->i) {
|
||||
if (ent->str[0] != '\0')
|
||||
printk(KERN_INFO "%s\n", ent->str);
|
||||
pr_info("%s\n", ent->str);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -240,8 +242,7 @@ ixgb_validate_option(unsigned int *value, const struct ixgb_option *opt)
|
||||
BUG();
|
||||
}
|
||||
|
||||
printk(KERN_INFO "Invalid %s specified (%i) %s\n",
|
||||
opt->name, *value, opt->err);
|
||||
pr_info("Invalid %s specified (%i) %s\n", opt->name, *value, opt->err);
|
||||
*value = opt->def;
|
||||
return -1;
|
||||
}
|
||||
@ -261,9 +262,8 @@ ixgb_check_options(struct ixgb_adapter *adapter)
|
||||
{
|
||||
int bd = adapter->bd_number;
|
||||
if (bd >= IXGB_MAX_NIC) {
|
||||
printk(KERN_NOTICE
|
||||
"Warning: no configuration for board #%i\n", bd);
|
||||
printk(KERN_NOTICE "Using defaults for all values\n");
|
||||
pr_notice("Warning: no configuration for board #%i\n", bd);
|
||||
pr_notice("Using defaults for all values\n");
|
||||
}
|
||||
|
||||
{ /* Transmit Descriptor Count */
|
||||
@ -363,8 +363,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
|
||||
adapter->hw.fc.high_water = opt.def;
|
||||
}
|
||||
if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) )
|
||||
printk(KERN_INFO
|
||||
"Ignoring RxFCHighThresh when no RxFC\n");
|
||||
pr_info("Ignoring RxFCHighThresh when no RxFC\n");
|
||||
}
|
||||
{ /* Receive Flow Control Low Threshold */
|
||||
const struct ixgb_option opt = {
|
||||
@ -383,8 +382,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
|
||||
adapter->hw.fc.low_water = opt.def;
|
||||
}
|
||||
if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) )
|
||||
printk(KERN_INFO
|
||||
"Ignoring RxFCLowThresh when no RxFC\n");
|
||||
pr_info("Ignoring RxFCLowThresh when no RxFC\n");
|
||||
}
|
||||
{ /* Flow Control Pause Time Request*/
|
||||
const struct ixgb_option opt = {
|
||||
@ -404,17 +402,14 @@ ixgb_check_options(struct ixgb_adapter *adapter)
|
||||
adapter->hw.fc.pause_time = opt.def;
|
||||
}
|
||||
if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) )
|
||||
printk(KERN_INFO
|
||||
"Ignoring FCReqTimeout when no RxFC\n");
|
||||
pr_info("Ignoring FCReqTimeout when no RxFC\n");
|
||||
}
|
||||
/* high low and spacing check for rx flow control thresholds */
|
||||
if (adapter->hw.fc.type & ixgb_fc_tx_pause) {
|
||||
/* high must be greater than low */
|
||||
if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) {
|
||||
/* set defaults */
|
||||
printk(KERN_INFO
|
||||
"RxFCHighThresh must be >= (RxFCLowThresh + 8), "
|
||||
"Using Defaults\n");
|
||||
pr_info("RxFCHighThresh must be >= (RxFCLowThresh + 8), Using Defaults\n");
|
||||
adapter->hw.fc.high_water = DEFAULT_FCRTH;
|
||||
adapter->hw.fc.low_water = DEFAULT_FCRTL;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user