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drm/radeon: atombios hw i2c fixes
These fixes make writes work properly. Previously only reads worked. Note that this feature is off by default. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -32,7 +32,7 @@ extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
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#define TARGET_HW_I2C_CLOCK 50
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/* these are a limitation of ProcessI2cChannelTransaction not the hw */
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#define ATOM_MAX_HW_I2C_WRITE 2
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#define ATOM_MAX_HW_I2C_WRITE 3
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#define ATOM_MAX_HW_I2C_READ 255
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static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
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@ -52,20 +52,24 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
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if (flags & HW_I2C_WRITE) {
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if (num > ATOM_MAX_HW_I2C_WRITE) {
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DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num);
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DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
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return -EINVAL;
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}
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memcpy(&out, buf, num);
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args.ucRegIndex = buf[0];
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if (num > 1)
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memcpy(&out, &buf[1], num - 1);
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args.lpI2CDataOut = cpu_to_le16(out);
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} else {
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if (num > ATOM_MAX_HW_I2C_READ) {
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DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
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return -EINVAL;
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}
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args.ucRegIndex = 0;
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args.lpI2CDataOut = 0;
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}
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args.ucFlag = flags;
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args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
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args.ucRegIndex = 0;
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args.ucTransBytes = num;
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args.ucSlaveAddr = slave_addr << 1;
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args.ucLineNumber = chan->rec.i2c_id;
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