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spi: Add SuperH HSPI prototype driver
This patch adds SuperH HSPI driver. It is still prototype driver, but has enough function at this point. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Kuninori Morimoto
Grant Likely
parent
ffbbdd2132
commit
d1c8bbd793
@ -330,6 +330,12 @@ config SPI_SH_SCI
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help
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SPI driver for SuperH SCI blocks.
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config SPI_SH_HSPI
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tristate "SuperH HSPI controller"
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depends on ARCH_SHMOBILE
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help
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SPI driver for SuperH HSPI blocks.
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config SPI_STMP3XXX
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tristate "Freescale STMP37xx/378x SPI/SSP controller"
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depends on ARCH_STMP3XXX && SPI_MASTER
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@ -50,6 +50,7 @@ spi-s3c24xx-hw-y := spi-s3c24xx.o
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spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
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obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o
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obj-$(CONFIG_SPI_SH) += spi-sh.o
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obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
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obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
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obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
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obj-$(CONFIG_SPI_STMP3XXX) += spi-stmp.o
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364
drivers/spi/spi-sh-hspi.c
Normal file
364
drivers/spi/spi-sh-hspi.c
Normal file
@ -0,0 +1,364 @@
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/*
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* SuperH HSPI bus driver
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*
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* Copyright (C) 2011 Kuninori Morimoto
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*
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* Based on spi-sh.c:
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* Based on pxa2xx_spi.c:
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/timer.h>
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#include <linux/delay.h>
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#include <linux/list.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/io.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/sh_hspi.h>
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#define SPCR 0x00
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#define SPSR 0x04
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#define SPSCR 0x08
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#define SPTBR 0x0C
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#define SPRBR 0x10
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#define SPCR2 0x14
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/* SPSR */
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#define RXFL (1 << 2)
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#define hspi2info(h) (h->dev->platform_data)
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struct hspi_priv {
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void __iomem *addr;
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struct spi_master *master;
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struct list_head queue;
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struct workqueue_struct *workqueue;
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struct work_struct ws;
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struct device *dev;
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spinlock_t lock;
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};
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/*
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* basic function
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*/
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static void hspi_write(struct hspi_priv *hspi, int reg, u32 val)
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{
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iowrite32(val, hspi->addr + reg);
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}
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static u32 hspi_read(struct hspi_priv *hspi, int reg)
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{
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return ioread32(hspi->addr + reg);
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}
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/*
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* transfer function
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*/
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static int hspi_status_check_timeout(struct hspi_priv *hspi, u32 mask, u32 val)
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{
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int t = 256;
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while (t--) {
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if ((mask & hspi_read(hspi, SPSR)) == val)
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return 0;
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msleep(20);
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}
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dev_err(hspi->dev, "timeout\n");
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return -ETIMEDOUT;
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}
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static int hspi_push(struct hspi_priv *hspi, struct spi_message *msg,
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struct spi_transfer *t)
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{
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int i, ret;
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u8 *data = (u8 *)t->tx_buf;
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/*
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* FIXME
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* very simple, but polling transfer
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*/
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for (i = 0; i < t->len; i++) {
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/* wait remains */
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ret = hspi_status_check_timeout(hspi, 0x1, 0x0);
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if (ret < 0)
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return ret;
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hspi_write(hspi, SPTBR, (u32)data[i]);
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/* wait recive */
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ret = hspi_status_check_timeout(hspi, 0x4, 0x4);
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if (ret < 0)
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return ret;
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/* dummy read */
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hspi_read(hspi, SPRBR);
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}
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return 0;
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}
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static int hspi_pop(struct hspi_priv *hspi, struct spi_message *msg,
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struct spi_transfer *t)
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{
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int i, ret;
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u8 *data = (u8 *)t->rx_buf;
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/*
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* FIXME
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* very simple, but polling receive
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*/
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for (i = 0; i < t->len; i++) {
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/* wait remains */
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ret = hspi_status_check_timeout(hspi, 0x1, 0);
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if (ret < 0)
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return ret;
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/* dummy write */
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hspi_write(hspi, SPTBR, 0x0);
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/* wait recive */
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ret = hspi_status_check_timeout(hspi, 0x4, 0x4);
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if (ret < 0)
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return ret;
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data[i] = (u8)hspi_read(hspi, SPRBR);
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}
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return 0;
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}
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static void hspi_work(struct work_struct *work)
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{
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struct hspi_priv *hspi = container_of(work, struct hspi_priv, ws);
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struct sh_hspi_info *info = hspi2info(hspi);
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struct spi_message *msg;
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struct spi_transfer *t;
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unsigned long flags;
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u32 data;
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int ret;
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dev_dbg(hspi->dev, "%s\n", __func__);
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/************************ pm enable ************************/
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pm_runtime_get_sync(hspi->dev);
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/* setup first of all in under pm_runtime */
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data = SH_HSPI_CLK_DIVC(info->flags);
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if (info->flags & SH_HSPI_FBS)
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data |= 1 << 7;
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if (info->flags & SH_HSPI_CLKP_HIGH)
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data |= 1 << 6;
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if (info->flags & SH_HSPI_IDIV_DIV128)
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data |= 1 << 5;
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hspi_write(hspi, SPCR, data);
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hspi_write(hspi, SPSR, 0x0);
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hspi_write(hspi, SPSCR, 0x1); /* master mode */
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while (1) {
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msg = NULL;
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/************************ spin lock ************************/
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spin_lock_irqsave(&hspi->lock, flags);
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if (!list_empty(&hspi->queue)) {
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msg = list_entry(hspi->queue.next,
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struct spi_message, queue);
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list_del_init(&msg->queue);
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}
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spin_unlock_irqrestore(&hspi->lock, flags);
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/************************ spin unlock ************************/
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if (!msg)
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break;
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ret = 0;
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list_for_each_entry(t, &msg->transfers, transfer_list) {
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if (t->tx_buf) {
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ret = hspi_push(hspi, msg, t);
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if (ret < 0)
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goto error;
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}
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if (t->rx_buf) {
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ret = hspi_pop(hspi, msg, t);
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if (ret < 0)
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goto error;
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}
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msg->actual_length += t->len;
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}
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error:
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msg->status = ret;
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msg->complete(msg->context);
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}
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pm_runtime_put_sync(hspi->dev);
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/************************ pm disable ************************/
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return;
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}
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/*
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* spi master function
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*/
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static int hspi_setup(struct spi_device *spi)
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{
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struct hspi_priv *hspi = spi_master_get_devdata(spi->master);
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struct device *dev = hspi->dev;
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if (8 != spi->bits_per_word) {
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dev_err(dev, "bits_per_word should be 8\n");
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return -EIO;
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}
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dev_dbg(dev, "%s setup\n", spi->modalias);
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return 0;
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}
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static void hspi_cleanup(struct spi_device *spi)
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{
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struct hspi_priv *hspi = spi_master_get_devdata(spi->master);
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struct device *dev = hspi->dev;
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dev_dbg(dev, "%s cleanup\n", spi->modalias);
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}
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static int hspi_transfer(struct spi_device *spi, struct spi_message *msg)
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{
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struct hspi_priv *hspi = spi_master_get_devdata(spi->master);
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unsigned long flags;
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/************************ spin lock ************************/
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spin_lock_irqsave(&hspi->lock, flags);
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msg->actual_length = 0;
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msg->status = -EINPROGRESS;
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list_add_tail(&msg->queue, &hspi->queue);
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spin_unlock_irqrestore(&hspi->lock, flags);
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/************************ spin unlock ************************/
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queue_work(hspi->workqueue, &hspi->ws);
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return 0;
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}
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static int __devinit hspi_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct spi_master *master;
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struct hspi_priv *hspi;
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int ret;
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/* get base addr */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "invalid resource\n");
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return -EINVAL;
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}
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master = spi_alloc_master(&pdev->dev, sizeof(*hspi));
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if (!master) {
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dev_err(&pdev->dev, "spi_alloc_master error.\n");
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return -ENOMEM;
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}
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hspi = spi_master_get_devdata(master);
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dev_set_drvdata(&pdev->dev, hspi);
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/* init hspi */
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hspi->master = master;
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hspi->dev = &pdev->dev;
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hspi->addr = devm_ioremap(hspi->dev,
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res->start, resource_size(res));
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if (!hspi->addr) {
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dev_err(&pdev->dev, "ioremap error.\n");
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ret = -ENOMEM;
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goto error1;
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}
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hspi->workqueue = create_singlethread_workqueue(dev_name(&pdev->dev));
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if (!hspi->workqueue) {
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dev_err(&pdev->dev, "create workqueue error\n");
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ret = -EBUSY;
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goto error2;
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}
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spin_lock_init(&hspi->lock);
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INIT_LIST_HEAD(&hspi->queue);
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INIT_WORK(&hspi->ws, hspi_work);
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master->num_chipselect = 1;
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master->bus_num = pdev->id;
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master->setup = hspi_setup;
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master->transfer = hspi_transfer;
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master->cleanup = hspi_cleanup;
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master->mode_bits = SPI_CPOL | SPI_CPHA;
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ret = spi_register_master(master);
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if (ret < 0) {
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dev_err(&pdev->dev, "spi_register_master error.\n");
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goto error3;
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}
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pm_runtime_enable(&pdev->dev);
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dev_info(&pdev->dev, "probed\n");
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return 0;
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error3:
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destroy_workqueue(hspi->workqueue);
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error2:
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devm_iounmap(hspi->dev, hspi->addr);
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error1:
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spi_master_put(master);
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return ret;
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}
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static int __devexit hspi_remove(struct platform_device *pdev)
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{
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struct hspi_priv *hspi = dev_get_drvdata(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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spi_unregister_master(hspi->master);
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destroy_workqueue(hspi->workqueue);
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devm_iounmap(hspi->dev, hspi->addr);
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return 0;
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}
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static struct platform_driver hspi_driver = {
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.probe = hspi_probe,
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.remove = __devexit_p(hspi_remove),
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.driver = {
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.name = "sh-hspi",
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.owner = THIS_MODULE,
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},
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};
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module_platform_driver(hspi_driver);
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MODULE_DESCRIPTION("SuperH HSPI bus driver");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
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MODULE_ALIAS("platform:sh_spi");
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34
include/linux/spi/sh_hspi.h
Normal file
34
include/linux/spi/sh_hspi.h
Normal file
@ -0,0 +1,34 @@
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/*
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* Copyright (C) 2011 Kuninori Morimoto
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SH_HSPI_H
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#define SH_HSPI_H
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/*
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* flags
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*
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*
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*/
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#define SH_HSPI_CLK_DIVC(d) (d & 0xFF)
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#define SH_HSPI_FBS (1 << 8)
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#define SH_HSPI_CLKP_HIGH (1 << 9) /* default LOW */
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#define SH_HSPI_IDIV_DIV128 (1 << 10) /* default div16 */
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struct sh_hspi_info {
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u32 flags;
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};
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#endif
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