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Merge branch 'remotes/lorenzo/pci/tegra'
- Use DMA-API to get tegra MSI address to prevent device DMA from generating unwanted MSIs (Vidya Sagar) * remotes/lorenzo/pci/tegra: PCI: tegra: Use the DMA-API to get the MSI address
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commit
cdf4315502
@ -231,9 +231,9 @@ struct tegra_msi {
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struct msi_controller chip;
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DECLARE_BITMAP(used, INT_PCI_MSI_NR);
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struct irq_domain *domain;
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unsigned long pages;
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struct mutex lock;
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u64 phys;
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void *virt;
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dma_addr_t phys;
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int irq;
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};
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@ -1536,7 +1536,7 @@ static int tegra_pcie_msi_setup(struct tegra_pcie *pcie)
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err = platform_get_irq_byname(pdev, "msi");
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if (err < 0) {
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dev_err(dev, "failed to get IRQ: %d\n", err);
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goto err;
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goto free_irq_domain;
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}
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msi->irq = err;
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@ -1545,17 +1545,35 @@ static int tegra_pcie_msi_setup(struct tegra_pcie *pcie)
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tegra_msi_irq_chip.name, pcie);
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if (err < 0) {
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dev_err(dev, "failed to request IRQ: %d\n", err);
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goto err;
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goto free_irq_domain;
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}
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/* Though the PCIe controller can address >32-bit address space, to
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* facilitate endpoints that support only 32-bit MSI target address,
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* the mask is set to 32-bit to make sure that MSI target address is
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* always a 32-bit address
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*/
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err = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
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if (err < 0) {
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dev_err(dev, "failed to set DMA coherent mask: %d\n", err);
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goto free_irq;
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}
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msi->virt = dma_alloc_attrs(dev, PAGE_SIZE, &msi->phys, GFP_KERNEL,
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DMA_ATTR_NO_KERNEL_MAPPING);
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if (!msi->virt) {
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dev_err(dev, "failed to allocate DMA memory for MSI\n");
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err = -ENOMEM;
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goto free_irq;
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}
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/* setup AFI/FPCI range */
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msi->pages = __get_free_pages(GFP_KERNEL, 0);
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msi->phys = virt_to_phys((void *)msi->pages);
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host->msi = &msi->chip;
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return 0;
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err:
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free_irq:
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free_irq(msi->irq, pcie);
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free_irq_domain:
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irq_domain_remove(msi->domain);
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return err;
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}
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@ -1592,7 +1610,8 @@ static void tegra_pcie_msi_teardown(struct tegra_pcie *pcie)
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struct tegra_msi *msi = &pcie->msi;
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unsigned int i, irq;
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free_pages(msi->pages, 0);
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dma_free_attrs(pcie->dev, PAGE_SIZE, msi->virt, msi->phys,
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DMA_ATTR_NO_KERNEL_MAPPING);
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if (msi->irq > 0)
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free_irq(msi->irq, pcie);
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