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net/irda: convert au1k_ir to platform driver.
Moderate driver cleanup: convert to platform driver, get rid of board-specific code. Driver loads and runs on a DB1100 board. But since I have no other IrDA hardware to exchange data with I can't say whether it really sends and receives. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Samuel Ortiz <samuel@sortiz.org> Cc: netdev@vger.kernel.org To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2877/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
4d2216afee
commit
cd671c16f0
@ -1265,44 +1265,20 @@ enum soc_au1200_ints {
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#define SSI_ENABLE_CD (1 << 1)
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#define SSI_ENABLE_E (1 << 0)
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/* IrDA Controller */
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#define IRDA_BASE 0xB0300000
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#define IR_RING_PTR_STATUS (IRDA_BASE + 0x00)
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#define IR_RING_BASE_ADDR_H (IRDA_BASE + 0x04)
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#define IR_RING_BASE_ADDR_L (IRDA_BASE + 0x08)
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#define IR_RING_SIZE (IRDA_BASE + 0x0C)
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#define IR_RING_PROMPT (IRDA_BASE + 0x10)
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#define IR_RING_ADDR_CMPR (IRDA_BASE + 0x14)
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#define IR_INT_CLEAR (IRDA_BASE + 0x18)
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#define IR_CONFIG_1 (IRDA_BASE + 0x20)
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# define IR_RX_INVERT_LED (1 << 0)
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# define IR_TX_INVERT_LED (1 << 1)
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# define IR_ST (1 << 2)
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# define IR_SF (1 << 3)
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# define IR_SIR (1 << 4)
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# define IR_MIR (1 << 5)
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# define IR_FIR (1 << 6)
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# define IR_16CRC (1 << 7)
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# define IR_TD (1 << 8)
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# define IR_RX_ALL (1 << 9)
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# define IR_DMA_ENABLE (1 << 10)
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# define IR_RX_ENABLE (1 << 11)
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# define IR_TX_ENABLE (1 << 12)
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# define IR_LOOPBACK (1 << 14)
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# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \
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IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
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#define IR_SIR_FLAGS (IRDA_BASE + 0x24)
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#define IR_ENABLE (IRDA_BASE + 0x28)
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# define IR_RX_STATUS (1 << 9)
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# define IR_TX_STATUS (1 << 10)
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#define IR_READ_PHY_CONFIG (IRDA_BASE + 0x2C)
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#define IR_WRITE_PHY_CONFIG (IRDA_BASE + 0x30)
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#define IR_MAX_PKT_LEN (IRDA_BASE + 0x34)
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#define IR_RX_BYTE_CNT (IRDA_BASE + 0x38)
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#define IR_CONFIG_2 (IRDA_BASE + 0x3C)
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# define IR_MODE_INV (1 << 0)
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# define IR_ONE_PIN (1 << 1)
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#define IR_INTERFACE_CONFIG (IRDA_BASE + 0x40)
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/*
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* The IrDA peripheral has an IRFIRSEL pin, but on the DB/PB boards it's not
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* used to select FIR/SIR mode on the transceiver but as a GPIO. Instead a
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* CPLD has to be told about the mode.
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*/
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#define AU1000_IRDA_PHY_MODE_OFF 0
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#define AU1000_IRDA_PHY_MODE_SIR 1
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#define AU1000_IRDA_PHY_MODE_FIR 2
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struct au1k_irda_platform_data {
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void(*set_phy_mode)(int mode);
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};
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/* GPIO */
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#define SYS_PINFUNC 0xB190002C
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@ -313,8 +313,12 @@ config TOSHIBA_FIR
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donauboe.
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config AU1000_FIR
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tristate "Alchemy Au1000 SIR/FIR"
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tristate "Alchemy IrDA SIR/FIR"
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depends on IRDA && MIPS_ALCHEMY
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help
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Say Y/M here to build suppor the the IrDA peripheral on the
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Alchemy Au1000 and Au1100 SoCs.
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Say M to build a module; it will be called au1k_ir.ko
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config SMC_IRCC_FIR
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tristate "SMSC IrCC (EXPERIMENTAL)"
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@ -1,125 +0,0 @@
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/*
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*
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* BRIEF MODULE DESCRIPTION
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* Au1000 IrDA driver.
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef AU1000_IRCC_H
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#define AU1000_IRCC_H
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#include <linux/time.h>
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#include <linux/spinlock.h>
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#include <linux/pm.h>
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#include <asm/io.h>
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#define NUM_IR_IFF 1
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#define NUM_IR_DESC 64
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#define RING_SIZE_4 0x0
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#define RING_SIZE_16 0x3
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#define RING_SIZE_64 0xF
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#define MAX_NUM_IR_DESC 64
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#define MAX_BUF_SIZE 2048
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#define BPS_115200 0
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#define BPS_57600 1
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#define BPS_38400 2
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#define BPS_19200 5
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#define BPS_9600 11
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#define BPS_2400 47
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/* Ring descriptor flags */
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#define AU_OWN (1<<7) /* tx,rx */
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#define IR_DIS_CRC (1<<6) /* tx */
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#define IR_BAD_CRC (1<<5) /* tx */
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#define IR_NEED_PULSE (1<<4) /* tx */
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#define IR_FORCE_UNDER (1<<3) /* tx */
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#define IR_DISABLE_TX (1<<2) /* tx */
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#define IR_HW_UNDER (1<<0) /* tx */
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#define IR_TX_ERROR (IR_DIS_CRC|IR_BAD_CRC|IR_HW_UNDER)
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#define IR_PHY_ERROR (1<<6) /* rx */
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#define IR_CRC_ERROR (1<<5) /* rx */
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#define IR_MAX_LEN (1<<4) /* rx */
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#define IR_FIFO_OVER (1<<3) /* rx */
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#define IR_SIR_ERROR (1<<2) /* rx */
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#define IR_RX_ERROR (IR_PHY_ERROR|IR_CRC_ERROR| \
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IR_MAX_LEN|IR_FIFO_OVER|IR_SIR_ERROR)
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typedef struct db_dest {
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struct db_dest *pnext;
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volatile u32 *vaddr;
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dma_addr_t dma_addr;
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} db_dest_t;
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typedef struct ring_desc {
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u8 count_0; /* 7:0 */
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u8 count_1; /* 12:8 */
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u8 reserved;
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u8 flags;
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u8 addr_0; /* 7:0 */
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u8 addr_1; /* 15:8 */
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u8 addr_2; /* 23:16 */
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u8 addr_3; /* 31:24 */
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} ring_dest_t;
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/* Private data for each instance */
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struct au1k_private {
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db_dest_t *pDBfree;
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db_dest_t db[2*NUM_IR_DESC];
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volatile ring_dest_t *rx_ring[NUM_IR_DESC];
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volatile ring_dest_t *tx_ring[NUM_IR_DESC];
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db_dest_t *rx_db_inuse[NUM_IR_DESC];
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db_dest_t *tx_db_inuse[NUM_IR_DESC];
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u32 rx_head;
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u32 tx_head;
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u32 tx_tail;
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u32 tx_full;
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iobuff_t rx_buff;
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struct net_device *netdev;
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struct timeval stamp;
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struct timeval now;
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struct qos_info qos;
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struct irlap_cb *irlap;
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u8 open;
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u32 speed;
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u32 newspeed;
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u32 intr_work_done; /* number of Rx and Tx pkts processed in the isr */
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struct timer_list timer;
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spinlock_t lock; /* For serializing operations */
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};
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#endif /* AU1000_IRCC_H */
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