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drm/i915: consolidate pch pll computations a bit

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We need the dpll/fp/fp2 values only when we need a pch pll. So move
them together with the code to acquire such a pll.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2013-04-19 11:14:31 +02:00
parent d49f70915c
commit cbbab5bdea
1 changed files with 10 additions and 9 deletions
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19
drivers/gpu/drm/i915/intel_display.c
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@ -5704,7 +5704,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
int plane = intel_crtc->plane;
int num_connectors = 0;
intel_clock_t clock, reduced_clock;
u32 dpll, fp = 0, fp2 = 0;
u32 dpll = 0, fp = 0, fp2 = 0;
bool ok, has_reduced_clock = false;
bool is_lvds = false;
struct intel_encoder *encoder;
@ -5749,14 +5749,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
if (is_lvds && dev_priv->lvds_dither)
dither = true;
fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
if (has_reduced_clock)
fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
reduced_clock.m2;
dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
has_reduced_clock ? &fp2 : NULL);
DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
drm_mode_debug_printmodeline(mode);
@ -5764,6 +5756,15 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
if (intel_crtc->config.has_pch_encoder) {
struct intel_pch_pll *pll;
fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
if (has_reduced_clock)
fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
reduced_clock.m2;
dpll = ironlake_compute_dpll(intel_crtc, &clock,
&fp, &reduced_clock,
has_reduced_clock ? &fp2 : NULL);
pll = intel_get_pch_pll(intel_crtc, dpll, fp);
if (pll == NULL) {
DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",