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ASoC: mediatek: mt8195: update mediatek common driver

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Update mediatek common driver to support MT8195

Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20210819084144.18483-2-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Trevor Wu 2021-08-19 16:41:34 +08:00 committed by Mark Brown
parent 6f02c08949
commit cab2b9e5fc
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 27 additions and 5 deletions
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22
sound/soc/mediatek/common/mtk-afe-fe-dai.c
View File

@ -139,7 +139,7 @@ int mtk_afe_fe_hw_params(struct snd_pcm_substream *substream,
substream->runtime->dma_area,
substream->runtime->dma_bytes);
memset_io(substream->runtime->dma_area, 0,
memset_io((void __force __iomem *)substream->runtime->dma_area, 0,
substream->runtime->dma_bytes);
/* set addr */
@ -433,11 +433,20 @@ int mtk_memif_set_addr(struct mtk_base_afe *afe, int id,
phys_buf_addr_upper_32);
}
/* set MSB to 33-bit */
if (memif->data->msb_reg >= 0)
/*
* set MSB to 33-bit, for memif address
* only for memif base address, if msb_end_reg exists
*/
if (memif->data->msb_reg)
mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
1, msb_at_bit33, memif->data->msb_shift);
/* set MSB to 33-bit, for memif end address */
if (memif->data->msb_end_reg)
mtk_regmap_update_bits(afe->regmap, memif->data->msb_end_reg,
1, msb_at_bit33,
memif->data->msb_end_shift);
return 0;
}
EXPORT_SYMBOL_GPL(mtk_memif_set_addr);
@ -464,6 +473,13 @@ int mtk_memif_set_channel(struct mtk_base_afe *afe,
else
mono = (channel == 1) ? 1 : 0;
/* for specific configuration of memif mono mode */
if (memif->data->int_odd_flag_reg)
mtk_regmap_update_bits(afe->regmap,
memif->data->int_odd_flag_reg,
1, mono,
memif->data->int_odd_flag_shift);
return mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
1, mono, memif->data->mono_shift);
}

10
sound/soc/mediatek/common/mtk-base-afe.h
View File

@ -29,6 +29,8 @@ struct mtk_base_memif_data {
int quad_ch_reg;
int quad_ch_mask;
int quad_ch_shift;
int int_odd_flag_reg;
int int_odd_flag_shift;
int enable_reg;
int enable_shift;
int hd_reg;
@ -37,10 +39,13 @@ struct mtk_base_memif_data {
int hd_align_mshift;
int msb_reg;
int msb_shift;
int msb2_reg;
int msb2_shift;
int msb_end_reg;
int msb_end_shift;
int agent_disable_reg;
int agent_disable_shift;
int ch_num_reg;
int ch_num_shift;
int ch_num_maskbit;
/* playback memif only */
int pbuf_reg;
int pbuf_mask;
@ -62,6 +67,7 @@ struct mtk_base_irq_data {
int irq_en_shift;
int irq_clr_reg;
int irq_clr_shift;
int irq_status_shift;
};
struct device;