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iio: adc: Add support for AD7091R5 ADC
AD7091R5 is 4-Channel, I2C, Ultra Low Power,12-Bit ADC. This driver will also support AD7091R2/4/8 in the future. Datasheet: Link: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7091r-5.pdf Signed-off-by: Paul Cercueil <paul.cercueil@analog.com> Co-developed-by: Beniamin Bia <beniamin.bia@analog.com> Signed-off-by: Beniamin Bia <beniamin.bia@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Paul Cercueil
Jonathan Cameron
parent
f339f979bb
commit
ca69300173
@ -32,6 +32,13 @@ config AD7124
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To compile this driver as a module, choose M here: the module will be
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called ad7124.
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config AD7091R5
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tristate "Analog Devices AD7091R5 ADC Driver"
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depends on I2C
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select REGMAP_I2C
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help
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Say yes here to build support for Analog Devices AD7091R-5 ADC.
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config AD7266
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tristate "Analog Devices AD7265/AD7266 ADC driver"
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depends on SPI_MASTER
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@ -7,6 +7,7 @@
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obj-$(CONFIG_AB8500_GPADC) += ab8500-gpadc.o
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obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o
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obj-$(CONFIG_AD7124) += ad7124.o
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obj-$(CONFIG_AD7091R5) += ad7091r5.o ad7091r-base.o
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obj-$(CONFIG_AD7266) += ad7266.o
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obj-$(CONFIG_AD7291) += ad7291.o
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obj-$(CONFIG_AD7292) += ad7292.o
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260
drivers/iio/adc/ad7091r-base.c
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260
drivers/iio/adc/ad7091r-base.c
Normal file
@ -0,0 +1,260 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* AD7091RX Analog to Digital converter driver
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*
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* Copyright 2014-2019 Analog Devices Inc.
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*/
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#include <linux/bitops.h>
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#include <linux/iio/events.h>
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#include <linux/iio/iio.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include "ad7091r-base.h"
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#define AD7091R_REG_RESULT 0
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#define AD7091R_REG_CHANNEL 1
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#define AD7091R_REG_CONF 2
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#define AD7091R_REG_ALERT 3
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#define AD7091R_REG_CH_LOW_LIMIT(ch) ((ch) * 3 + 4)
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#define AD7091R_REG_CH_HIGH_LIMIT(ch) ((ch) * 3 + 5)
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#define AD7091R_REG_CH_HYSTERESIS(ch) ((ch) * 3 + 6)
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/* AD7091R_REG_RESULT */
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#define AD7091R_REG_RESULT_CH_ID(x) (((x) >> 13) & 0x3)
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#define AD7091R_REG_RESULT_CONV_RESULT(x) ((x) & 0xfff)
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/* AD7091R_REG_CONF */
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#define AD7091R_REG_CONF_AUTO BIT(8)
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#define AD7091R_REG_CONF_CMD BIT(10)
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#define AD7091R_REG_CONF_MODE_MASK \
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(AD7091R_REG_CONF_AUTO | AD7091R_REG_CONF_CMD)
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enum ad7091r_mode {
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AD7091R_MODE_SAMPLE,
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AD7091R_MODE_COMMAND,
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AD7091R_MODE_AUTOCYCLE,
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};
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struct ad7091r_state {
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struct device *dev;
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struct regmap *map;
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const struct ad7091r_chip_info *chip_info;
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enum ad7091r_mode mode;
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struct mutex lock; /*lock to prevent concurent reads */
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};
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static int ad7091r_set_mode(struct ad7091r_state *st, enum ad7091r_mode mode)
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{
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int ret, conf;
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switch (mode) {
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case AD7091R_MODE_SAMPLE:
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conf = 0;
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break;
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case AD7091R_MODE_COMMAND:
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conf = AD7091R_REG_CONF_CMD;
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break;
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case AD7091R_MODE_AUTOCYCLE:
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conf = AD7091R_REG_CONF_AUTO;
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break;
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default:
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return -EINVAL;
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}
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ret = regmap_update_bits(st->map, AD7091R_REG_CONF,
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AD7091R_REG_CONF_MODE_MASK, conf);
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if (ret)
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return ret;
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st->mode = mode;
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return 0;
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}
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static int ad7091r_set_channel(struct ad7091r_state *st, unsigned int channel)
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{
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unsigned int dummy;
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int ret;
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/* AD7091R_REG_CHANNEL specified which channels to be converted */
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ret = regmap_write(st->map, AD7091R_REG_CHANNEL,
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BIT(channel) | (BIT(channel) << 8));
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if (ret)
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return ret;
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/*
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* There is a latency of one conversion before the channel conversion
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* sequence is updated
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*/
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return regmap_read(st->map, AD7091R_REG_RESULT, &dummy);
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}
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static int ad7091r_read_one(struct iio_dev *iio_dev,
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unsigned int channel, unsigned int *read_val)
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{
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struct ad7091r_state *st = iio_priv(iio_dev);
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unsigned int val;
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int ret;
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ret = ad7091r_set_channel(st, channel);
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if (ret)
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return ret;
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ret = regmap_read(st->map, AD7091R_REG_RESULT, &val);
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if (ret)
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return ret;
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if (AD7091R_REG_RESULT_CH_ID(val) != channel)
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return -EIO;
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*read_val = AD7091R_REG_RESULT_CONV_RESULT(val);
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return 0;
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}
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static int ad7091r_read_raw(struct iio_dev *iio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long m)
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{
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struct ad7091r_state *st = iio_priv(iio_dev);
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unsigned int read_val;
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int ret;
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mutex_lock(&st->lock);
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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if (st->mode != AD7091R_MODE_COMMAND) {
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ret = -EBUSY;
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goto unlock;
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}
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ret = ad7091r_read_one(iio_dev, chan->channel, &read_val);
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if (ret)
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goto unlock;
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*val = read_val;
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ret = IIO_VAL_INT;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static const struct iio_info ad7091r_info = {
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.read_raw = ad7091r_read_raw,
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};
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static irqreturn_t ad7091r_event_handler(int irq, void *private)
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{
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struct ad7091r_state *st = (struct ad7091r_state *) private;
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struct iio_dev *iio_dev = dev_get_drvdata(st->dev);
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unsigned int i, read_val;
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int ret;
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s64 timestamp = iio_get_time_ns(iio_dev);
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ret = regmap_read(st->map, AD7091R_REG_ALERT, &read_val);
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if (ret)
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return IRQ_HANDLED;
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for (i = 0; i < st->chip_info->num_channels; i++) {
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if (read_val & BIT(i * 2))
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iio_push_event(iio_dev,
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IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i,
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IIO_EV_TYPE_THRESH,
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IIO_EV_DIR_RISING), timestamp);
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if (read_val & BIT(i * 2 + 1))
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iio_push_event(iio_dev,
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IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i,
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IIO_EV_TYPE_THRESH,
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IIO_EV_DIR_FALLING), timestamp);
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}
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return IRQ_HANDLED;
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}
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int ad7091r_probe(struct device *dev, const char *name,
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const struct ad7091r_chip_info *chip_info,
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struct regmap *map, int irq)
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{
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struct iio_dev *iio_dev;
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struct ad7091r_state *st;
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int ret;
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iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
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if (!iio_dev)
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return -ENOMEM;
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st = iio_priv(iio_dev);
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st->dev = dev;
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st->chip_info = chip_info;
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st->map = map;
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iio_dev->dev.parent = dev;
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iio_dev->name = name;
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iio_dev->info = &ad7091r_info;
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iio_dev->modes = INDIO_DIRECT_MODE;
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iio_dev->num_channels = chip_info->num_channels;
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iio_dev->channels = chip_info->channels;
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if (irq) {
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ret = devm_request_threaded_irq(dev, irq, NULL,
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ad7091r_event_handler,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT, name, st);
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if (ret)
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return ret;
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}
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/* Use command mode by default to convert only desired channels*/
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ret = ad7091r_set_mode(st, AD7091R_MODE_COMMAND);
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if (ret)
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return ret;
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return devm_iio_device_register(dev, iio_dev);
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}
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EXPORT_SYMBOL_GPL(ad7091r_probe);
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static bool ad7091r_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AD7091R_REG_RESULT:
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case AD7091R_REG_ALERT:
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return false;
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default:
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return true;
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}
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}
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static bool ad7091r_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AD7091R_REG_RESULT:
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case AD7091R_REG_ALERT:
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return true;
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default:
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return false;
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}
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}
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const struct regmap_config ad7091r_regmap_config = {
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.reg_bits = 8,
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.val_bits = 16,
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.writeable_reg = ad7091r_writeable_reg,
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.volatile_reg = ad7091r_volatile_reg,
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};
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EXPORT_SYMBOL_GPL(ad7091r_regmap_config);
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MODULE_AUTHOR("Beniamin Bia <beniamin.bia@analog.com>");
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MODULE_DESCRIPTION("Analog Devices AD7091Rx multi-channel converters");
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MODULE_LICENSE("GPL v2");
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25
drivers/iio/adc/ad7091r-base.h
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25
drivers/iio/adc/ad7091r-base.h
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@ -0,0 +1,25 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AD7091RX Analog to Digital converter driver
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*
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* Copyright 2014-2019 Analog Devices Inc.
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*/
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#ifndef __DRIVERS_IIO_ADC_AD7091R_BASE_H__
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#define __DRIVERS_IIO_ADC_AD7091R_BASE_H__
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struct device;
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struct ad7091r_state;
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struct ad7091r_chip_info {
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unsigned int num_channels;
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const struct iio_chan_spec *channels;
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};
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extern const struct regmap_config ad7091r_regmap_config;
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int ad7091r_probe(struct device *dev, const char *name,
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const struct ad7091r_chip_info *chip_info,
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struct regmap *map, int irq);
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#endif /* __DRIVERS_IIO_ADC_AD7091R_BASE_H__ */
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108
drivers/iio/adc/ad7091r5.c
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108
drivers/iio/adc/ad7091r5.c
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@ -0,0 +1,108 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* AD7091R5 Analog to Digital converter driver
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*
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* Copyright 2014-2019 Analog Devices Inc.
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*/
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#include <linux/i2c.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include "ad7091r-base.h"
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static const struct iio_event_spec ad7091r5_events[] = {
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_RISING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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},
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_FALLING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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},
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_EITHER,
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.mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
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},
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};
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#define AD7091R_CHANNEL(idx, bits, ev, num_ev) { \
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.type = IIO_VOLTAGE, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.indexed = 1, \
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.channel = idx, \
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.event_spec = ev, \
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.num_event_specs = num_ev, \
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}
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static const struct iio_chan_spec ad7091r5_channels_irq[] = {
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AD7091R_CHANNEL(0, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
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AD7091R_CHANNEL(1, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
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AD7091R_CHANNEL(2, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
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AD7091R_CHANNEL(3, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
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};
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static const struct iio_chan_spec ad7091r5_channels_noirq[] = {
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AD7091R_CHANNEL(0, 12, NULL, 0),
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AD7091R_CHANNEL(1, 12, NULL, 0),
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AD7091R_CHANNEL(2, 12, NULL, 0),
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AD7091R_CHANNEL(3, 12, NULL, 0),
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};
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static const struct ad7091r_chip_info ad7091r5_chip_info_irq = {
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.channels = ad7091r5_channels_irq,
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.num_channels = ARRAY_SIZE(ad7091r5_channels_irq),
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};
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static const struct ad7091r_chip_info ad7091r5_chip_info_noirq = {
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.channels = ad7091r5_channels_noirq,
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.num_channels = ARRAY_SIZE(ad7091r5_channels_noirq),
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};
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static int ad7091r5_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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const struct ad7091r_chip_info *chip_info;
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struct regmap *map = devm_regmap_init_i2c(i2c, &ad7091r_regmap_config);
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if (IS_ERR(map))
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return PTR_ERR(map);
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if (i2c->irq)
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chip_info = &ad7091r5_chip_info_irq;
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else
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chip_info = &ad7091r5_chip_info_noirq;
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return ad7091r_probe(&i2c->dev, id->name, chip_info, map, i2c->irq);
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}
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static const struct of_device_id ad7091r5_dt_ids[] = {
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{ .compatible = "adi,ad7091r5" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ad7091r5_dt_ids);
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static const struct i2c_device_id ad7091r5_i2c_ids[] = {
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{"ad7091r5", 0},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, ad7091r5_i2c_ids);
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static struct i2c_driver ad7091r5_driver = {
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.driver = {
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.name = "ad7091r5",
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.of_match_table = ad7091r5_dt_ids,
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},
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.probe = ad7091r5_i2c_probe,
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.id_table = ad7091r5_i2c_ids,
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};
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module_i2c_driver(ad7091r5_driver);
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MODULE_AUTHOR("Beniamin Bia <beniamin.bia@analog.com>");
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MODULE_DESCRIPTION("Analog Devices AD7091R5 multi-channel ADC driver");
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MODULE_LICENSE("GPL v2");
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