usb: dwc2: Disable clock gating feature on Rockchip SoCs

The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
When a clock gating is enabled, system hangs.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Link: https://lore.kernel.org/r/1703575199-23638-1-git-send-email-william.wu@rock-chips.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
William Wu 2023-12-26 15:19:59 +08:00 committed by Greg Kroah-Hartman
parent 9c6b789e95
commit ca2dc35e55

View File

@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
p->lpm_clock_gating = false; p->lpm_clock_gating = false;
p->besl = false; p->besl = false;
p->hird_threshold_en = false; p->hird_threshold_en = false;
p->no_clock_gating = true;
} }
static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)