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ARM: at91: add RSTC (Reset Controller) dt support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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21ea52aadd
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@ -30,3 +30,15 @@ One interrupt per TC channel in a TC block:
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reg = <0xfffdc000 0x100>;
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interrupts = <26 4 27 4 28 4>;
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};
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RSTC Reset Controller required properties:
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- compatible: Should be "atmel,<chip>-rstc".
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<chip> can be "at91sam9260" or "at91sam9g45"
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- reg: Should contain registers location and length
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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@ -64,6 +64,11 @@
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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@ -65,6 +65,11 @@
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffd00 0x10>;
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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@ -63,6 +63,11 @@
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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};
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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@ -306,7 +306,6 @@ static void __init at91sam9x5_ioremap_registers(void)
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void __init at91sam9x5_initialize(void)
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{
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arm_pm_restart = at91sam9g45_restart;
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at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
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/* Register GPIO subsystem (using DT) */
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@ -287,8 +287,38 @@ void __init at91_ioremap_matrix(u32 base_addr)
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}
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#if defined(CONFIG_OF)
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static struct of_device_id rstc_ids[] = {
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{ .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
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{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
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{ /*sentinel*/ }
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};
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static void at91_dt_rstc(void)
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{
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struct device_node *np;
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const struct of_device_id *of_id;
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np = of_find_matching_node(NULL, rstc_ids);
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if (!np)
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panic("unable to find compatible rstc node in dtb\n");
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at91_rstc_base = of_iomap(np, 0);
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if (!at91_rstc_base)
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panic("unable to map rstc cpu registers\n");
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of_id = of_match_node(rstc_ids, np);
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if (!of_id)
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panic("AT91: rtsc no restart function availlable\n");
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arm_pm_restart = of_id->data;
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of_node_put(np);
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}
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void __init at91_dt_initialize(void)
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{
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at91_dt_rstc();
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/* temporary until have the ramc binding*/
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at91_boot_soc.ioremap_registers();
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