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i2c: stm32f7: add SMBus-Alert support
Add support for the SMBus-Alert protocol to the STM32F7 that has dedicated control and status logic. If SMBus-Alert is used, the SMBALERT# pin must be configured as alternate function for I2C Alert. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -51,6 +51,7 @@
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/* STM32F7 I2C control 1 */
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/* STM32F7 I2C control 1 */
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#define STM32F7_I2C_CR1_PECEN BIT(23)
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#define STM32F7_I2C_CR1_PECEN BIT(23)
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#define STM32F7_I2C_CR1_ALERTEN BIT(22)
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#define STM32F7_I2C_CR1_SMBHEN BIT(20)
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#define STM32F7_I2C_CR1_SMBHEN BIT(20)
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#define STM32F7_I2C_CR1_WUPEN BIT(18)
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#define STM32F7_I2C_CR1_WUPEN BIT(18)
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#define STM32F7_I2C_CR1_SBC BIT(16)
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#define STM32F7_I2C_CR1_SBC BIT(16)
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@ -125,6 +126,7 @@
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(((n) & STM32F7_I2C_ISR_ADDCODE_MASK) >> 17)
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(((n) & STM32F7_I2C_ISR_ADDCODE_MASK) >> 17)
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#define STM32F7_I2C_ISR_DIR BIT(16)
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#define STM32F7_I2C_ISR_DIR BIT(16)
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#define STM32F7_I2C_ISR_BUSY BIT(15)
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#define STM32F7_I2C_ISR_BUSY BIT(15)
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#define STM32F7_I2C_ISR_ALERT BIT(13)
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#define STM32F7_I2C_ISR_PECERR BIT(11)
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#define STM32F7_I2C_ISR_PECERR BIT(11)
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#define STM32F7_I2C_ISR_ARLO BIT(9)
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#define STM32F7_I2C_ISR_ARLO BIT(9)
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#define STM32F7_I2C_ISR_BERR BIT(8)
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#define STM32F7_I2C_ISR_BERR BIT(8)
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@ -138,6 +140,7 @@
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#define STM32F7_I2C_ISR_TXE BIT(0)
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#define STM32F7_I2C_ISR_TXE BIT(0)
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/* STM32F7 I2C Interrupt Clear */
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/* STM32F7 I2C Interrupt Clear */
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#define STM32F7_I2C_ICR_ALERTCF BIT(13)
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#define STM32F7_I2C_ICR_PECCF BIT(11)
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#define STM32F7_I2C_ICR_PECCF BIT(11)
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#define STM32F7_I2C_ICR_ARLOCF BIT(9)
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#define STM32F7_I2C_ICR_ARLOCF BIT(9)
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#define STM32F7_I2C_ICR_BERRCF BIT(8)
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#define STM32F7_I2C_ICR_BERRCF BIT(8)
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@ -278,6 +281,17 @@ struct stm32f7_i2c_msg {
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u8 smbus_buf[I2C_SMBUS_BLOCK_MAX + 3] __aligned(4);
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u8 smbus_buf[I2C_SMBUS_BLOCK_MAX + 3] __aligned(4);
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};
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};
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/**
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* struct stm32f7_i2c_alert - SMBus alert specific data
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* @setup: platform data for the smbus_alert i2c client
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* @ara: I2C slave device used to respond to the SMBus Alert with Alert
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* Response Address
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*/
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struct stm32f7_i2c_alert {
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struct i2c_smbus_alert_setup setup;
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struct i2c_client *ara;
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};
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/**
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/**
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* struct stm32f7_i2c_dev - private data of the controller
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* struct stm32f7_i2c_dev - private data of the controller
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* @adap: I2C adapter for this controller
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* @adap: I2C adapter for this controller
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@ -310,6 +324,7 @@ struct stm32f7_i2c_msg {
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* @analog_filter: boolean to indicate enabling of the analog filter
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* @analog_filter: boolean to indicate enabling of the analog filter
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* @dnf_dt: value of digital filter requested via dt
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* @dnf_dt: value of digital filter requested via dt
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* @dnf: value of digital filter to apply
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* @dnf: value of digital filter to apply
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* @alert: SMBus alert specific data
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*/
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*/
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struct stm32f7_i2c_dev {
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struct stm32f7_i2c_dev {
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struct i2c_adapter adap;
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struct i2c_adapter adap;
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@ -341,6 +356,7 @@ struct stm32f7_i2c_dev {
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bool analog_filter;
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bool analog_filter;
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u32 dnf_dt;
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u32 dnf_dt;
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u32 dnf;
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u32 dnf;
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struct stm32f7_i2c_alert *alert;
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};
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};
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/*
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/*
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@ -1624,6 +1640,13 @@ static irqreturn_t stm32f7_i2c_isr_error(int irq, void *data)
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f7_msg->result = -EINVAL;
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f7_msg->result = -EINVAL;
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}
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}
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if (status & STM32F7_I2C_ISR_ALERT) {
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dev_dbg(dev, "<%s>: SMBus alert received\n", __func__);
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writel_relaxed(STM32F7_I2C_ICR_ALERTCF, base + STM32F7_I2C_ICR);
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i2c_handle_smbus_alert(i2c_dev->alert->ara);
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return IRQ_HANDLED;
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}
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if (!i2c_dev->slave_running) {
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if (!i2c_dev->slave_running) {
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u32 mask;
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u32 mask;
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/* Disable interrupts */
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/* Disable interrupts */
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@ -1990,6 +2013,42 @@ static void stm32f7_i2c_disable_smbus_host(struct stm32f7_i2c_dev *i2c_dev)
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}
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}
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}
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}
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static int stm32f7_i2c_enable_smbus_alert(struct stm32f7_i2c_dev *i2c_dev)
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{
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struct stm32f7_i2c_alert *alert;
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struct i2c_adapter *adap = &i2c_dev->adap;
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struct device *dev = i2c_dev->dev;
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void __iomem *base = i2c_dev->base;
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alert = devm_kzalloc(dev, sizeof(*alert), GFP_KERNEL);
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if (!alert)
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return -ENOMEM;
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alert->ara = i2c_new_smbus_alert_device(adap, &alert->setup);
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if (IS_ERR(alert->ara))
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return PTR_ERR(alert->ara);
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i2c_dev->alert = alert;
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/* Enable SMBus Alert */
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stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, STM32F7_I2C_CR1_ALERTEN);
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return 0;
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}
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static void stm32f7_i2c_disable_smbus_alert(struct stm32f7_i2c_dev *i2c_dev)
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{
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struct stm32f7_i2c_alert *alert = i2c_dev->alert;
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void __iomem *base = i2c_dev->base;
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if (alert) {
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/* Disable SMBus Alert */
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stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR1,
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STM32F7_I2C_CR1_ALERTEN);
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i2c_unregister_device(alert->ara);
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}
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}
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static u32 stm32f7_i2c_func(struct i2c_adapter *adap)
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static u32 stm32f7_i2c_func(struct i2c_adapter *adap)
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{
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{
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struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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@ -2173,6 +2232,16 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
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}
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}
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}
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}
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if (of_property_read_bool(pdev->dev.of_node, "smbus-alert")) {
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ret = stm32f7_i2c_enable_smbus_alert(i2c_dev);
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if (ret) {
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dev_err(i2c_dev->dev,
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"failed to enable SMBus alert protocol (%d)\n",
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ret);
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goto i2c_disable_smbus_host;
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}
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}
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dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr);
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dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr);
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pm_runtime_mark_last_busy(i2c_dev->dev);
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pm_runtime_mark_last_busy(i2c_dev->dev);
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@ -2180,6 +2249,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
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return 0;
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return 0;
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i2c_disable_smbus_host:
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stm32f7_i2c_disable_smbus_host(i2c_dev);
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i2c_adapter_remove:
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i2c_adapter_remove:
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i2c_del_adapter(adap);
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i2c_del_adapter(adap);
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@ -2214,6 +2286,7 @@ static int stm32f7_i2c_remove(struct platform_device *pdev)
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{
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{
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struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
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struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
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stm32f7_i2c_disable_smbus_alert(i2c_dev);
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stm32f7_i2c_disable_smbus_host(i2c_dev);
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stm32f7_i2c_disable_smbus_host(i2c_dev);
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i2c_del_adapter(&i2c_dev->adap);
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i2c_del_adapter(&i2c_dev->adap);
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