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[ALSA] soc - ASoC 0.13 AT91xxxx Eti_B1 board support
This patch updates the EtI B1 machine driver to the new API in ASoC 0.13. Changes:- o Manually configure DAI hardware format. o Removed config_sysclk() function. No longer needed as clocking is now configured manually. Signed-off-by: Frank Mandarino <fmandarino@endrelia.com> Signed-off-by: Liam Girdwood <lg@opensource.wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
This commit is contained in:
Frank Mandarino
Jaroslav Kysela
parent
6297027629
commit
c8044274c7
@ -18,9 +18,6 @@
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Revision history
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* 30th Nov 2005 Initial version.
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*
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*/
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#include <linux/module.h>
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@ -43,9 +40,10 @@
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#include "../codecs/wm8731.h"
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#include "at91-pcm.h"
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#include "at91-i2s.h"
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#if 0
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#define DBG(x...) printk(KERN_INFO "eti_b1_wm8731:" x)
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#define DBG(x...) printk(KERN_INFO "eti_b1_wm8731: " x)
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#else
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#define DBG(x...)
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#endif
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@ -57,12 +55,29 @@
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#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
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#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
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static struct clk *pck1_clk;
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static struct clk *pllb_clk;
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static int eti_b1_startup(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
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struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
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int ret;
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/* cpu clock is the AT91 master clock sent to the SSC */
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ret = cpu_dai->dai_ops.set_sysclk(cpu_dai, AT91_SYSCLK_MCK,
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60000000, SND_SOC_CLOCK_IN);
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if (ret < 0)
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return ret;
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/* codec system clock is supplied by PCK1, set to 12MHz */
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ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8731_SYSCLK,
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12000000, SND_SOC_CLOCK_IN);
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if (ret < 0)
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return ret;
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/* Start PCK1 clock. */
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clk_enable(pck1_clk);
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DBG("pck1 started\n");
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@ -77,8 +92,105 @@ static void eti_b1_shutdown(struct snd_pcm_substream *substream)
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DBG("pck1 stopped\n");
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}
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static int eti_b1_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
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struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
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int ret;
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#ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
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unsigned int rate;
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int cmr_div, period;
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/* set codec DAI configuration */
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ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
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SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
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if (ret < 0)
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return ret;
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/* set cpu DAI configuration */
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ret = cpu_dai->dai_ops.set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
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SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
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if (ret < 0)
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return ret;
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/*
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* The SSC clock dividers depend on the sample rate. The CMR.DIV
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* field divides the system master clock MCK to drive the SSC TK
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* signal which provides the codec BCLK. The TCMR.PERIOD and
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* RCMR.PERIOD fields further divide the BCLK signal to drive
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* the SSC TF and RF signals which provide the codec DACLRC and
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* ADCLRC clocks.
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*
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* The dividers were determined through trial and error, where a
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* CMR.DIV value is chosen such that the resulting BCLK value is
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* divisible, or almost divisible, by (2 * sample rate), and then
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* the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
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*/
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rate = params_rate(params);
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switch (rate) {
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case 8000:
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cmr_div = 25; /* BCLK = 60MHz/(2*25) = 1.2MHz */
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period = 74; /* LRC = BCLK/(2*(74+1)) = 8000Hz */
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break;
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case 32000:
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cmr_div = 7; /* BCLK = 60MHz/(2*7) ~= 4.28571428MHz */
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period = 66; /* LRC = BCLK/(2*(66+1)) = 31982.942Hz */
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break;
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case 48000:
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cmr_div = 13; /* BCLK = 60MHz/(2*13) ~= 2.3076923MHz */
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period = 23; /* LRC = BCLK/(2*(23+1)) = 48076.923Hz */
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break;
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default:
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printk(KERN_WARNING "unsupported rate %d on ETI-B1 board\n", rate);
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return -EINVAL;
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}
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/* set the MCK divider for BCLK */
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ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, AT91SSC_CMR_DIV, cmr_div);
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if (ret < 0)
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return ret;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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/* set the BCLK divider for DACLRC */
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ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai,
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AT91SSC_TCMR_PERIOD, period);
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} else {
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/* set the BCLK divider for ADCLRC */
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ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai,
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AT91SSC_RCMR_PERIOD, period);
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}
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if (ret < 0)
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return ret;
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#else /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
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/*
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* Codec in Master Mode.
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*/
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/* set codec DAI configuration */
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ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
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SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
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if (ret < 0)
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return ret;
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/* set cpu DAI configuration */
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ret = cpu_dai->dai_ops.set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
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SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
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if (ret < 0)
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return ret;
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#endif /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
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return 0;
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}
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static struct snd_soc_ops eti_b1_ops = {
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.startup = eti_b1_startup,
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.hw_params = eti_b1_hw_params,
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.shutdown = eti_b1_shutdown,
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};
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@ -134,29 +246,19 @@ static int eti_b1_wm8731_init(struct snd_soc_codec *codec)
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return 0;
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}
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unsigned int eti_b1_config_sysclk(struct snd_soc_pcm_runtime *rtd,
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struct snd_soc_clock_info *info)
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{
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if(info->bclk_master & SND_SOC_DAIFMT_CBS_CFS) {
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return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 12000000);
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}
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return 0;
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}
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static struct snd_soc_dai_link eti_b1_dai = {
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.name = "WM8731",
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.stream_name = "WM8731",
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.cpu_dai = &at91_i2s_dai[1],
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.codec_dai = &wm8731_dai,
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.init = eti_b1_wm8731_init,
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.config_sysclk = eti_b1_config_sysclk,
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.ops = &eti_b1_ops,
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};
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static struct snd_soc_machine snd_soc_machine_eti_b1 = {
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.name = "ETI_B1",
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.dai_link = &eti_b1_dai,
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.num_links = 1,
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.ops = &eti_b1_ops,
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};
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static struct wm8731_setup_data eti_b1_wm8731_setup = {
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@ -210,7 +312,7 @@ static int __init eti_b1_init(void)
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}
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ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
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| AT91_PIO_RD1 /* | AT91_PIO_RK1 | AT91_PIO_RF1 */;
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| AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1;
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/* Reset all PIO registers and assign lines to peripheral A */
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at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines);
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@ -237,6 +339,11 @@ static int __init eti_b1_init(void)
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/* assign the GPIO pin to PCK1 */
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at91_set_B_periph(AT91_PIN_PA24, 0);
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#ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
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printk(KERN_INFO "eti_b1_wm8731: Codec in Slave Mode\n");
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#else
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printk(KERN_INFO "eti_b1_wm8731: Codec in Master Mode\n");
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#endif
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return ret;
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fail_io_unmap:
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