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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar: "An x86 PMU constraint fix, an interface fix, and a Sparse fix" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel: Allow PEBS multi-entry in watermark mode perf/x86/intel: Fix INTEL_FLAGS_EVENT_CONSTRAINT* masking perf/x86/amd/iommu: Make the 'amd_iommu_attr_groups' symbol static
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c77ee64f8a
@ -393,7 +393,7 @@ static __init int _init_events_attrs(void)
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return 0;
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}
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const struct attribute_group *amd_iommu_attr_groups[] = {
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static const struct attribute_group *amd_iommu_attr_groups[] = {
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&amd_iommu_format_group,
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&amd_iommu_cpumask_group,
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&amd_iommu_events_group,
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@ -3265,7 +3265,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
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return ret;
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if (event->attr.precise_ip) {
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if (!(event->attr.freq || event->attr.wakeup_events)) {
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if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) {
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event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
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if (!(event->attr.sample_type &
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~intel_pmu_large_pebs_flags(event)))
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@ -394,10 +394,10 @@ struct cpu_hw_events {
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/* Event constraint, but match on all event flags too. */
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#define INTEL_FLAGS_EVENT_CONSTRAINT(c, n) \
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EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
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EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS)
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#define INTEL_FLAGS_EVENT_CONSTRAINT_RANGE(c, e, n) \
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EVENT_CONSTRAINT_RANGE(c, e, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
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EVENT_CONSTRAINT_RANGE(c, e, n, ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS)
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/* Check only flags, but allow all event/umask */
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#define INTEL_ALL_EVENT_CONSTRAINT(code, n) \
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