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arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a helper
ACPI, irqchip and the architecture code all inspect the MADT enabled bit for a GICC entry in the MADT. The addition of an 'online capable' bit means all these sites need updating. Move the current checks behind a helper to make future updates easier. Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk> Acked-by: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/E1quv5D-00AeNJ-U8@rmk-PC.armlinux.org.uk Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -520,7 +520,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
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{
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u64 hwid = processor->arm_mpidr;
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if (!(processor->flags & ACPI_MADT_ENABLED)) {
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if (!acpi_gicc_is_usable(processor)) {
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pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
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return;
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}
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@ -90,7 +90,7 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry,
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struct acpi_madt_generic_interrupt *gicc =
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container_of(entry, struct acpi_madt_generic_interrupt, header);
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if (!(gicc->flags & ACPI_MADT_ENABLED))
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if (!acpi_gicc_is_usable(gicc))
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return -ENODEV;
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/* device_declaration means Device object in DSDT, in the
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@ -2367,8 +2367,7 @@ gic_acpi_parse_madt_gicc(union acpi_subtable_headers *header,
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u32 size = reg == GIC_PIDR2_ARCH_GICv4 ? SZ_64K * 4 : SZ_64K * 2;
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void __iomem *redist_base;
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/* GICC entry which has !ACPI_MADT_ENABLED is not unusable so skip */
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if (!(gicc->flags & ACPI_MADT_ENABLED))
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if (!acpi_gicc_is_usable(gicc))
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return 0;
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redist_base = ioremap(gicc->gicr_base_address, size);
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@ -2418,7 +2417,7 @@ static int __init gic_acpi_match_gicc(union acpi_subtable_headers *header,
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* If GICC is enabled and has valid gicr base address, then it means
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* GICR base is presented via GICC
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*/
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if ((gicc->flags & ACPI_MADT_ENABLED) && gicc->gicr_base_address) {
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if (acpi_gicc_is_usable(gicc) && gicc->gicr_base_address) {
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acpi_data.enabled_rdists++;
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return 0;
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}
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@ -2427,7 +2426,7 @@ static int __init gic_acpi_match_gicc(union acpi_subtable_headers *header,
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* It's perfectly valid firmware can pass disabled GICC entry, driver
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* should not treat as errors, skip the entry instead of probe fail.
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*/
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if (!(gicc->flags & ACPI_MADT_ENABLED))
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if (!acpi_gicc_is_usable(gicc))
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return 0;
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return -ENODEV;
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@ -2486,8 +2485,7 @@ static int __init gic_acpi_parse_virt_madt_gicc(union acpi_subtable_headers *hea
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int maint_irq_mode;
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static int first_madt = true;
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/* Skip unusable CPUs */
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if (!(gicc->flags & ACPI_MADT_ENABLED))
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if (!acpi_gicc_is_usable(gicc))
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return 0;
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maint_irq_mode = (gicc->flags & ACPI_MADT_VGIC_IRQ_MODE) ?
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@ -256,6 +256,11 @@ acpi_table_parse_cedt(enum acpi_cedt_type id,
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int acpi_parse_mcfg (struct acpi_table_header *header);
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void acpi_table_print_madt_entry (struct acpi_subtable_header *madt);
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static inline bool acpi_gicc_is_usable(struct acpi_madt_generic_interrupt *gicc)
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{
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return gicc->flags & ACPI_MADT_ENABLED;
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}
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/* the following numa functions are architecture-dependent */
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void acpi_numa_slit_init (struct acpi_table_slit *slit);
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