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drm/i915: properly compute dp dithering for user-created modes
We've only computed whether we need to fall back to 6bpc due to dp link bandwidth constrains in mode_valid, but not mode_fixup. Under various circumstances X likes to create new modes which then lack proper 6bpc flags (if required), resulting in mode_fixup failures and ultimately black screens. Chris Wilson pointed out that we still get things wrong for bpp > 24, but that should be fixed in another patch (and it'll be easier because this patch consolidates the logic). The likely culprit for this regression is commit 3d794f87238f74d80e78a7611c7fbde8a54c85c2 Author: Keith Packard <keithp@keithp.com> Date: Wed Jan 25 08:16:25 2012 -0800 drm/i915: Force explicit bpp selection for intel_dp_link_required v2: Fix indentation and tune down the too bold claim that this should fix the world. Both noticed by Chris Wilson. v3: Try to really git add things. Reported-and-tested-by: Brice Goglin <Brice.Goglin@ens-lyon.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48170 Cc: stable@kernel.org Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -219,14 +219,38 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
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return (max_link_clock * max_lanes * 8) / 10;
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}
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static bool
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intel_dp_adjust_dithering(struct intel_dp *intel_dp,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
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int max_lanes = intel_dp_max_lane_count(intel_dp);
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int max_rate, mode_rate;
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mode_rate = intel_dp_link_required(mode->clock, 24);
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max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
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if (mode_rate > max_rate) {
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mode_rate = intel_dp_link_required(mode->clock, 18);
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if (mode_rate > max_rate)
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return false;
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if (adjusted_mode)
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adjusted_mode->private_flags
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|= INTEL_MODE_DP_FORCE_6BPC;
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return true;
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}
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return true;
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}
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static int
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intel_dp_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct intel_dp *intel_dp = intel_attached_dp(connector);
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int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
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int max_lanes = intel_dp_max_lane_count(intel_dp);
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int max_rate, mode_rate;
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if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
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if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay)
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@ -236,16 +260,8 @@ intel_dp_mode_valid(struct drm_connector *connector,
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return MODE_PANEL;
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}
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mode_rate = intel_dp_link_required(mode->clock, 24);
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max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
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if (mode_rate > max_rate) {
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mode_rate = intel_dp_link_required(mode->clock, 18);
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if (mode_rate > max_rate)
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return MODE_CLOCK_HIGH;
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else
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mode->private_flags |= INTEL_MODE_DP_FORCE_6BPC;
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}
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if (!intel_dp_adjust_dithering(intel_dp, mode, NULL))
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return MODE_CLOCK_HIGH;
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if (mode->clock < 10000)
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return MODE_CLOCK_LOW;
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@ -672,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
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int lane_count, clock;
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int max_lane_count = intel_dp_max_lane_count(intel_dp);
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int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
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int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
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int bpp;
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static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
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if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
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@ -686,6 +702,11 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
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mode->clock = intel_dp->panel_fixed_mode->clock;
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}
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if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode))
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return false;
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bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
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for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
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for (clock = 0; clock <= max_clock; clock++) {
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int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
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