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accel/habanalabs: dump the EQ entries headers on EQ heartbeat failure
Add a dump of the EQ entries headers upon a EQ heartbeat failure. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Ofir Bitton <obitton@habana.ai> Signed-off-by: Ofir Bitton <obitton@habana.ai>
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@ -1082,6 +1082,8 @@ static bool hl_device_eq_heartbeat_received(struct hl_device *hdev)
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atomic_read(&hdev->kernel_queues[cpu_q_id].ci),
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atomic_read(&hdev->kernel_queues[cpu_q_id].ci) & pq_pi_mask);
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hl_eq_dump(hdev, &hdev->event_queue);
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return false;
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}
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@ -3754,6 +3754,7 @@ int hl_eq_init(struct hl_device *hdev, struct hl_eq *q);
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void hl_eq_fini(struct hl_device *hdev, struct hl_eq *q);
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void hl_cq_reset(struct hl_device *hdev, struct hl_cq *q);
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void hl_eq_reset(struct hl_device *hdev, struct hl_eq *q);
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void hl_eq_dump(struct hl_device *hdev, struct hl_eq *q);
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irqreturn_t hl_irq_handler_cq(int irq, void *arg);
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irqreturn_t hl_irq_handler_eq(int irq, void *arg);
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irqreturn_t hl_irq_handler_dec_abnrm(int irq, void *arg);
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@ -697,3 +697,28 @@ void hl_eq_reset(struct hl_device *hdev, struct hl_eq *q)
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memset(q->kernel_address, 0, q->size);
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}
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void hl_eq_dump(struct hl_device *hdev, struct hl_eq *q)
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{
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u32 eq_length, eqe_size, ctl, ready, mode, type, index;
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struct hl_eq_header *hdr;
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u8 *ptr;
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int i;
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eq_length = HL_EQ_LENGTH;
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eqe_size = q->size / HL_EQ_LENGTH;
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dev_info(hdev->dev, "Contents of EQ entries headers:\n");
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for (i = 0, ptr = q->kernel_address ; i < eq_length ; ++i, ptr += eqe_size) {
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hdr = (struct hl_eq_header *) ptr;
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ctl = le32_to_cpu(hdr->ctl);
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ready = FIELD_GET(EQ_CTL_READY_MASK, ctl);
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mode = FIELD_GET(EQ_CTL_EVENT_MODE_MASK, ctl);
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type = FIELD_GET(EQ_CTL_EVENT_TYPE_MASK, ctl);
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index = FIELD_GET(EQ_CTL_INDEX_MASK, ctl);
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dev_info(hdev->dev, "%02u: %#010x [ready: %u, mode %u, type %04u, index %05u]\n",
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i, ctl, ready, mode, type, index);
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}
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}
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@ -397,6 +397,9 @@ struct hl_eq_entry {
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#define EQ_CTL_READY_SHIFT 31
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#define EQ_CTL_READY_MASK 0x80000000
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#define EQ_CTL_EVENT_MODE_SHIFT 28
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#define EQ_CTL_EVENT_MODE_MASK 0x70000000
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#define EQ_CTL_EVENT_TYPE_SHIFT 16
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#define EQ_CTL_EVENT_TYPE_MASK 0x0FFF0000
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