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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
  ARM: Fix RiscPC decompressor build errors
  ARM: Fix sorting of platform group config options and includes
  ARM: 5991/1: Fix regression in restore_user_regs macro
  ARM: 5989/1: ARM: KGDB: add support for SMP platforms
  ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
  ARM: Add final piece to fix XIP decompressor in read-only memory
  video: enable sh_mobile_lcdc on SH-Mobile ARM
  ARM: mach-shmobile: ap4evb SDHI0 platform data V2
  ARM: mach-shmobile: sh7372 SDHI vector merge
  ARM: mach-shmobile: sh7377 SDHI vector merge
  ARM: mach-shmobile: sh7367 SDHI vector merge
  ARM: mach-shmobile: G4EVM KEYSC platform data
  mtd: enable sh_flctl on SH-Mobile ARM
  ARM: mach-shmobile: G3EVM FLCTL platform data
  ARM: mach-shmobile: G3EVM KEYSC platform data
  Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
  ARM: Add L2 cache handling to smp boot support
  ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
  ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
  ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds
  ...
This commit is contained in:
Linus Torvalds 2010-03-18 16:59:10 -07:00
commit c3a0bd7515
23 changed files with 402 additions and 133 deletions
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81
arch/arm/Kconfig
View File

@ -218,6 +218,10 @@ config MMU
Select if you want MMU-based virtualised addressing space
support by paged memory management. If unsure, say 'Y'.
#
# The "ARM system type" choice list is ordered alphabetically by option
# text. Please add new entries in the option alphabetic order.
#
choice
prompt "ARM system type"
default ARCH_VERSATILE
@ -274,6 +278,18 @@ config ARCH_AT91
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors.
config ARCH_BCMRING
bool "Broadcom BCMRING"
depends on MMU
select CPU_V6
select ARM_AMBA
select COMMON_CLKDEV
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select ARCH_WANT_OPTIONAL_GPIOLIB
help
Support for Broadcom's BCMRing platform.
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based"
select CPU_ARM720T
@ -359,20 +375,6 @@ config ARCH_H720X
help
This enables support for systems based on the Hynix HMS720x
config ARCH_NOMADIK
bool "STMicroelectronics Nomadik"
select ARM_AMBA
select ARM_VIC
select CPU_ARM926T
select HAVE_CLK
select COMMON_CLKDEV
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
help
Support for the Nomadik platform by ST-Ericsson
config ARCH_IOP13XX
bool "IOP13xx-based"
depends on MMU
@ -747,6 +749,30 @@ config ARCH_U300
help
Support for ST-Ericsson U300 series mobile platforms.
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
select CPU_V7
select ARM_AMBA
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select COMMON_CLKDEV
help
Support for ST-Ericsson's Ux500 architecture
config ARCH_NOMADIK
bool "STMicroelectronics Nomadik"
select ARM_AMBA
select ARM_VIC
select CPU_ARM926T
select HAVE_CLK
select COMMON_CLKDEV
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
help
Support for the Nomadik platform by ST-Ericsson
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926T
@ -775,30 +801,13 @@ config ARCH_OMAP
help
Support for TI's OMAP platform (OMAP1 and OMAP2).
config ARCH_BCMRING
bool "Broadcom BCMRING"
depends on MMU
select CPU_V6
select ARM_AMBA
select COMMON_CLKDEV
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select ARCH_WANT_OPTIONAL_GPIOLIB
help
Support for Broadcom's BCMRing platform.
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
select CPU_V7
select ARM_AMBA
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select COMMON_CLKDEV
help
Support for ST-Ericsson's Ux500 architecture
endchoice
#
# This is sorted alphabetically by mach-* pathname. However, plat-*
# Kconfigs may be included either alphabetically (according to the
# plat- suffix) or along side the corresponding mach-* source.
#
source "arch/arm/mach-aaec2000/Kconfig"
source "arch/arm/mach-at91/Kconfig"

1
arch/arm/boot/compressed/decompress.c
View File

@ -11,6 +11,7 @@ extern unsigned long free_mem_end_ptr;
extern void error(char *);
#define STATIC static
#define STATIC_RW_DATA /* non-static please */
#define ARCH_HAS_DECOMP_WDOG

2
arch/arm/boot/compressed/head.S
View File

@ -742,7 +742,7 @@ proc_types:
.word 0x000f0000
W(b) __armv4_mmu_cache_on
W(b) __armv4_mmu_cache_off
W(b) __armv4_mmu_cache_flush
W(b) __armv5tej_mmu_cache_flush
.word 0x0007b000 @ ARMv6
.word 0x000ff000

1
arch/arm/boot/compressed/misc.c
View File

@ -33,6 +33,7 @@ unsigned int __machine_arch_type;
#else
static void putstr(const char *ptr);
extern void error(char *x);
#include <mach/uncompress.h>

1
arch/arm/include/asm/elf.h
View File

@ -98,6 +98,7 @@ extern int elf_check_arch(const struct elf32_hdr *);
extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
struct task_struct;
int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
#define ELF_CORE_COPY_TASK_REGS dump_task_regs

1
arch/arm/include/asm/pgtable-nommu.h
View File

@ -67,6 +67,7 @@ static inline int pte_file(pte_t pte) { return 0; }
*/
#define pgprot_noncached(prot) __pgprot(0)
#define pgprot_writecombine(prot) __pgprot(0)
#define pgprot_dmacoherent(prot) __pgprot(0)
/*

2
arch/arm/kernel/entry-header.S
View File

@ -102,6 +102,8 @@
.else
ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
.endif
mov r0, r0 @ ARMv5T and earlier require a nop
@ after ldm {}^
add sp, sp, #S_FRAME_SIZE - S_PC
movs pc, lr @ return & move spsr_svc into cpsr
.endm

13
arch/arm/kernel/kgdb.c
View File

@ -9,6 +9,7 @@
* Authors: George Davis <davis_g@mvista.com>
* Deepak Saxena <dsaxena@plexity.net>
*/
#include <linux/irq.h>
#include <linux/kgdb.h>
#include <asm/traps.h>
@ -158,6 +159,18 @@ static struct undef_hook kgdb_compiled_brkpt_hook = {
.fn = kgdb_compiled_brk_fn
};
static void kgdb_call_nmi_hook(void *ignored)
{
kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
}
void kgdb_roundup_cpus(unsigned long flags)
{
local_irq_enable();
smp_call_function(kgdb_call_nmi_hook, NULL, 0);
local_irq_disable();
}
/**
* kgdb_arch_init - Perform any architecture specific initalization.
*

5
arch/arm/kernel/perf_event.c
View File

@ -332,7 +332,8 @@ armpmu_reserve_hardware(void)
for (i = 0; i < pmu_irqs->num_irqs; ++i) {
err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq,
IRQF_DISABLED, "armpmu", NULL);
IRQF_DISABLED | IRQF_NOBALANCING,
"armpmu", NULL);
if (err) {
pr_warning("unable to request IRQ%d for ARM "
"perf counters\n", pmu_irqs->irqs[i]);
@ -1624,7 +1625,7 @@ enum armv7_counters {
/*
* EVTSEL: Event selection reg
*/
#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */
#define ARMV7_EVTSEL_MASK 0xff /* Mask for writable bits */
/*
* SELECT: Counter selection reg

4
arch/arm/kernel/smp.c
View File

@ -99,6 +99,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
*pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) |
PMD_TYPE_SECT | PMD_SECT_AP_WRITE);
flush_pmd_entry(pmd);
outer_clean_range(__pa(pmd), __pa(pmd + 1));
/*
* We need to tell the secondary core where to find
@ -106,7 +107,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
*/
secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
secondary_data.pgdir = virt_to_phys(pgd);
wmb();
__cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
/*
* Now bring the CPU into our world.

10
arch/arm/mach-at91/board-sam9g20ek.c
View File

@ -271,10 +271,12 @@ static void __init ek_add_device_buttons(void) {}
static struct i2c_board_info __initdata ek_i2c_devices[] = {
{
I2C_BOARD_INFO("24c512", 0x50),
I2C_BOARD_INFO("wm8731", 0x1b),
},
{
I2C_BOARD_INFO("24c512", 0x50)
},
{
I2C_BOARD_INFO("wm8731", 0x1b)
},
};

2
arch/arm/mach-rpc/include/mach/uncompress.h
View File

@ -109,8 +109,6 @@ static inline void flush(void)
{
}
static void error(char *x);
/*
* Setup for decompression
*/

32
arch/arm/mach-shmobile/board-ap4evb.c
View File

@ -206,10 +206,32 @@ static struct platform_device keysc_device = {
},
};
/* SDHI0 */
static struct resource sdhi0_resources[] = {
[0] = {
.name = "SDHI0",
.start = 0xe6850000,
.end = 0xe68501ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 96,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sdhi0_device = {
.name = "sh_mobile_sdhi",
.num_resources = ARRAY_SIZE(sdhi0_resources),
.resource = sdhi0_resources,
.id = 0,
};
static struct platform_device *ap4evb_devices[] __initdata = {
&nor_flash_device,
&smc911x_device,
&keysc_device,
&sdhi0_device,
};
static struct map_desc ap4evb_io_desc[] __initdata = {
@ -286,6 +308,16 @@ static void __init ap4evb_init(void)
gpio_request(GPIO_FN_KEYIN3_133, NULL);
gpio_request(GPIO_FN_KEYIN4, NULL);
/* SDHI0 */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
sh7372_add_standard_devices();
platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));

122
arch/arm/mach-shmobile/board-g3evm.c
View File

@ -26,9 +26,12 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/sh_flctl.h>
#include <linux/usb/r8a66597.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <mach/sh7367.h>
#include <mach/common.h>
#include <asm/mach-types.h>
@ -127,9 +130,90 @@ static struct platform_device usb_host_device = {
.resource = usb_host_resources,
};
/* KEYSC */
static struct sh_keysc_info keysc_info = {
.mode = SH_KEYSC_MODE_5,
.scan_timing = 3,
.delay = 100,
.keycodes = {
KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
},
};
static struct resource keysc_resources[] = {
[0] = {
.name = "KEYSC",
.start = 0xe61b0000,
.end = 0xe61b000f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 79,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device keysc_device = {
.name = "sh_keysc",
.num_resources = ARRAY_SIZE(keysc_resources),
.resource = keysc_resources,
.dev = {
.platform_data = &keysc_info,
},
};
static struct mtd_partition nand_partition_info[] = {
{
.name = "system",
.offset = 0,
.size = 64 * 1024 * 1024,
},
{
.name = "userdata",
.offset = MTDPART_OFS_APPEND,
.size = 128 * 1024 * 1024,
},
{
.name = "cache",
.offset = MTDPART_OFS_APPEND,
.size = 64 * 1024 * 1024,
},
};
static struct resource nand_flash_resources[] = {
[0] = {
.start = 0xe6a30000,
.end = 0xe6a3009b,
.flags = IORESOURCE_MEM,
}
};
static struct sh_flctl_platform_data nand_flash_data = {
.parts = nand_partition_info,
.nr_parts = ARRAY_SIZE(nand_partition_info),
.flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E
| SHBUSSEL | SEL_16BIT,
};
static struct platform_device nand_flash_device = {
.name = "sh_flctl",
.resource = nand_flash_resources,
.num_resources = ARRAY_SIZE(nand_flash_resources),
.dev = {
.platform_data = &nand_flash_data,
},
};
static struct platform_device *g3evm_devices[] __initdata = {
&nor_flash_device,
&usb_host_device,
&keysc_device,
&nand_flash_device,
};
static struct map_desc g3evm_io_desc[] __initdata = {
@ -196,6 +280,44 @@ static void __init g3evm_init(void)
__raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
__raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
/* KEYSC @ CN7 */
gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL);
gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL);
gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL);
gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL);
gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL);
/* FLCTL */
gpio_request(GPIO_FN_FCE0, NULL);
gpio_request(GPIO_FN_D0_ED0_NAF0, NULL);
gpio_request(GPIO_FN_D1_ED1_NAF1, NULL);
gpio_request(GPIO_FN_D2_ED2_NAF2, NULL);
gpio_request(GPIO_FN_D3_ED3_NAF3, NULL);
gpio_request(GPIO_FN_D4_ED4_NAF4, NULL);
gpio_request(GPIO_FN_D5_ED5_NAF5, NULL);
gpio_request(GPIO_FN_D6_ED6_NAF6, NULL);
gpio_request(GPIO_FN_D7_ED7_NAF7, NULL);
gpio_request(GPIO_FN_D8_ED8_NAF8, NULL);
gpio_request(GPIO_FN_D9_ED9_NAF9, NULL);
gpio_request(GPIO_FN_D10_ED10_NAF10, NULL);
gpio_request(GPIO_FN_D11_ED11_NAF11, NULL);
gpio_request(GPIO_FN_D12_ED12_NAF12, NULL);
gpio_request(GPIO_FN_D13_ED13_NAF13, NULL);
gpio_request(GPIO_FN_D14_ED14_NAF14, NULL);
gpio_request(GPIO_FN_D15_ED15_NAF15, NULL);
gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
gpio_request(GPIO_FN_FRB, NULL);
/* FOE, FCDE, FSC on dedicated pins */
__raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
sh7367_add_standard_devices();
platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));

57
arch/arm/mach-shmobile/board-g4evm.c
View File

@ -28,6 +28,8 @@
#include <linux/mtd/physmap.h>
#include <linux/usb/r8a66597.h>
#include <linux/io.h>
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/gpio.h>
#include <mach/sh7377.h>
#include <mach/common.h>
@ -128,9 +130,49 @@ static struct platform_device usb_host_device = {
.resource = usb_host_resources,
};
/* KEYSC */
static struct sh_keysc_info keysc_info = {
.mode = SH_KEYSC_MODE_5,
.scan_timing = 3,
.delay = 100,
.keycodes = {
KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, KEY_L,
KEY_M, KEY_N, KEY_U, KEY_P, KEY_Q, KEY_R,
KEY_S, KEY_T, KEY_U, KEY_V, KEY_W, KEY_X,
KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE,
KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
},
};
static struct resource keysc_resources[] = {
[0] = {
.name = "KEYSC",
.start = 0xe61b0000,
.end = 0xe61b000f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 79,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device keysc_device = {
.name = "sh_keysc",
.id = 0, /* keysc0 clock */
.num_resources = ARRAY_SIZE(keysc_resources),
.resource = keysc_resources,
.dev = {
.platform_data = &keysc_info,
},
};
static struct platform_device *g4evm_devices[] __initdata = {
&nor_flash_device,
&usb_host_device,
&keysc_device,
};
static struct map_desc g4evm_io_desc[] __initdata = {
@ -196,6 +238,21 @@ static void __init g4evm_init(void)
__raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
__raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
/* KEYSC @ CN31 */
gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT61_KEYOUT4, NULL);
gpio_request(GPIO_FN_PORT62_KEYOUT3, NULL);
gpio_request(GPIO_FN_PORT63_KEYOUT2, NULL);
gpio_request(GPIO_FN_PORT64_KEYOUT1, NULL);
gpio_request(GPIO_FN_PORT65_KEYOUT0, NULL);
gpio_request(GPIO_FN_PORT66_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_PORT67_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_PORT68_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_PORT69_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_PORT70_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL);
sh7377_add_standard_devices();
platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));

7
arch/arm/mach-shmobile/clock-sh7367.c
View File

@ -75,6 +75,11 @@ static struct clk usb0_clk = {
.name = "usb0",
};
/* a static keysc0 clk for now - enough to get sh_keysc working */
static struct clk keysc0_clk = {
.name = "keysc0",
};
static struct clk_lookup lookups[] = {
{
.clk = &peripheral_clk,
@ -82,6 +87,8 @@ static struct clk_lookup lookups[] = {
.clk = &r_clk,
}, {
.clk = &usb0_clk,
}, {
.clk = &keysc0_clk,
}
};

46
arch/arm/mach-shmobile/intc-sh7367.c
View File

@ -27,6 +27,8 @@
enum {
UNUSED_INTCA = 0,
ENABLED,
DISABLED,
/* interrupt sources INTCA */
IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
@ -46,8 +48,8 @@ enum {
MSIOF2, MSIOF1,
SCIFA4, SCIFA5, SCIFB,
FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3,
SDHI0,
SDHI1,
MSU_MSU, MSU_MSU2,
IREM,
SIU,
@ -59,7 +61,7 @@ enum {
TTI20,
MISTY,
DDM,
SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
SDHI2,
RWDT0, RWDT1,
DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
@ -70,7 +72,7 @@ enum {
/* interrupt groups INTCA */
DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2,
ETM11, ARM11, USBHS, FLCTL, IIC1, SDHI0, SDHI1, SDHI2,
ETM11, ARM11, USBHS, FLCTL, IIC1
};
static struct intc_vect intca_vectors[] = {
@ -105,10 +107,10 @@ static struct intc_vect intca_vectors[] = {
INTC_VECT(SCIFB, 0x0d60),
INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0),
INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
INTC_VECT(IREM, 0x0f60),
INTC_VECT(SIU, 0x0fa0),
@ -122,8 +124,8 @@ static struct intc_vect intca_vectors[] = {
INTC_VECT(TTI20, 0x1100),
INTC_VECT(MISTY, 0x1120),
INTC_VECT(DDM, 0x1140),
INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
@ -158,12 +160,6 @@ static struct intc_group intca_groups[] __initdata = {
INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
SDHI0_SDHI0I2, SDHI0_SDHI0I3),
INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
SDHI1_SDHI1I2, SDHI1_SDHI1I3),
INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
SDHI2_SDHI2I2, SDHI2_SDHI2I3),
};
static struct intc_mask_reg intca_mask_registers[] = {
@ -193,10 +189,10 @@ static struct intc_mask_reg intca_mask_registers[] = {
{ SCIFB, SCIFA5, SCIFA4, MSIOF1,
0, 0, MSIOF2, 0 } },
{ 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
{ SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
{ 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
{ SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
TTI20, USBDMAC_USHDMI, SPU, SIU } },
{ 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
{ CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
@ -211,7 +207,7 @@ static struct intc_mask_reg intca_mask_registers[] = {
{ 0, 0, TPU0, TPU1,
TPU2, TPU3, TPU4, 0 } },
{ 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
{ SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
MISTY, CMT3, RWDT1, RWDT0 } },
};
@ -258,10 +254,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = {
{ IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
};
static DECLARE_INTC_DESC_ACK(intca_desc, "sh7367-intca",
intca_vectors, intca_groups,
intca_mask_registers, intca_prio_registers,
intca_sense_registers, intca_ack_registers);
static struct intc_desc intca_desc __initdata = {
.name = "sh7367-intca",
.force_enable = ENABLED,
.force_disable = DISABLED,
.hw = INTC_HW_DESC(intca_vectors, intca_groups,
intca_mask_registers, intca_prio_registers,
intca_sense_registers, intca_ack_registers),
};
void __init sh7367_init_irq(void)
{

46
arch/arm/mach-shmobile/intc-sh7372.c
View File

@ -27,6 +27,8 @@
enum {
UNUSED_INTCA = 0,
ENABLED,
DISABLED,
/* interrupt sources INTCA */
IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
@ -47,14 +49,14 @@ enum {
MSIOF2, MSIOF1,
SCIFA4, SCIFA5, SCIFB,
FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2,
SDHI0,
SDHI1,
IRREM,
IRDA,
TPU0,
TTI20,
DDM,
SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
SDHI2,
RWDT0,
DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
@ -82,7 +84,7 @@ enum {
/* interrupt groups INTCA */
DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2
AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1
};
static struct intc_vect intca_vectors[] __initdata = {
@ -123,17 +125,17 @@ static struct intc_vect intca_vectors[] __initdata = {
INTC_VECT(SCIFB, 0x0d60),
INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
INTC_VECT(SDHI1_SDHI1I2, 0x0ec0),
INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
INTC_VECT(SDHI1, 0x0ec0),
INTC_VECT(IRREM, 0x0f60),
INTC_VECT(IRDA, 0x0480),
INTC_VECT(TPU0, 0x04a0),
INTC_VECT(TTI20, 0x1100),
INTC_VECT(DDM, 0x1140),
INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
INTC_VECT(RWDT0, 0x1280),
INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
@ -193,12 +195,6 @@ static struct intc_group intca_groups[] __initdata = {
INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
SDHI0_SDHI0I2, SDHI0_SDHI0I3),
INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
SDHI1_SDHI1I2),
INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
SDHI2_SDHI2I2, SDHI2_SDHI2I3),
INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
};
@ -234,10 +230,10 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = {
{ SCIFB, SCIFA5, SCIFA4, MSIOF1,
0, 0, MSIOF2, 0 } },
{ 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
{ SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
{ 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
{ 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
{ 0, DISABLED, ENABLED, ENABLED,
TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
{ 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
{ CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
@ -252,7 +248,7 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = {
{ 0, 0, TPU0, 0,
0, 0, 0, 0 } },
{ 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
{ SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
0, CMT3, 0, RWDT0 } },
{ 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
{ SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
@ -358,10 +354,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = {
{ IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
};
static DECLARE_INTC_DESC_ACK(intca_desc, "sh7372-intca",
intca_vectors, intca_groups,
intca_mask_registers, intca_prio_registers,
intca_sense_registers, intca_ack_registers);
static struct intc_desc intca_desc __initdata = {
.name = "sh7372-intca",
.force_enable = ENABLED,
.force_disable = DISABLED,
.hw = INTC_HW_DESC(intca_vectors, intca_groups,
intca_mask_registers, intca_prio_registers,
intca_sense_registers, intca_ack_registers),
};
void __init sh7372_init_irq(void)
{

36
arch/arm/mach-shmobile/intc-sh7377.c
View File

@ -27,6 +27,8 @@
enum {
UNUSED_INTCA = 0,
ENABLED,
DISABLED,
/* interrupt sources INTCA */
IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
@ -49,8 +51,8 @@ enum {
MSIOF2, MSIOF1,
SCIFA4, SCIFA5, SCIFB,
FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3,
SDHI0,
SDHI1,
MSU_MSU, MSU_MSU2,
IRREM,
MSUG,
@ -84,7 +86,7 @@ enum {
/* interrupt groups INTCA */
DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, SDHI0, SDHI1,
AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1,
ICUSB, ICUDMC
};
@ -128,10 +130,10 @@ static struct intc_vect intca_vectors[] = {
INTC_VECT(SCIFB, 0x0d60),
INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0),
INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
INTC_VECT(IRREM, 0x0f60),
INTC_VECT(MSUG, 0x0fa0),
@ -195,10 +197,6 @@ static struct intc_group intca_groups[] __initdata = {
INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
SDHI0_SDHI0I2, SDHI0_SDHI0I3),
INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
SDHI1_SDHI1I2, SDHI1_SDHI1I3),
INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1),
INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
@ -236,10 +234,10 @@ static struct intc_mask_reg intca_mask_registers[] = {
{ SCIFB, SCIFA5, SCIFA4, MSIOF1,
0, 0, MSIOF2, 0 } },
{ 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
{ SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
{ 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
{ SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
{ DISABLED, DISABLED, ENABLED, ENABLED,
TTI20, USBDMAC_USHDMI, 0, MSUG } },
{ 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
{ CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
@ -339,10 +337,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = {
{ IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
};
static DECLARE_INTC_DESC_ACK(intca_desc, "sh7377-intca",
intca_vectors, intca_groups,
intca_mask_registers, intca_prio_registers,
intca_sense_registers, intca_ack_registers);
static struct intc_desc intca_desc __initdata = {
.name = "sh7377-intca",
.force_enable = ENABLED,
.force_disable = DISABLED,
.hw = INTC_HW_DESC(intca_vectors, intca_groups,
intca_mask_registers, intca_prio_registers,
intca_sense_registers, intca_ack_registers),
};
void __init sh7377_init_irq(void)
{

2
drivers/mtd/nand/Kconfig
View File

@ -457,7 +457,7 @@ config MTD_NAND_NOMADIK
config MTD_NAND_SH_FLCTL
tristate "Support for NAND on Renesas SuperH FLCTL"
depends on MTD_NAND && SUPERH
depends on MTD_NAND && (SUPERH || ARCH_SHMOBILE)
help
Several Renesas SuperH CPU has FLCTL. This option enables support
for NAND Flash using FLCTL.

2
drivers/video/Kconfig
View File

@ -1881,7 +1881,7 @@ config FB_W100
config FB_SH_MOBILE_LCDC
tristate "SuperH Mobile LCDC framebuffer support"
depends on FB && SUPERH && HAVE_CLK
depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT

31
drivers/video/amba-clcd.c
View File

@ -65,16 +65,16 @@ static void clcdfb_disable(struct clcd_fb *fb)
if (fb->board->disable)
fb->board->disable(fb);
val = readl(fb->regs + CLCD_CNTL);
val = readl(fb->regs + fb->off_cntl);
if (val & CNTL_LCDPWR) {
val &= ~CNTL_LCDPWR;
writel(val, fb->regs + CLCD_CNTL);
writel(val, fb->regs + fb->off_cntl);
clcdfb_sleep(20);
}
if (val & CNTL_LCDEN) {
val &= ~CNTL_LCDEN;
writel(val, fb->regs + CLCD_CNTL);
writel(val, fb->regs + fb->off_cntl);
}
/*
@ -94,7 +94,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
* Bring up by first enabling..
*/
cntl |= CNTL_LCDEN;
writel(cntl, fb->regs + CLCD_CNTL);
writel(cntl, fb->regs + fb->off_cntl);
clcdfb_sleep(20);
@ -102,7 +102,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
* and now apply power.
*/
cntl |= CNTL_LCDPWR;
writel(cntl, fb->regs + CLCD_CNTL);
writel(cntl, fb->regs + fb->off_cntl);
/*
* finally, enable the interface.
@ -233,7 +233,7 @@ static int clcdfb_set_par(struct fb_info *info)
readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL));
readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
#endif
return 0;
@ -345,6 +345,23 @@ static int clcdfb_register(struct clcd_fb *fb)
{
int ret;
/*
* ARM PL111 always has IENB at 0x1c; it's only PL110
* which is reversed on some platforms.
*/
if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
fb->off_ienb = CLCD_PL111_IENB;
fb->off_cntl = CLCD_PL111_CNTL;
} else {
#ifdef CONFIG_ARCH_VERSATILE
fb->off_ienb = CLCD_PL111_IENB;
fb->off_cntl = CLCD_PL111_CNTL;
#else
fb->off_ienb = CLCD_PL110_IENB;
fb->off_cntl = CLCD_PL110_CNTL;
#endif
}
fb->clk = clk_get(&fb->dev->dev, NULL);
if (IS_ERR(fb->clk)) {
ret = PTR_ERR(fb->clk);
@ -416,7 +433,7 @@ static int clcdfb_register(struct clcd_fb *fb)
/*
* Ensure interrupts are disabled.
*/
writel(0, fb->regs + CLCD_IENB);
writel(0, fb->regs + fb->off_ienb);
fb_set_var(&fb->fb, &fb->fb.var);

31
include/linux/amba/clcd.h
View File

@ -21,22 +21,21 @@
#define CLCD_UBAS 0x00000010
#define CLCD_LBAS 0x00000014
#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
#define CLCD_IENB 0x00000018
#define CLCD_CNTL 0x0000001c
#else
/*
* Someone rearranged these two registers on the Versatile
* platform...
*/
#define CLCD_IENB 0x0000001c
#define CLCD_CNTL 0x00000018
#endif
#define CLCD_PL110_IENB 0x00000018
#define CLCD_PL110_CNTL 0x0000001c
#define CLCD_PL110_STAT 0x00000020
#define CLCD_PL110_INTR 0x00000024
#define CLCD_PL110_UCUR 0x00000028
#define CLCD_PL110_LCUR 0x0000002C
#define CLCD_PL111_CNTL 0x00000018
#define CLCD_PL111_IENB 0x0000001c
#define CLCD_PL111_RIS 0x00000020
#define CLCD_PL111_MIS 0x00000024
#define CLCD_PL111_ICR 0x00000028
#define CLCD_PL111_UCUR 0x0000002c
#define CLCD_PL111_LCUR 0x00000030
#define CLCD_STAT 0x00000020
#define CLCD_INTR 0x00000024
#define CLCD_UCUR 0x00000028
#define CLCD_LCUR 0x0000002C
#define CLCD_PALL 0x00000200
#define CLCD_PALETTE 0x00000200
@ -147,6 +146,8 @@ struct clcd_fb {
struct clcd_board *board;
void *board_data;
void __iomem *regs;
u16 off_ienb;
u16 off_cntl;
u32 clcd_cntl;
u32 cmap[16];
};