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iop: unconditionally initialize the ATU on platforms known to be 'hosts'
Platforms like iq80321 and iq80331 which may be host-bus-adapters require 'iop3xx_init_atu=y' to be specified on the kernel command line. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -34,14 +34,6 @@ config MACH_N2100
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Say Y here if you want to run your kernel on the Thecus n2100
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Say Y here if you want to run your kernel on the Thecus n2100
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NAS appliance.
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NAS appliance.
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config IOP3XX_ATU
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bool "Enable the PCI Controller"
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default y
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help
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Say Y here if you want the IOP to initialize its PCI Controller.
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Say N if the IOP is an add in card, the host system owns the PCI
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bus in this case.
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config MACH_EM7210
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config MACH_EM7210
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bool "Enable support for the Lanner EM7210"
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bool "Enable support for the Lanner EM7210"
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help
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help
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@ -178,10 +178,9 @@ static struct hw_pci iq31244_pci __initdata = {
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static int __init iq31244_pci_init(void)
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static int __init iq31244_pci_init(void)
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{
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{
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if (is_ep80219()) {
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if (is_ep80219())
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if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE)
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pci_common_init(&ep80219_pci);
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pci_common_init(&ep80219_pci);
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else if (machine_is_iq31244()) {
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} else if (machine_is_iq31244()) {
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if (is_80219()) {
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if (is_80219()) {
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printk("note: iq31244 board type has been selected\n");
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printk("note: iq31244 board type has been selected\n");
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printk("note: to select ep80219 operation:\n");
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printk("note: to select ep80219 operation:\n");
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@ -190,9 +189,7 @@ static int __init iq31244_pci_init(void)
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printk("\t2/ update boot loader to pass"
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printk("\t2/ update boot loader to pass"
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" the ep80219 id: %d\n", MACH_TYPE_EP80219);
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" the ep80219 id: %d\n", MACH_TYPE_EP80219);
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}
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}
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pci_common_init(&iq31244_pci);
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if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE)
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pci_common_init(&iq31244_pci);
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}
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}
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return 0;
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return 0;
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@ -106,7 +106,7 @@ static struct hw_pci iq80321_pci __initdata = {
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.swizzle = pci_std_swizzle,
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.swizzle = pci_std_swizzle,
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.nr_controllers = 1,
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.nr_controllers = 1,
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.setup = iop3xx_pci_setup,
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.setup = iop3xx_pci_setup,
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.preinit = iop3xx_pci_preinit,
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.preinit = iop3xx_pci_preinit_cond,
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.scan = iop3xx_pci_scan_bus,
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.scan = iop3xx_pci_scan_bus,
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.map_irq = iq80321_pci_map_irq,
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.map_irq = iq80321_pci_map_irq,
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};
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};
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@ -16,14 +16,6 @@ config MACH_IQ80332
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Say Y here if you want to run your kernel on the Intel IQ80332
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Say Y here if you want to run your kernel on the Intel IQ80332
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evaluation kit for the IOP332 chipset.
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evaluation kit for the IOP332 chipset.
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config IOP3XX_ATU
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bool "Enable the PCI Controller"
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default y
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help
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Say Y here if you want the IOP to initialize its PCI Controller.
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Say N if the IOP is an add in card, the host system owns the PCI
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bus in this case.
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endmenu
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endmenu
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endif
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endif
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@ -89,7 +89,7 @@ static struct hw_pci iq80331_pci __initdata = {
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.swizzle = pci_std_swizzle,
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.swizzle = pci_std_swizzle,
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.nr_controllers = 1,
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.nr_controllers = 1,
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.setup = iop3xx_pci_setup,
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.setup = iop3xx_pci_setup,
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.preinit = iop3xx_pci_preinit,
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.preinit = iop3xx_pci_preinit_cond,
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.scan = iop3xx_pci_scan_bus,
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.scan = iop3xx_pci_scan_bus,
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.map_irq = iq80331_pci_map_irq,
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.map_irq = iq80331_pci_map_irq,
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};
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};
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@ -89,7 +89,7 @@ static struct hw_pci iq80332_pci __initdata = {
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.swizzle = pci_std_swizzle,
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.swizzle = pci_std_swizzle,
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.nr_controllers = 1,
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.nr_controllers = 1,
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.setup = iop3xx_pci_setup,
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.setup = iop3xx_pci_setup,
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.preinit = iop3xx_pci_preinit,
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.preinit = iop3xx_pci_preinit_cond,
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.scan = iop3xx_pci_scan_bus,
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.scan = iop3xx_pci_scan_bus,
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.map_irq = iq80332_pci_map_irq,
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.map_irq = iq80332_pci_map_irq,
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};
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};
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@ -24,6 +24,7 @@
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#include <asm/hardware.h>
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#include <asm/hardware.h>
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#include <asm/mach/pci.h>
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#include <asm/mach/pci.h>
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#include <asm/hardware/iop3xx.h>
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#include <asm/hardware/iop3xx.h>
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#include <asm/mach-types.h>
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// #define DEBUG
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// #define DEBUG
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@ -325,13 +326,16 @@ void __init iop3xx_atu_disable(void)
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/* Flag to determine whether the ATU is initialized and the PCI bus scanned */
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/* Flag to determine whether the ATU is initialized and the PCI bus scanned */
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int init_atu;
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int init_atu;
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void __init iop3xx_pci_preinit(void)
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int iop3xx_get_init_atu(void) {
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{
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/* check if default has been overridden */
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if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) {
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if (init_atu != IOP3XX_INIT_ATU_DEFAULT)
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iop3xx_atu_disable();
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return init_atu;
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iop3xx_atu_setup();
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else
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}
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return IOP3XX_INIT_ATU_DISABLE;
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}
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static void __init iop3xx_atu_debug(void)
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{
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DBG("PCI: Intel IOP3xx PCI init.\n");
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DBG("PCI: Intel IOP3xx PCI init.\n");
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DBG("PCI: Outbound memory window 0: PCI 0x%08x%08x\n",
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DBG("PCI: Outbound memory window 0: PCI 0x%08x%08x\n",
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*IOP3XX_OUMWTVR0, *IOP3XX_OMWTVR0);
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*IOP3XX_OUMWTVR0, *IOP3XX_OMWTVR0);
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@ -358,6 +362,23 @@ void __init iop3xx_pci_preinit(void)
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hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort");
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hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort");
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}
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}
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/* for platforms that might be host-bus-adapters */
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void __init iop3xx_pci_preinit_cond(void)
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{
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if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) {
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iop3xx_atu_disable();
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iop3xx_atu_setup();
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iop3xx_atu_debug();
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}
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}
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void __init iop3xx_pci_preinit(void)
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{
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iop3xx_atu_disable();
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iop3xx_atu_setup();
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iop3xx_atu_debug();
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}
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/* allow init_atu to be user overridden */
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/* allow init_atu to be user overridden */
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static int __init iop3xx_init_atu_setup(char *str)
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static int __init iop3xx_init_atu_setup(char *str)
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{
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{
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@ -29,6 +29,7 @@ extern void gpio_line_config(int line, int direction);
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extern int gpio_line_get(int line);
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extern int gpio_line_get(int line);
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extern void gpio_line_set(int line, int value);
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extern void gpio_line_set(int line, int value);
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extern int init_atu;
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extern int init_atu;
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extern int iop3xx_get_init_atu(void);
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#endif
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#endif
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@ -112,14 +113,6 @@ extern int init_atu;
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#define IOP3XX_INIT_ATU_DISABLE -1
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#define IOP3XX_INIT_ATU_DISABLE -1
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#define IOP3XX_INIT_ATU_ENABLE 1
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#define IOP3XX_INIT_ATU_ENABLE 1
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#ifdef CONFIG_IOP3XX_ATU
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#define iop3xx_get_init_atu(x) (init_atu == IOP3XX_INIT_ATU_DEFAULT ?\
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IOP3XX_INIT_ATU_ENABLE : init_atu)
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#else
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#define iop3xx_get_init_atu(x) (init_atu == IOP3XX_INIT_ATU_DEFAULT ?\
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IOP3XX_INIT_ATU_DISABLE : init_atu)
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#endif
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/* Messaging Unit */
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/* Messaging Unit */
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#define IOP3XX_IMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0310)
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#define IOP3XX_IMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0310)
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#define IOP3XX_IMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0314)
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#define IOP3XX_IMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0314)
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@ -55,6 +55,7 @@ void pci_common_init(struct hw_pci *);
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extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
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extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
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extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *);
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extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *);
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extern void iop3xx_pci_preinit(void);
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extern void iop3xx_pci_preinit(void);
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extern void iop3xx_pci_preinit_cond(void);
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extern int dc21285_setup(int nr, struct pci_sys_data *);
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extern int dc21285_setup(int nr, struct pci_sys_data *);
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extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *);
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extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *);
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