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crypto: sahara - replace tasklets with kthread
In preparation for SHA support, replace the tasklets with a kthread that manages one crypto_queue for the core. As the Sahara can only process one AES or SHA request at a time, we make sure that the queue serializes all requests from userspace. Instead of a watchdog timer we now use a completion mechanism in the queue manager thread. This makes the control flow more obvious and guarantees, that only one request is dequeued until the completion is completed. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
parent
5ed903b3f5
commit
c0c3c89ae3
@ -22,7 +22,9 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/kthread.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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@ -38,7 +40,6 @@
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#define FLAGS_ENCRYPT BIT(0)
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#define FLAGS_ENCRYPT BIT(0)
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#define FLAGS_CBC BIT(1)
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#define FLAGS_CBC BIT(1)
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#define FLAGS_NEW_KEY BIT(3)
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#define FLAGS_NEW_KEY BIT(3)
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#define FLAGS_BUSY 4
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#define SAHARA_HDR_BASE 0x00800000
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#define SAHARA_HDR_BASE 0x00800000
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#define SAHARA_HDR_SKHA_ALG_AES 0
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#define SAHARA_HDR_SKHA_ALG_AES 0
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@ -119,7 +120,6 @@ struct sahara_hw_link {
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};
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};
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struct sahara_ctx {
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struct sahara_ctx {
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struct sahara_dev *dev;
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unsigned long flags;
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unsigned long flags;
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int keylen;
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int keylen;
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u8 key[AES_KEYSIZE_128];
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u8 key[AES_KEYSIZE_128];
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@ -136,15 +136,15 @@ struct sahara_dev {
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void __iomem *regs_base;
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void __iomem *regs_base;
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struct clk *clk_ipg;
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struct clk *clk_ipg;
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struct clk *clk_ahb;
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struct clk *clk_ahb;
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struct mutex queue_mutex;
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struct task_struct *kthread;
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struct completion dma_completion;
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struct sahara_ctx *ctx;
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struct sahara_ctx *ctx;
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spinlock_t lock;
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spinlock_t lock;
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struct crypto_queue queue;
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struct crypto_queue queue;
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unsigned long flags;
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unsigned long flags;
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struct tasklet_struct done_task;
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struct tasklet_struct queue_task;
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struct sahara_hw_desc *hw_desc[SAHARA_MAX_HW_DESC];
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struct sahara_hw_desc *hw_desc[SAHARA_MAX_HW_DESC];
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dma_addr_t hw_phys_desc[SAHARA_MAX_HW_DESC];
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dma_addr_t hw_phys_desc[SAHARA_MAX_HW_DESC];
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@ -157,7 +157,6 @@ struct sahara_dev {
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struct sahara_hw_link *hw_link[SAHARA_MAX_HW_LINK];
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struct sahara_hw_link *hw_link[SAHARA_MAX_HW_LINK];
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dma_addr_t hw_phys_link[SAHARA_MAX_HW_LINK];
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dma_addr_t hw_phys_link[SAHARA_MAX_HW_LINK];
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struct ablkcipher_request *req;
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size_t total;
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size_t total;
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struct scatterlist *in_sg;
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struct scatterlist *in_sg;
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unsigned int nb_in_sg;
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unsigned int nb_in_sg;
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@ -165,7 +164,6 @@ struct sahara_dev {
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unsigned int nb_out_sg;
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unsigned int nb_out_sg;
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u32 error;
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u32 error;
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struct timer_list watchdog;
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};
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};
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static struct sahara_dev *dev_ptr;
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static struct sahara_dev *dev_ptr;
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@ -404,34 +402,6 @@ static void sahara_dump_links(struct sahara_dev *dev)
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dev_dbg(dev->device, "\n");
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dev_dbg(dev->device, "\n");
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}
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}
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static void sahara_aes_done_task(unsigned long data)
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{
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struct sahara_dev *dev = (struct sahara_dev *)data;
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dma_unmap_sg(dev->device, dev->out_sg, dev->nb_out_sg,
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DMA_TO_DEVICE);
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dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg,
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DMA_FROM_DEVICE);
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spin_lock(&dev->lock);
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clear_bit(FLAGS_BUSY, &dev->flags);
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spin_unlock(&dev->lock);
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dev->req->base.complete(&dev->req->base, dev->error);
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}
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static void sahara_watchdog(unsigned long data)
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{
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struct sahara_dev *dev = (struct sahara_dev *)data;
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unsigned int err = sahara_read(dev, SAHARA_REG_ERRSTATUS);
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unsigned int stat = sahara_read(dev, SAHARA_REG_STATUS);
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sahara_decode_status(dev, stat);
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sahara_decode_error(dev, err);
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dev->error = -ETIMEDOUT;
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sahara_aes_done_task(data);
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}
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static int sahara_hw_descriptor_create(struct sahara_dev *dev)
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static int sahara_hw_descriptor_create(struct sahara_dev *dev)
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{
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{
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struct sahara_ctx *ctx = dev->ctx;
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struct sahara_ctx *ctx = dev->ctx;
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@ -515,9 +485,6 @@ static int sahara_hw_descriptor_create(struct sahara_dev *dev)
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sahara_dump_descriptors(dev);
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sahara_dump_descriptors(dev);
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sahara_dump_links(dev);
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sahara_dump_links(dev);
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/* Start processing descriptor chain. */
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mod_timer(&dev->watchdog,
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jiffies + msecs_to_jiffies(SAHARA_TIMEOUT_MS));
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sahara_write(dev, dev->hw_phys_desc[0], SAHARA_REG_DAR);
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sahara_write(dev, dev->hw_phys_desc[0], SAHARA_REG_DAR);
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return 0;
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return 0;
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@ -532,37 +499,19 @@ unmap_in:
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return -EINVAL;
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return -EINVAL;
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}
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}
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static void sahara_aes_queue_task(unsigned long data)
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static int sahara_aes_process(struct ablkcipher_request *req)
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{
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{
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struct sahara_dev *dev = (struct sahara_dev *)data;
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struct sahara_dev *dev = dev_ptr;
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struct crypto_async_request *async_req, *backlog;
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struct sahara_ctx *ctx;
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struct sahara_ctx *ctx;
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struct sahara_aes_reqctx *rctx;
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struct sahara_aes_reqctx *rctx;
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struct ablkcipher_request *req;
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int ret;
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int ret;
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spin_lock(&dev->lock);
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backlog = crypto_get_backlog(&dev->queue);
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async_req = crypto_dequeue_request(&dev->queue);
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if (!async_req)
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clear_bit(FLAGS_BUSY, &dev->flags);
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spin_unlock(&dev->lock);
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if (!async_req)
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return;
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if (backlog)
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backlog->complete(backlog, -EINPROGRESS);
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req = ablkcipher_request_cast(async_req);
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/* Request is ready to be dispatched by the device */
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/* Request is ready to be dispatched by the device */
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dev_dbg(dev->device,
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dev_dbg(dev->device,
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"dispatch request (nbytes=%d, src=%p, dst=%p)\n",
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"dispatch request (nbytes=%d, src=%p, dst=%p)\n",
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req->nbytes, req->src, req->dst);
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req->nbytes, req->src, req->dst);
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/* assign new request to device */
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/* assign new request to device */
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dev->req = req;
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dev->total = req->nbytes;
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dev->total = req->nbytes;
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dev->in_sg = req->src;
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dev->in_sg = req->src;
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dev->out_sg = req->dst;
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dev->out_sg = req->dst;
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@ -576,16 +525,25 @@ static void sahara_aes_queue_task(unsigned long data)
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memcpy(dev->iv_base, req->info, AES_KEYSIZE_128);
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memcpy(dev->iv_base, req->info, AES_KEYSIZE_128);
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/* assign new context to device */
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/* assign new context to device */
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ctx->dev = dev;
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dev->ctx = ctx;
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dev->ctx = ctx;
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reinit_completion(&dev->dma_completion);
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ret = sahara_hw_descriptor_create(dev);
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ret = sahara_hw_descriptor_create(dev);
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if (ret < 0) {
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spin_lock(&dev->lock);
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ret = wait_for_completion_timeout(&dev->dma_completion,
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clear_bit(FLAGS_BUSY, &dev->flags);
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msecs_to_jiffies(SAHARA_TIMEOUT_MS));
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spin_unlock(&dev->lock);
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if (!ret) {
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dev->req->base.complete(&dev->req->base, ret);
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dev_err(dev->device, "AES timeout\n");
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return -ETIMEDOUT;
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}
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}
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dma_unmap_sg(dev->device, dev->out_sg, dev->nb_out_sg,
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DMA_TO_DEVICE);
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dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg,
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DMA_FROM_DEVICE);
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return 0;
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}
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}
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static int sahara_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
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static int sahara_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
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@ -627,12 +585,9 @@ static int sahara_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
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static int sahara_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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static int sahara_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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{
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{
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struct sahara_ctx *ctx = crypto_ablkcipher_ctx(
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crypto_ablkcipher_reqtfm(req));
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struct sahara_aes_reqctx *rctx = ablkcipher_request_ctx(req);
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struct sahara_aes_reqctx *rctx = ablkcipher_request_ctx(req);
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struct sahara_dev *dev = dev_ptr;
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struct sahara_dev *dev = dev_ptr;
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int err = 0;
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int err = 0;
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int busy;
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dev_dbg(dev->device, "nbytes: %d, enc: %d, cbc: %d\n",
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dev_dbg(dev->device, "nbytes: %d, enc: %d, cbc: %d\n",
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req->nbytes, !!(mode & FLAGS_ENCRYPT), !!(mode & FLAGS_CBC));
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req->nbytes, !!(mode & FLAGS_ENCRYPT), !!(mode & FLAGS_CBC));
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@ -643,16 +598,13 @@ static int sahara_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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return -EINVAL;
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return -EINVAL;
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}
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}
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ctx->dev = dev;
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rctx->mode = mode;
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rctx->mode = mode;
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spin_lock_bh(&dev->lock);
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err = ablkcipher_enqueue_request(&dev->queue, req);
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busy = test_and_set_bit(FLAGS_BUSY, &dev->flags);
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spin_unlock_bh(&dev->lock);
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if (!busy)
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mutex_lock(&dev->queue_mutex);
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tasklet_schedule(&dev->queue_task);
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err = ablkcipher_enqueue_request(&dev->queue, req);
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mutex_unlock(&dev->queue_mutex);
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wake_up_process(dev->kthread);
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return err;
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return err;
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}
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}
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@ -755,6 +707,36 @@ static void sahara_aes_cra_exit(struct crypto_tfm *tfm)
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ctx->fallback = NULL;
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ctx->fallback = NULL;
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}
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}
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static int sahara_queue_manage(void *data)
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{
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struct sahara_dev *dev = (struct sahara_dev *)data;
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struct crypto_async_request *async_req;
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int ret = 0;
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do {
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__set_current_state(TASK_INTERRUPTIBLE);
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mutex_lock(&dev->queue_mutex);
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async_req = crypto_dequeue_request(&dev->queue);
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mutex_unlock(&dev->queue_mutex);
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if (async_req) {
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struct ablkcipher_request *req =
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ablkcipher_request_cast(async_req);
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ret = sahara_aes_process(req);
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async_req->complete(async_req, ret);
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continue;
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}
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schedule();
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} while (!kthread_should_stop());
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return 0;
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}
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static struct crypto_alg aes_algs[] = {
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static struct crypto_alg aes_algs[] = {
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{
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{
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.cra_name = "ecb(aes)",
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.cra_name = "ecb(aes)",
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@ -806,8 +788,6 @@ static irqreturn_t sahara_irq_handler(int irq, void *data)
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unsigned int stat = sahara_read(dev, SAHARA_REG_STATUS);
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unsigned int stat = sahara_read(dev, SAHARA_REG_STATUS);
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unsigned int err = sahara_read(dev, SAHARA_REG_ERRSTATUS);
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unsigned int err = sahara_read(dev, SAHARA_REG_ERRSTATUS);
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del_timer(&dev->watchdog);
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sahara_write(dev, SAHARA_CMD_CLEAR_INT | SAHARA_CMD_CLEAR_ERR,
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sahara_write(dev, SAHARA_CMD_CLEAR_INT | SAHARA_CMD_CLEAR_ERR,
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SAHARA_REG_CMD);
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SAHARA_REG_CMD);
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@ -822,7 +802,7 @@ static irqreturn_t sahara_irq_handler(int irq, void *data)
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dev->error = -EINVAL;
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dev->error = -EINVAL;
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}
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}
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tasklet_schedule(&dev->done_task);
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complete(&dev->dma_completion);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@ -961,17 +941,17 @@ static int sahara_probe(struct platform_device *pdev)
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crypto_init_queue(&dev->queue, SAHARA_QUEUE_LENGTH);
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crypto_init_queue(&dev->queue, SAHARA_QUEUE_LENGTH);
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spin_lock_init(&dev->lock);
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spin_lock_init(&dev->lock);
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mutex_init(&dev->queue_mutex);
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dev_ptr = dev;
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dev_ptr = dev;
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tasklet_init(&dev->queue_task, sahara_aes_queue_task,
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dev->kthread = kthread_run(sahara_queue_manage, dev, "sahara_crypto");
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(unsigned long)dev);
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if (IS_ERR(dev->kthread)) {
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tasklet_init(&dev->done_task, sahara_aes_done_task,
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err = PTR_ERR(dev->kthread);
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(unsigned long)dev);
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goto err_link;
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}
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init_timer(&dev->watchdog);
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init_completion(&dev->dma_completion);
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dev->watchdog.function = &sahara_watchdog;
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dev->watchdog.data = (unsigned long)dev;
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clk_prepare_enable(dev->clk_ipg);
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clk_prepare_enable(dev->clk_ipg);
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clk_prepare_enable(dev->clk_ahb);
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clk_prepare_enable(dev->clk_ahb);
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@ -1016,6 +996,7 @@ err_algs:
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dev->hw_link[0], dev->hw_phys_link[0]);
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dev->hw_link[0], dev->hw_phys_link[0]);
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clk_disable_unprepare(dev->clk_ipg);
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clk_disable_unprepare(dev->clk_ipg);
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clk_disable_unprepare(dev->clk_ahb);
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clk_disable_unprepare(dev->clk_ahb);
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kthread_stop(dev->kthread);
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dev_ptr = NULL;
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dev_ptr = NULL;
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err_link:
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err_link:
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dma_free_coherent(&pdev->dev,
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dma_free_coherent(&pdev->dev,
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@ -1043,8 +1024,7 @@ static int sahara_remove(struct platform_device *pdev)
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SAHARA_MAX_HW_DESC * sizeof(struct sahara_hw_desc),
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SAHARA_MAX_HW_DESC * sizeof(struct sahara_hw_desc),
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dev->hw_desc[0], dev->hw_phys_desc[0]);
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dev->hw_desc[0], dev->hw_phys_desc[0]);
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tasklet_kill(&dev->done_task);
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kthread_stop(dev->kthread);
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tasklet_kill(&dev->queue_task);
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sahara_unregister_algs(dev);
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sahara_unregister_algs(dev);
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