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phy: phy-mt65xx-usb3: disable 100uA extraction from SS port to HS port
There will be a problem if SS port is diasbled and HS port extracts 100uA from SS port, so disable extract 100uA from SS port in the case, when disable it, PA0_RG_USB20_INTR_EN should be set, otherwise HS port only works on LS. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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@ -46,6 +46,7 @@
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#define U3P_USBPHYACR0 0x000
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#define PA0_RG_U2PLL_FORCE_ON BIT(15)
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#define PA0_RG_USB20_INTR_EN BIT(5)
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#define U3P_USBPHYACR2 0x008
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#define PA2_RG_SIF_U2PLL_FORCE_EN BIT(18)
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@ -339,6 +340,15 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy,
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tmp &= ~P2C_RG_UART_EN;
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writel(tmp, com + U3P_U2PHYDTM1);
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tmp = readl(com + U3P_USBPHYACR0);
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tmp |= PA0_RG_USB20_INTR_EN;
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writel(tmp, com + U3P_USBPHYACR0);
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/* disable switch 100uA current to SSUSB */
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tmp = readl(com + U3P_USBPHYACR5);
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tmp &= ~PA5_RG_U2_HS_100U_U3_EN;
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writel(tmp, com + U3P_USBPHYACR5);
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if (!index) {
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tmp = readl(com + U3P_U2PHYACR4);
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tmp &= ~P2C_U2_GPIO_CTR_MSK;
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@ -393,13 +403,6 @@ static void phy_instance_power_on(struct mt65xx_u3phy *u3phy,
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tmp |= PA6_RG_U2_OTG_VBUSCMP_EN;
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writel(tmp, com + U3P_USBPHYACR6);
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if (!index) {
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/* switch 100uA current to SSUSB */
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tmp = readl(com + U3P_USBPHYACR5);
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tmp |= PA5_RG_U2_HS_100U_U3_EN;
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writel(tmp, com + U3P_USBPHYACR5);
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}
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tmp = readl(com + U3P_U2PHYDTM1);
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tmp |= P2C_RG_VBUSVALID | P2C_RG_AVALID;
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tmp &= ~P2C_RG_SESSEND;
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@ -435,13 +438,6 @@ static void phy_instance_power_off(struct mt65xx_u3phy *u3phy,
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tmp &= ~PA6_RG_U2_OTG_VBUSCMP_EN;
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writel(tmp, com + U3P_USBPHYACR6);
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if (!index) {
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/* switch 100uA current back to USB2.0 */
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tmp = readl(com + U3P_USBPHYACR5);
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tmp &= ~PA5_RG_U2_HS_100U_U3_EN;
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writel(tmp, com + U3P_USBPHYACR5);
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}
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/* let suspendm=0, set utmi into analog power down */
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tmp = readl(com + U3P_U2PHYDTM0);
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tmp &= ~P2C_RG_SUSPENDM;
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