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Merge branch 'msm/cleanup' into next/cleanup

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From David Brown <davidb@codeaurora.org>:
* msm/cleanup:
  ARM: msm: Only compile io.c on platforms that use it
  iommu/msm: Move mach includes to iommu directory
  ARM: msm: Remove devices-iommu.c
  ARM: msm: Move mach/board.h contents to common.h
  ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE
  ARM: msm: Remove TMR and TMR0 static mappings
  ARM: msm: Move debug-macro.S to include/debug
  ARM: msm: Don't compile __msm_ioremap_caller() unless used
  ARM: msm: Remove unused and unmapped MSM_TLMM_BASE for 8x60

Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
Kevin Hilman 2013-08-13 15:12:02 -07:00
commit bee22087fa
29 changed files with 93 additions and 1219 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
View File

@ -630,6 +630,7 @@ config ARCH_MSM
bool "Qualcomm MSM"
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_OF if OF
select COMMON_CLK
select GENERIC_CLOCKEVENTS
help

9
arch/arm/Kconfig.debug
View File

@ -777,6 +777,11 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX6SL_UART
default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \
DEBUG_KEYSTONE_UART1
default "debug/msm.S" if DEBUG_MSM_UART1 || \
DEBUG_MSM_UART2 || \
DEBUG_MSM_UART3 || \
DEBUG_MSM8660_UART || \
DEBUG_MSM8960_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART || \
DEBUG_MVEBU_UART_ALTERNATE
default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART
@ -804,13 +809,13 @@ config DEBUG_LL_INCLUDE
config DEBUG_UNCOMPRESS
bool
default y if ARCH_MULTIPLATFORM && DEBUG_LL && \
default y if (ARCH_MULTIPLATFORM || ARCH_MSM) && DEBUG_LL && \
!DEBUG_OMAP2PLUS_UART && \
!DEBUG_TEGRA_UART
config UNCOMPRESS_INCLUDE
string
default "debug/uncompress.h" if ARCH_MULTIPLATFORM
default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM
default "mach/uncompress.h"
config EARLY_PRINTK

32
arch/arm/mach-msm/include/mach/debug-macro.S → arch/arm/include/debug/msm.S
View File

@ -15,8 +15,36 @@
*
*/
#include <mach/hardware.h>
#include <mach/msm_iomap.h>
#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_QSD8X50)
#define MSM_UART1_PHYS 0xA9A00000
#define MSM_UART2_PHYS 0xA9B00000
#define MSM_UART3_PHYS 0xA9C00000
#elif defined(CONFIG_ARCH_MSM7X30)
#define MSM_UART1_PHYS 0xACA00000
#define MSM_UART2_PHYS 0xACB00000
#define MSM_UART3_PHYS 0xACC00000
#endif
#if defined(CONFIG_DEBUG_MSM_UART1)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART2)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART3)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
#endif
#ifdef CONFIG_DEBUG_MSM8660_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x19C40000
#endif
#ifdef CONFIG_DEBUG_MSM8960_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x16440000
#endif
.macro addruart, rp, rv, tmp
#ifdef MSM_DEBUG_UART_PHYS

9
arch/arm/mach-msm/Makefile
View File

@ -1,17 +1,16 @@
obj-y += io.o timer.o
obj-y += timer.o
obj-y += clock.o
obj-$(CONFIG_MSM_VIC) += irq-vic.o
obj-$(CONFIG_MSM_IOMMU) += devices-iommu.o
obj-$(CONFIG_ARCH_MSM7X00A) += irq.o
obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o
obj-$(CONFIG_ARCH_MSM7X00A) += dma.o
obj-$(CONFIG_ARCH_MSM7X30) += dma.o
obj-$(CONFIG_ARCH_QSD8X50) += dma.o
obj-$(CONFIG_ARCH_MSM7X00A) += dma.o io.o
obj-$(CONFIG_ARCH_MSM7X30) += dma.o io.o
obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o
obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
obj-$(CONFIG_MSM_SMD) += last_radio_log.o

4
arch/arm/mach-msm/board-dt-8660.c
View File

@ -15,8 +15,8 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/board.h>
#include "common.h"
static void __init msm8x60_init_late(void)
@ -42,9 +42,7 @@ static const char *msm8x60_fluid_match[] __initdata = {
DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8x60_io,
.init_machine = msm8x60_dt_init,
.init_late = msm8x60_init_late,
.init_time = msm_dt_timer_init,
.dt_compat = msm8x60_fluid_match,
MACHINE_END

3
arch/arm/mach-msm/board-dt-8960.c
View File

@ -14,6 +14,7 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "common.h"
@ -29,8 +30,6 @@ static const char * const msm8960_dt_match[] __initconst = {
DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8960_io,
.init_time = msm_dt_timer_init,
.init_machine = msm_dt_init,
.dt_compat = msm8960_dt_match,
MACHINE_END

1
arch/arm/mach-msm/board-halibut.c
View File

@ -29,7 +29,6 @@
#include <asm/setup.h>
#include <mach/irqs.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <linux/mtd/nand.h>

2
arch/arm/mach-msm/board-mahimahi.c
View File

@ -28,12 +28,12 @@
#include <asm/mach/map.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/hardware.h>
#include "board-mahimahi.h"
#include "devices.h"
#include "proc_comm.h"
#include "common.h"
static uint debug_uart;

1
arch/arm/mach-msm/board-msm7x30.c
View File

@ -30,7 +30,6 @@
#include <asm/memory.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>

1
arch/arm/mach-msm/board-qsd8x50.c
View File

@ -28,7 +28,6 @@
#include <asm/io.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/irqs.h>
#include <mach/sirc.h>
#include <mach/vreg.h>

2
arch/arm/mach-msm/board-sapphire.c
View File

@ -28,7 +28,6 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/vreg.h>
#include <mach/board.h>
#include <asm/io.h>
#include <asm/delay.h>
@ -41,6 +40,7 @@
#include "board-sapphire.h"
#include "proc_comm.h"
#include "devices.h"
#include "common.h"
void msm_init_irq(void);
void msm_init_gpio(void);

1
arch/arm/mach-msm/board-trout.c
View File

@ -25,7 +25,6 @@
#include <asm/mach/map.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/hardware.h>
#include <mach/msm_iomap.h>

2
arch/arm/mach-msm/board-trout.h
View File

@ -4,7 +4,7 @@
#ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H
#define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H
#include <mach/board.h>
#include "common.h"
#define MSM_SMI_BASE 0x00000000
#define MSM_SMI_SIZE 0x00800000

18
arch/arm/mach-msm/common.h
View File

@ -14,13 +14,10 @@
extern void msm7x01_timer_init(void);
extern void msm7x30_timer_init(void);
extern void msm_dt_timer_init(void);
extern void qsd8x50_timer_init(void);
extern void msm_map_common_io(void);
extern void msm_map_msm7x30_io(void);
extern void msm_map_msm8x60_io(void);
extern void msm_map_msm8960_io(void);
extern void msm_map_qsd8x50_io(void);
extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
@ -29,4 +26,19 @@ extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
extern struct smp_operations msm_smp_ops;
extern void msm_cpu_die(unsigned int cpu);
struct msm_mmc_platform_data;
extern void msm_add_devices(void);
extern void msm_init_irq(void);
extern void msm_init_gpio(void);
extern int msm_add_sdcc(unsigned int controller,
struct msm_mmc_platform_data *plat,
unsigned int stat_irq, unsigned long stat_irq_flags);
#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS)
extern int smd_debugfs_init(void);
#else
static inline int smd_debugfs_init(void) { return 0; }
#endif
#endif

912
arch/arm/mach-msm/devices-iommu.c
View File

@ -1,912 +0,0 @@
/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/bootmem.h>
#include <linux/module.h>
#include <mach/irqs.h>
#include <mach/iommu.h>
static struct resource msm_iommu_jpegd_resources[] = {
{
.start = 0x07300000,
.end = 0x07300000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
.end = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_JPEGD_CB_SC_SECURE_IRQ,
.end = SMMU_JPEGD_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_vpe_resources[] = {
{
.start = 0x07400000,
.end = 0x07400000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
.end = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_VPE_CB_SC_SECURE_IRQ,
.end = SMMU_VPE_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_mdp0_resources[] = {
{
.start = 0x07500000,
.end = 0x07500000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
.end = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_MDP0_CB_SC_SECURE_IRQ,
.end = SMMU_MDP0_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_mdp1_resources[] = {
{
.start = 0x07600000,
.end = 0x07600000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
.end = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_MDP1_CB_SC_SECURE_IRQ,
.end = SMMU_MDP1_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_rot_resources[] = {
{
.start = 0x07700000,
.end = 0x07700000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
.end = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_ROT_CB_SC_SECURE_IRQ,
.end = SMMU_ROT_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_ijpeg_resources[] = {
{
.start = 0x07800000,
.end = 0x07800000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
.end = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_IJPEG_CB_SC_SECURE_IRQ,
.end = SMMU_IJPEG_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_vfe_resources[] = {
{
.start = 0x07900000,
.end = 0x07900000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
.end = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_VFE_CB_SC_SECURE_IRQ,
.end = SMMU_VFE_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_vcodec_a_resources[] = {
{
.start = 0x07A00000,
.end = 0x07A00000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
.end = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
.end = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_vcodec_b_resources[] = {
{
.start = 0x07B00000,
.end = 0x07B00000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
.end = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
.end = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_gfx3d_resources[] = {
{
.start = 0x07C00000,
.end = 0x07C00000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
.end = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_GFX3D_CB_SC_SECURE_IRQ,
.end = SMMU_GFX3D_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_gfx2d0_resources[] = {
{
.start = 0x07D00000,
.end = 0x07D00000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
.end = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
.end = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct resource msm_iommu_gfx2d1_resources[] = {
{
.start = 0x07E00000,
.end = 0x07E00000 + SZ_1M - 1,
.name = "physbase",
.flags = IORESOURCE_MEM,
},
{
.name = "nonsecure_irq",
.start = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
.end = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
.start = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
.end = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device msm_root_iommu_dev = {
.name = "msm_iommu",
.id = -1,
};
static struct msm_iommu_dev jpegd_iommu = {
.name = "jpegd",
.ncb = 2,
};
static struct msm_iommu_dev vpe_iommu = {
.name = "vpe",
.ncb = 2,
};
static struct msm_iommu_dev mdp0_iommu = {
.name = "mdp0",
.ncb = 2,
};
static struct msm_iommu_dev mdp1_iommu = {
.name = "mdp1",
.ncb = 2,
};
static struct msm_iommu_dev rot_iommu = {
.name = "rot",
.ncb = 2,
};
static struct msm_iommu_dev ijpeg_iommu = {
.name = "ijpeg",
.ncb = 2,
};
static struct msm_iommu_dev vfe_iommu = {
.name = "vfe",
.ncb = 2,
};
static struct msm_iommu_dev vcodec_a_iommu = {
.name = "vcodec_a",
.ncb = 2,
};
static struct msm_iommu_dev vcodec_b_iommu = {
.name = "vcodec_b",
.ncb = 2,
};
static struct msm_iommu_dev gfx3d_iommu = {
.name = "gfx3d",
.ncb = 3,
};
static struct msm_iommu_dev gfx2d0_iommu = {
.name = "gfx2d0",
.ncb = 2,
};
static struct msm_iommu_dev gfx2d1_iommu = {
.name = "gfx2d1",
.ncb = 2,
};
static struct platform_device msm_device_iommu_jpegd = {
.name = "msm_iommu",
.id = 0,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_jpegd_resources),
.resource = msm_iommu_jpegd_resources,
};
static struct platform_device msm_device_iommu_vpe = {
.name = "msm_iommu",
.id = 1,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_vpe_resources),
.resource = msm_iommu_vpe_resources,
};
static struct platform_device msm_device_iommu_mdp0 = {
.name = "msm_iommu",
.id = 2,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_mdp0_resources),
.resource = msm_iommu_mdp0_resources,
};
static struct platform_device msm_device_iommu_mdp1 = {
.name = "msm_iommu",
.id = 3,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_mdp1_resources),
.resource = msm_iommu_mdp1_resources,
};
static struct platform_device msm_device_iommu_rot = {
.name = "msm_iommu",
.id = 4,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_rot_resources),
.resource = msm_iommu_rot_resources,
};
static struct platform_device msm_device_iommu_ijpeg = {
.name = "msm_iommu",
.id = 5,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_ijpeg_resources),
.resource = msm_iommu_ijpeg_resources,
};
static struct platform_device msm_device_iommu_vfe = {
.name = "msm_iommu",
.id = 6,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_vfe_resources),
.resource = msm_iommu_vfe_resources,
};
static struct platform_device msm_device_iommu_vcodec_a = {
.name = "msm_iommu",
.id = 7,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_vcodec_a_resources),
.resource = msm_iommu_vcodec_a_resources,
};
static struct platform_device msm_device_iommu_vcodec_b = {
.name = "msm_iommu",
.id = 8,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_vcodec_b_resources),
.resource = msm_iommu_vcodec_b_resources,
};
static struct platform_device msm_device_iommu_gfx3d = {
.name = "msm_iommu",
.id = 9,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx3d_resources),
.resource = msm_iommu_gfx3d_resources,
};
static struct platform_device msm_device_iommu_gfx2d0 = {
.name = "msm_iommu",
.id = 10,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx2d0_resources),
.resource = msm_iommu_gfx2d0_resources,
};
struct platform_device msm_device_iommu_gfx2d1 = {
.name = "msm_iommu",
.id = 11,
.dev = {
.parent = &msm_root_iommu_dev.dev,
},
.num_resources = ARRAY_SIZE(msm_iommu_gfx2d1_resources),
.resource = msm_iommu_gfx2d1_resources,
};
static struct msm_iommu_ctx_dev jpegd_src_ctx = {
.name = "jpegd_src",
.num = 0,
.mids = {0, -1}
};
static struct msm_iommu_ctx_dev jpegd_dst_ctx = {
.name = "jpegd_dst",
.num = 1,
.mids = {1, -1}
};
static struct msm_iommu_ctx_dev vpe_src_ctx = {
.name = "vpe_src",
.num = 0,
.mids = {0, -1}
};
static struct msm_iommu_ctx_dev vpe_dst_ctx = {
.name = "vpe_dst",
.num = 1,
.mids = {1, -1}
};
static struct msm_iommu_ctx_dev mdp_vg1_ctx = {
.name = "mdp_vg1",
.num = 0,
.mids = {0, 2, -1}
};
static struct msm_iommu_ctx_dev mdp_rgb1_ctx = {
.name = "mdp_rgb1",
.num = 1,
.mids = {1, 3, 4, 5, 6, 7, 8, 9, 10, -1}
};
static struct msm_iommu_ctx_dev mdp_vg2_ctx = {
.name = "mdp_vg2",
.num = 0,
.mids = {0, 2, -1}
};
static struct msm_iommu_ctx_dev mdp_rgb2_ctx = {
.name = "mdp_rgb2",
.num = 1,
.mids = {1, 3, 4, 5, 6, 7, 8, 9, 10, -1}
};
static struct msm_iommu_ctx_dev rot_src_ctx = {
.name = "rot_src",
.num = 0,
.mids = {0, -1}
};
static struct msm_iommu_ctx_dev rot_dst_ctx = {
.name = "rot_dst",
.num = 1,
.mids = {1, -1}
};
static struct msm_iommu_ctx_dev ijpeg_src_ctx = {
.name = "ijpeg_src",
.num = 0,
.mids = {0, -1}
};
static struct msm_iommu_ctx_dev ijpeg_dst_ctx = {
.name = "ijpeg_dst",
.num = 1,
.mids = {1, -1}
};
static struct msm_iommu_ctx_dev vfe_imgwr_ctx = {
.name = "vfe_imgwr",
.num = 0,
.mids = {2, 3, 4, 5, 6, 7, 8, -1}
};
static struct msm_iommu_ctx_dev vfe_misc_ctx = {
.name = "vfe_misc",
.num = 1,
.mids = {0, 1, 9, -1}
};
static struct msm_iommu_ctx_dev vcodec_a_stream_ctx = {
.name = "vcodec_a_stream",
.num = 0,
.mids = {2, 5, -1}
};
static struct msm_iommu_ctx_dev vcodec_a_mm1_ctx = {
.name = "vcodec_a_mm1",
.num = 1,
.mids = {0, 1, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}
};
static struct msm_iommu_ctx_dev vcodec_b_mm2_ctx = {
.name = "vcodec_b_mm2",
.num = 0,
.mids = {0, 1, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}
};
static struct msm_iommu_ctx_dev gfx3d_user_ctx = {
.name = "gfx3d_user",
.num = 0,
.mids = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}
};
static struct msm_iommu_ctx_dev gfx3d_priv_ctx = {
.name = "gfx3d_priv",
.num = 1,
.mids = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
31, -1}
};
static struct msm_iommu_ctx_dev gfx2d0_2d0_ctx = {
.name = "gfx2d0_2d0",
.num = 0,
.mids = {0, 1, 2, 3, 4, 5, 6, 7, -1}
};
static struct msm_iommu_ctx_dev gfx2d1_2d1_ctx = {
.name = "gfx2d1_2d1",
.num = 0,
.mids = {0, 1, 2, 3, 4, 5, 6, 7, -1}
};
static struct platform_device msm_device_jpegd_src_ctx = {
.name = "msm_iommu_ctx",
.id = 0,
.dev = {
.parent = &msm_device_iommu_jpegd.dev,
},
};
static struct platform_device msm_device_jpegd_dst_ctx = {
.name = "msm_iommu_ctx",
.id = 1,
.dev = {
.parent = &msm_device_iommu_jpegd.dev,
},
};
static struct platform_device msm_device_vpe_src_ctx = {
.name = "msm_iommu_ctx",
.id = 2,
.dev = {
.parent = &msm_device_iommu_vpe.dev,
},
};
static struct platform_device msm_device_vpe_dst_ctx = {
.name = "msm_iommu_ctx",
.id = 3,
.dev = {
.parent = &msm_device_iommu_vpe.dev,
},
};
static struct platform_device msm_device_mdp_vg1_ctx = {
.name = "msm_iommu_ctx",
.id = 4,
.dev = {
.parent = &msm_device_iommu_mdp0.dev,
},
};
static struct platform_device msm_device_mdp_rgb1_ctx = {
.name = "msm_iommu_ctx",
.id = 5,
.dev = {
.parent = &msm_device_iommu_mdp0.dev,
},
};
static struct platform_device msm_device_mdp_vg2_ctx = {
.name = "msm_iommu_ctx",
.id = 6,
.dev = {
.parent = &msm_device_iommu_mdp1.dev,
},
};
static struct platform_device msm_device_mdp_rgb2_ctx = {
.name = "msm_iommu_ctx",
.id = 7,
.dev = {
.parent = &msm_device_iommu_mdp1.dev,
},
};
static struct platform_device msm_device_rot_src_ctx = {
.name = "msm_iommu_ctx",
.id = 8,
.dev = {
.parent = &msm_device_iommu_rot.dev,
},
};
static struct platform_device msm_device_rot_dst_ctx = {
.name = "msm_iommu_ctx",
.id = 9,
.dev = {
.parent = &msm_device_iommu_rot.dev,
},
};
static struct platform_device msm_device_ijpeg_src_ctx = {
.name = "msm_iommu_ctx",
.id = 10,
.dev = {
.parent = &msm_device_iommu_ijpeg.dev,
},
};
static struct platform_device msm_device_ijpeg_dst_ctx = {
.name = "msm_iommu_ctx",
.id = 11,
.dev = {
.parent = &msm_device_iommu_ijpeg.dev,
},
};
static struct platform_device msm_device_vfe_imgwr_ctx = {
.name = "msm_iommu_ctx",
.id = 12,
.dev = {
.parent = &msm_device_iommu_vfe.dev,
},
};
static struct platform_device msm_device_vfe_misc_ctx = {
.name = "msm_iommu_ctx",
.id = 13,
.dev = {
.parent = &msm_device_iommu_vfe.dev,
},
};
static struct platform_device msm_device_vcodec_a_stream_ctx = {
.name = "msm_iommu_ctx",
.id = 14,
.dev = {
.parent = &msm_device_iommu_vcodec_a.dev,
},
};
static struct platform_device msm_device_vcodec_a_mm1_ctx = {
.name = "msm_iommu_ctx",
.id = 15,
.dev = {
.parent = &msm_device_iommu_vcodec_a.dev,
},
};
static struct platform_device msm_device_vcodec_b_mm2_ctx = {
.name = "msm_iommu_ctx",
.id = 16,
.dev = {
.parent = &msm_device_iommu_vcodec_b.dev,
},
};
static struct platform_device msm_device_gfx3d_user_ctx = {
.name = "msm_iommu_ctx",
.id = 17,
.dev = {
.parent = &msm_device_iommu_gfx3d.dev,
},
};
static struct platform_device msm_device_gfx3d_priv_ctx = {
.name = "msm_iommu_ctx",
.id = 18,
.dev = {
.parent = &msm_device_iommu_gfx3d.dev,
},
};
static struct platform_device msm_device_gfx2d0_2d0_ctx = {
.name = "msm_iommu_ctx",
.id = 19,
.dev = {
.parent = &msm_device_iommu_gfx2d0.dev,
},
};
static struct platform_device msm_device_gfx2d1_2d1_ctx = {
.name = "msm_iommu_ctx",
.id = 20,
.dev = {
.parent = &msm_device_iommu_gfx2d1.dev,
},
};
static struct platform_device *msm_iommu_devs[] = {
&msm_device_iommu_jpegd,
&msm_device_iommu_vpe,
&msm_device_iommu_mdp0,
&msm_device_iommu_mdp1,
&msm_device_iommu_rot,
&msm_device_iommu_ijpeg,
&msm_device_iommu_vfe,
&msm_device_iommu_vcodec_a,
&msm_device_iommu_vcodec_b,
&msm_device_iommu_gfx3d,
&msm_device_iommu_gfx2d0,
&msm_device_iommu_gfx2d1,
};
static struct msm_iommu_dev *msm_iommu_data[] = {
&jpegd_iommu,
&vpe_iommu,
&mdp0_iommu,
&mdp1_iommu,
&rot_iommu,
&ijpeg_iommu,
&vfe_iommu,
&vcodec_a_iommu,
&vcodec_b_iommu,
&gfx3d_iommu,
&gfx2d0_iommu,
&gfx2d1_iommu,
};
static struct platform_device *msm_iommu_ctx_devs[] = {
&msm_device_jpegd_src_ctx,
&msm_device_jpegd_dst_ctx,
&msm_device_vpe_src_ctx,
&msm_device_vpe_dst_ctx,
&msm_device_mdp_vg1_ctx,
&msm_device_mdp_rgb1_ctx,
&msm_device_mdp_vg2_ctx,
&msm_device_mdp_rgb2_ctx,
&msm_device_rot_src_ctx,
&msm_device_rot_dst_ctx,
&msm_device_ijpeg_src_ctx,
&msm_device_ijpeg_dst_ctx,
&msm_device_vfe_imgwr_ctx,
&msm_device_vfe_misc_ctx,
&msm_device_vcodec_a_stream_ctx,
&msm_device_vcodec_a_mm1_ctx,
&msm_device_vcodec_b_mm2_ctx,
&msm_device_gfx3d_user_ctx,
&msm_device_gfx3d_priv_ctx,
&msm_device_gfx2d0_2d0_ctx,
&msm_device_gfx2d1_2d1_ctx,
};
static struct msm_iommu_ctx_dev *msm_iommu_ctx_data[] = {
&jpegd_src_ctx,
&jpegd_dst_ctx,
&vpe_src_ctx,
&vpe_dst_ctx,
&mdp_vg1_ctx,
&mdp_rgb1_ctx,
&mdp_vg2_ctx,
&mdp_rgb2_ctx,
&rot_src_ctx,
&rot_dst_ctx,
&ijpeg_src_ctx,
&ijpeg_dst_ctx,
&vfe_imgwr_ctx,
&vfe_misc_ctx,
&vcodec_a_stream_ctx,
&vcodec_a_mm1_ctx,
&vcodec_b_mm2_ctx,
&gfx3d_user_ctx,
&gfx3d_priv_ctx,
&gfx2d0_2d0_ctx,
&gfx2d1_2d1_ctx,
};
static int __init msm8x60_iommu_init(void)
{
int ret, i;
ret = platform_device_register(&msm_root_iommu_dev);
if (ret != 0) {
pr_err("Failed to register root IOMMU device!\n");
goto failure;
}
for (i = 0; i < ARRAY_SIZE(msm_iommu_devs); i++) {
ret = platform_device_add_data(msm_iommu_devs[i],
msm_iommu_data[i],
sizeof(struct msm_iommu_dev));
if (ret != 0) {
pr_err("platform_device_add_data failed, "
"i = %d\n", i);
goto failure_unwind;
}
ret = platform_device_register(msm_iommu_devs[i]);
if (ret != 0) {
pr_err("platform_device_register iommu failed, "
"i = %d\n", i);
goto failure_unwind;
}
}
for (i = 0; i < ARRAY_SIZE(msm_iommu_ctx_devs); i++) {
ret = platform_device_add_data(msm_iommu_ctx_devs[i],
msm_iommu_ctx_data[i],
sizeof(*msm_iommu_ctx_devs[i]));
if (ret != 0) {
pr_err("platform_device_add_data iommu failed, "
"i = %d\n", i);
goto failure_unwind2;
}
ret = platform_device_register(msm_iommu_ctx_devs[i]);
if (ret != 0) {
pr_err("platform_device_register ctx failed, "
"i = %d\n", i);
goto failure_unwind2;
}
}
return 0;
failure_unwind2:
while (--i >= 0)
platform_device_unregister(msm_iommu_ctx_devs[i]);
failure_unwind:
while (--i >= 0)
platform_device_unregister(msm_iommu_devs[i]);
platform_device_unregister(&msm_root_iommu_dev);
failure:
return ret;
}
static void __exit msm8x60_iommu_exit(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(msm_iommu_ctx_devs); i++)
platform_device_unregister(msm_iommu_ctx_devs[i]);
for (i = 0; i < ARRAY_SIZE(msm_iommu_devs); ++i)
platform_device_unregister(msm_iommu_devs[i]);
platform_device_unregister(&msm_root_iommu_dev);
}
subsys_initcall(msm8x60_iommu_init);
module_exit(msm8x60_iommu_exit);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Stepan Moskovchenko <stepanm@codeaurora.org>");

2
arch/arm/mach-msm/devices-msm7x30.c
View File

@ -21,10 +21,10 @@
#include <mach/irqs.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>
#include <mach/board.h>
#include "devices.h"
#include "smd_private.h"
#include "common.h"
#include <asm/mach/flash.h>

2
arch/arm/mach-msm/devices-qsd8x50.c
View File

@ -21,9 +21,9 @@
#include <mach/irqs.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>
#include <mach/board.h>
#include "devices.h"
#include "common.h"
#include <asm/mach/flash.h>

38
arch/arm/mach-msm/include/mach/board.h
View File

@ -1,38 +0,0 @@
/* arch/arm/mach-msm/include/mach/board.h
*
* Copyright (C) 2007 Google, Inc.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARCH_MSM_BOARD_H
#define __ASM_ARCH_MSM_BOARD_H
#include <linux/types.h>
#include <linux/platform_data/mmc-msm_sdcc.h>
/* common init routines for use by arch/arm/mach-msm/board-*.c */
void __init msm_add_devices(void);
void __init msm_init_irq(void);
void __init msm_init_gpio(void);
int __init msm_add_sdcc(unsigned int controller,
struct msm_mmc_platform_data *plat,
unsigned int stat_irq, unsigned long stat_irq_flags);
#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS)
int smd_debugfs_init(void);
#else
static inline int smd_debugfs_init(void) { return 0; }
#endif
#endif

46
arch/arm/mach-msm/include/mach/msm_iomap-8960.h
View File

@ -1,46 +0,0 @@
/*
* Copyright (C) 2007 Google, Inc.
* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* The MSM peripherals are spread all over across 768MB of physical
* space, which makes just having a simple IO_ADDRESS macro to slide
* them into the right virtual location rough. Instead, we will
* provide a master phys->virt mapping for peripherals here.
*
*/
#ifndef __ASM_ARCH_MSM_IOMAP_8960_H
#define __ASM_ARCH_MSM_IOMAP_8960_H
/* Physical base address and size of peripherals.
* Ordered by the virtual base addresses they will be mapped at.
*
* If you add or remove entries here, you'll want to edit the
* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
* changes.
*
*/
#define MSM8960_TMR_PHYS 0x0200A000
#define MSM8960_TMR_SIZE SZ_4K
#define MSM8960_TMR0_PHYS 0x0208A000
#define MSM8960_TMR0_SIZE SZ_4K
#ifdef CONFIG_DEBUG_MSM8960_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x16440000
#endif
#endif

53
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
View File

@ -1,53 +0,0 @@
/*
* Copyright (C) 2007 Google, Inc.
* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* The MSM peripherals are spread all over across 768MB of physical
* space, which makes just having a simple IO_ADDRESS macro to slide
* them into the right virtual location rough. Instead, we will
* provide a master phys->virt mapping for peripherals here.
*
*/
#ifndef __ASM_ARCH_MSM_IOMAP_8X60_H
#define __ASM_ARCH_MSM_IOMAP_8X60_H
/* Physical base address and size of peripherals.
* Ordered by the virtual base addresses they will be mapped at.
*
* MSM_VIC_BASE must be an value that can be loaded via a "mov"
* instruction, otherwise entry-macro.S will not compile.
*
* If you add or remove entries here, you'll want to edit the
* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
* changes.
*
*/
#define MSM_TLMM_BASE IOMEM(0xF0004000)
#define MSM_TLMM_PHYS 0x00800000
#define MSM_TLMM_SIZE SZ_16K
#define MSM8X60_TMR_PHYS 0x02000000
#define MSM8X60_TMR_SIZE SZ_4K
#define MSM8X60_TMR0_PHYS 0x02040000
#define MSM8X60_TMR0_SIZE SZ_4K
#ifdef CONFIG_DEBUG_MSM8660_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x19C40000
#endif
#endif

17
arch/arm/mach-msm/include/mach/msm_iomap.h
View File

@ -45,25 +45,8 @@
#include "msm_iomap-7x00.h"
#endif
#include "msm_iomap-8x60.h"
#include "msm_iomap-8960.h"
#define MSM_DEBUG_UART_SIZE SZ_4K
#if defined(CONFIG_DEBUG_MSM_UART1)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART2)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART3)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
#endif
/* Virtual addresses shared across all MSM targets. */
#define MSM_CSR_BASE IOMEM(0xE0001000)
#define MSM_TMR_BASE IOMEM(0xF0200000)
#define MSM_TMR0_BASE IOMEM(0xF0201000)
#define MSM_GPIO1_BASE IOMEM(0xE0003000)
#define MSM_GPIO2_BASE IOMEM(0xE0004000)

63
arch/arm/mach-msm/include/mach/uncompress.h
View File

@ -1,63 +0,0 @@
/*
* Copyright (C) 2007 Google, Inc.
* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
#define __ASM_ARCH_MSM_UNCOMPRESS_H
#include <asm/barrier.h>
#include <asm/processor.h>
#include <mach/msm_iomap.h>
#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
static void putc(int c)
{
#if defined(MSM_DEBUG_UART_PHYS)
#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
/*
* Wait for TX_READY to be set; but skip it if we have a
* TX underrun.
*/
if (!(UART_DM_SR & 0x08))
while (!(UART_DM_ISR & 0x80))
cpu_relax();
UART_DM_CR = 0x300;
UART_DM_NCHAR = 0x1;
UART_DM_TF = c;
#else
while (!(UART_CSR & 0x04))
cpu_relax();
UART_TF = c;
#endif
#endif
}
static inline void flush(void)
{
}
static inline void arch_decomp_setup(void)
{
}
#endif

67
arch/arm/mach-msm/io.c
View File

@ -18,6 +18,7 @@
*/
#include <linux/kernel.h>
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/export.h>
@ -27,8 +28,6 @@
#include <mach/msm_iomap.h>
#include <asm/mach/map.h>
#include <mach/board.h>
#include "common.h"
#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
@ -52,26 +51,38 @@ static struct map_desc msm_io_desc[] __initdata = {
MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_DEVICE_TYPE(DEBUG_UART, MT_DEVICE_NONSHARED),
#endif
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
.length = MSM_SHARED_RAM_SIZE,
.type = MT_DEVICE,
},
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
{
/* Must be last: virtual and pfn filled in by debug_ll_addr() */
.length = SZ_4K,
.type = MT_DEVICE_NONSHARED,
}
#endif
};
void __init msm_map_common_io(void)
{
size_t size = ARRAY_SIZE(msm_io_desc);
/* Make sure the peripheral register window is closed, since
* we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
* pages are peripheral interface or not.
*/
asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
debug_ll_addr(&msm_io_desc[size - 1].pfn,
&msm_io_desc[size - 1].virtual);
msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
#endif
iotable_init(msm_io_desc, size);
}
#endif
@ -87,10 +98,6 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
MSM_DEVICE(SCPLL),
MSM_DEVICE(AD5),
MSM_DEVICE(MDC),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_DEVICE(DEBUG_UART),
#endif
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
@ -101,40 +108,11 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
void __init msm_map_qsd8x50_io(void)
{
debug_ll_io_init();
iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
}
#endif /* CONFIG_ARCH_QSD8X50 */
#ifdef CONFIG_ARCH_MSM8X60
static struct map_desc msm8x60_io_desc[] __initdata = {
MSM_CHIP_DEVICE(TMR, MSM8X60),
MSM_CHIP_DEVICE(TMR0, MSM8X60),
#ifdef CONFIG_DEBUG_MSM8660_UART
MSM_DEVICE(DEBUG_UART),
#endif
};
void __init msm_map_msm8x60_io(void)
{
iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
}
#endif /* CONFIG_ARCH_MSM8X60 */
#ifdef CONFIG_ARCH_MSM8960
static struct map_desc msm8960_io_desc[] __initdata = {
MSM_CHIP_DEVICE(TMR, MSM8960),
MSM_CHIP_DEVICE(TMR0, MSM8960),
#ifdef CONFIG_DEBUG_MSM8960_UART
MSM_DEVICE(DEBUG_UART),
#endif
};
void __init msm_map_msm8960_io(void)
{
iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
}
#endif /* CONFIG_ARCH_MSM8960 */
#ifdef CONFIG_ARCH_MSM7X30
static struct map_desc msm7x30_io_desc[] __initdata = {
MSM_DEVICE(VIC),
@ -150,10 +128,6 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
MSM_DEVICE(SAW),
MSM_DEVICE(GCC),
MSM_DEVICE(TCSR),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_DEVICE(DEBUG_UART),
#endif
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
@ -164,10 +138,12 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
void __init msm_map_msm7x30_io(void)
{
debug_ll_io_init();
iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
}
#endif /* CONFIG_ARCH_MSM7X30 */
#ifdef CONFIG_ARCH_MSM7X00A
void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
unsigned int mtype, void *caller)
{
@ -182,3 +158,4 @@ void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
return __arm_ioremap_caller(phys_addr, size, mtype, caller);
}
#endif

17
arch/arm/mach-msm/timer.c
View File

@ -233,15 +233,8 @@ err:
}
#ifdef CONFIG_OF
static const struct of_device_id msm_timer_match[] __initconst = {
{ .compatible = "qcom,kpss-timer" },
{ .compatible = "qcom,scss-timer" },
{ },
};
void __init msm_dt_timer_init(void)
static void __init msm_dt_timer_init(struct device_node *np)
{
struct device_node *np;
u32 freq;
int irq;
struct resource res;
@ -249,12 +242,6 @@ void __init msm_dt_timer_init(void)
void __iomem *base;
void __iomem *cpu0_base;
np = of_find_matching_node(NULL, msm_timer_match);
if (!np) {
pr_err("Can't find msm timer DT node\n");
return;
}
base = of_iomap(np, 0);
if (!base) {
pr_err("Failed to map event base\n");
@ -297,6 +284,8 @@ void __init msm_dt_timer_init(void)
msm_timer_init(freq, 32, irq, !!percpu_offset);
}
CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
#endif
static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,

4
drivers/iommu/msm_iommu.c
View File

@ -31,8 +31,8 @@
#include <asm/cacheflush.h>
#include <asm/sizes.h>
#include <mach/iommu_hw-8xxx.h>
#include <mach/iommu.h>
#include "msm_iommu_hw-8xxx.h"
#include "msm_iommu.h"
#define MRC(reg, processor, op1, crn, crm, op2) \
__asm__ __volatile__ ( \

0
arch/arm/mach-msm/include/mach/iommu.h → drivers/iommu/msm_iommu.h
View File

4
drivers/iommu/msm_iommu_dev.c
View File

@ -27,8 +27,8 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <mach/iommu_hw-8xxx.h>
#include <mach/iommu.h>
#include "msm_iommu_hw-8xxx.h"
#include "msm_iommu.h"
struct iommu_ctx_iter_data {
/* input */

0
arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h → drivers/iommu/msm_iommu_hw-8xxx.h
View File

1
drivers/video/msm/msm_fb.c
View File

@ -26,7 +26,6 @@
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/platform_data/video-msm_fb.h>
#include <mach/board.h>
#include <linux/workqueue.h>
#include <linux/clk.h>
#include <linux/debugfs.h>