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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner: "The last regression fixes for 4.8 final: - Two patches addressing the fallout of the CR4 optimizations which caused CR4-less machines to fail. - Fix the VDSO build on big endian machines - Take care of FPU initialization if no CPUID is available otherwise task struct size ends up being zero - Fix up context tracking in case load_gs_index fails" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/entry/64: Fix context tracking state warning when load_gs_index fails x86/boot: Initialize FPU and X86_FEATURE_ALWAYS even if we don't have CPUID x86/vdso: Fix building on big endian host x86/boot: Fix another __read_cr4() case on 486 x86/init: Fix cr4_init_shadow() on CR4-less machines
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@ -1002,7 +1002,6 @@ ENTRY(error_entry)
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testb $3, CS+8(%rsp)
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jz .Lerror_kernelspace
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.Lerror_entry_from_usermode_swapgs:
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/*
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* We entered from user mode or we're pretending to have entered
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* from user mode due to an IRET fault.
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@ -1045,7 +1044,8 @@ ENTRY(error_entry)
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* gsbase and proceed. We'll fix up the exception and land in
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* .Lgs_change's error handler with kernel gsbase.
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*/
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jmp .Lerror_entry_from_usermode_swapgs
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SWAPGS
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jmp .Lerror_entry_done
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.Lbstep_iret:
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/* Fix truncated RIP */
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@ -22,7 +22,7 @@ static void BITSFUNC(go)(void *raw_addr, size_t raw_len,
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ELF(Phdr) *pt = (ELF(Phdr) *)(raw_addr + GET_LE(&hdr->e_phoff));
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if (hdr->e_type != ET_DYN)
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if (GET_LE(&hdr->e_type) != ET_DYN)
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fail("input is not a shared object\n");
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/* Walk the segment table. */
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@ -81,7 +81,7 @@ DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
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/* Initialize cr4 shadow for this CPU. */
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static inline void cr4_init_shadow(void)
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{
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this_cpu_write(cpu_tlbstate.cr4, __read_cr4());
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this_cpu_write(cpu_tlbstate.cr4, __read_cr4_safe());
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}
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/* Set in this cpu's CR4. */
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@ -804,21 +804,20 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
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identify_cpu_without_cpuid(c);
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/* cyrix could have cpuid enabled via c_identify()*/
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if (!have_cpuid_p())
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return;
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if (have_cpuid_p()) {
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cpu_detect(c);
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get_cpu_vendor(c);
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get_cpu_cap(c);
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cpu_detect(c);
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get_cpu_vendor(c);
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get_cpu_cap(c);
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if (this_cpu->c_early_init)
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this_cpu->c_early_init(c);
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if (this_cpu->c_early_init)
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this_cpu->c_early_init(c);
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c->cpu_index = 0;
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filter_cpuid_features(c, false);
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c->cpu_index = 0;
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filter_cpuid_features(c, false);
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if (this_cpu->c_bsp_init)
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this_cpu->c_bsp_init(c);
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if (this_cpu->c_bsp_init)
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this_cpu->c_bsp_init(c);
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}
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setup_force_cpu_cap(X86_FEATURE_ALWAYS);
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fpu__init_system(c);
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@ -1137,9 +1137,7 @@ void __init setup_arch(char **cmdline_p)
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* auditing all the early-boot CR4 manipulation would be needed to
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* rule it out.
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*/
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if (boot_cpu_data.cpuid_level >= 0)
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/* A CPU has %cr4 if and only if it has CPUID. */
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mmu_cr4_features = __read_cr4();
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mmu_cr4_features = __read_cr4_safe();
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memblock_set_current_limit(get_max_mapped());
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