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clocksource/drivers/pxa: Convert init function to return error

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The init functions do not return any error. They behave as the following:

  - panic, thus leading to a kernel crash while another timer may work and
       make the system boot up correctly

  or

  - print an error and let the caller unaware if the state of the system

Change that by converting the init functions to return an error conforming
to the CLOCKSOURCE_OF_RET prototype.

Proper error handling (rollback, errno value) will be changed later case
by case, thus this change just return back an error or success in the init
function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Daniel Lezcano 2016-06-06 17:58:27 +02:00
parent e46105aff5
commit be3aff842d
1 changed files with 33 additions and 13 deletions
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46
drivers/clocksource/pxa_timer.c
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@ -150,8 +150,10 @@ static struct irqaction pxa_ost0_irq = {
.dev_id = &ckevt_pxa_osmr0, .dev_id = &ckevt_pxa_osmr0,
}; };
static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate) static int __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
{ {
int ret;
timer_writel(0, OIER); timer_writel(0, OIER);
timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
@ -159,41 +161,59 @@ static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
ckevt_pxa_osmr0.cpumask = cpumask_of(0); ckevt_pxa_osmr0.cpumask = cpumask_of(0);
setup_irq(irq, &pxa_ost0_irq); ret = setup_irq(irq, &pxa_ost0_irq);
if (ret) {
pr_err("Failed to setup irq");
return ret;
}
ret = clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
32, clocksource_mmio_readl_up);
if (ret) {
pr_err("Failed to init clocksource");
return ret;
}
clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
32, clocksource_mmio_readl_up);
clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate, clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
MIN_OSCR_DELTA * 2, 0x7fffffff); MIN_OSCR_DELTA * 2, 0x7fffffff);
return 0;
} }
static void __init pxa_timer_dt_init(struct device_node *np) static int __init pxa_timer_dt_init(struct device_node *np)
{ {
struct clk *clk; struct clk *clk;
int irq; int irq, ret;
/* timer registers are shared with watchdog timer */ /* timer registers are shared with watchdog timer */
timer_base = of_iomap(np, 0); timer_base = of_iomap(np, 0);
if (!timer_base) if (!timer_base) {
panic("%s: unable to map resource\n", np->name); pr_err("%s: unable to map resource\n", np->name);
return -ENXIO;
}
clk = of_clk_get(np, 0); clk = of_clk_get(np, 0);
if (IS_ERR(clk)) { if (IS_ERR(clk)) {
pr_crit("%s: unable to get clk\n", np->name); pr_crit("%s: unable to get clk\n", np->name);
return; return PTR_ERR(clk);
}
ret = clk_prepare_enable(clk);
if (ret) {
pr_crit("Failed to prepare clock");
return ret;
} }
clk_prepare_enable(clk);
/* we are only interested in OS-timer0 irq */ /* we are only interested in OS-timer0 irq */
irq = irq_of_parse_and_map(np, 0); irq = irq_of_parse_and_map(np, 0);
if (irq <= 0) { if (irq <= 0) {
pr_crit("%s: unable to parse OS-timer0 irq\n", np->name); pr_crit("%s: unable to parse OS-timer0 irq\n", np->name);
return; return -EINVAL;
} }
pxa_timer_common_init(irq, clk_get_rate(clk)); return pxa_timer_common_init(irq, clk_get_rate(clk));
} }
CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init); CLOCKSOURCE_OF_DECLARE_RET(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
/* /*
* Legacy timer init for non device-tree boards. * Legacy timer init for non device-tree boards.