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watchdog: imx2_wdt: add external reset support via dt prop
The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz. This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html Cc: Fabio Estevam <festevam@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Stefan Roese <sr@denx.de> Cc: Iain Paton <ipaton0@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -5,10 +5,12 @@ Required properties:
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- reg : Should contain WDT registers location and length
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- interrupts : Should contain WDT interrupt
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Optional property:
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Optional properties:
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- big-endian: If present the watchdog device's registers are implemented
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in big endian mode, otherwise in native mode(same with CPU), for more
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detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
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- fsl,ext-reset-output: If present the watchdog device is configured to
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assert its external reset (WDOG_B) instead of issuing a software reset.
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Examples:
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@ -37,6 +37,8 @@
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#define IMX2_WDT_WCR 0x00 /* Control Register */
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#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
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#define IMX2_WDT_WCR_WDA (1 << 5) /* -> External Reset WDOG_B */
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#define IMX2_WDT_WCR_SRS (1 << 4) /* -> Software Reset Signal */
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#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
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#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
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#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
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@ -59,6 +61,7 @@ struct imx2_wdt_device {
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struct clk *clk;
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struct regmap *regmap;
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struct watchdog_device wdog;
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bool ext_reset;
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};
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static bool nowayout = WATCHDOG_NOWAYOUT;
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@ -83,6 +86,12 @@ static int imx2_wdt_restart(struct watchdog_device *wdog, unsigned long action,
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
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/* Use internal reset or external - not both */
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if (wdev->ext_reset)
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wcr_enable |= IMX2_WDT_WCR_SRS; /* do not assert int reset */
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else
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wcr_enable |= IMX2_WDT_WCR_WDA; /* do not assert ext-reset */
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/* Assert SRS signal */
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regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
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/*
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@ -112,8 +121,12 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
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val |= IMX2_WDT_WCR_WDZST;
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/* Strip the old watchdog Time-Out value */
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val &= ~IMX2_WDT_WCR_WT;
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/* Generate reset if WDOG times out */
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val &= ~IMX2_WDT_WCR_WRE;
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/* Generate internal chip-level reset if WDOG times out */
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if (!wdev->ext_reset)
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val &= ~IMX2_WDT_WCR_WRE;
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/* Or if external-reset assert WDOG_B reset only on time-out */
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else
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val |= IMX2_WDT_WCR_WRE;
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/* Keep Watchdog Disabled */
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val &= ~IMX2_WDT_WCR_WDE;
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/* Set the watchdog's Time-Out value */
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@ -230,6 +243,8 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
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regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
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wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
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wdev->ext_reset = of_property_read_bool(pdev->dev.of_node,
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"fsl,ext-reset-output");
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wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
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if (wdog->timeout != timeout)
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dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
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