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tools/power/turbostat: Enable MSR_CORE_C1_RES support for ICX

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Enable Core C1 hardware residency counter (MSR_CORE_C1_RES) on ICX.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
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Zhang Rui 2024-03-12 11:19:15 +08:00 committed by Len Brown
parent 17d1ea136b
commit bb5db22c13
1 changed files with 1 additions and 0 deletions
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tools/power/x86/turbostat/turbostat.c
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@ -664,6 +664,7 @@ static const struct platform_features icx_features = {
.bclk_freq = BCLK_100MHZ,
.supported_cstates = CC1 | CC6 | PC2 | PC6,
.cst_limit = CST_LIMIT_ICX,
.has_msr_core_c1_res = 1,
.has_irtl_msrs = 1,
.has_cst_prewake_bit = 1,
.trl_msrs = TRL_BASE | TRL_CORECOUNT,