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MIPS: sibyte: Remove unused config option SIBYTE_BCM1x55
SIBYTE_BCM1x55 is not selected anywhere, so let's get rid of it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
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1150e181a1
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@ -29,7 +29,6 @@ platform-$(CONFIG_SGI_IP30) += sgi-ip30/
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platform-$(CONFIG_SGI_IP32) += sgi-ip32/
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platform-$(CONFIG_SIBYTE_BCM112X) += sibyte/
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platform-$(CONFIG_SIBYTE_SB1250) += sibyte/
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platform-$(CONFIG_SIBYTE_BCM1x55) += sibyte/
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platform-$(CONFIG_SIBYTE_BCM1x80) += sibyte/
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platform-$(CONFIG_SNI_RM) += sni/
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platform-$(CONFIG_MACH_TX49XX) += txx9/
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@ -58,16 +58,6 @@ config SIBYTE_BCM1x80
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select SIBYTE_SB1xxx_SOC
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select SYS_SUPPORTS_SMP
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config SIBYTE_BCM1x55
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bool
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select CEVT_BCM1480
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select CSRC_BCM1480
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select HAVE_PCI
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select IRQ_MIPS_CPU
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select SIBYTE_SB1xxx_SOC
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select SIBYTE_HAS_ZBUS_PROFILING
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select SYS_SUPPORTS_SMP
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config SIBYTE_SB1xxx_SOC
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bool
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select IRQ_MIPS_CPU
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@ -143,8 +133,7 @@ config SIBYTE_CFE_CONSOLE
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config SIBYTE_BUS_WATCHER
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bool "Support for Bus Watcher statistics"
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depends on SIBYTE_SB1xxx_SOC && \
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(SIBYTE_BCM112X || SIBYTE_SB1250 || \
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SIBYTE_BCM1x55 || SIBYTE_BCM1x80)
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(SIBYTE_BCM112X || SIBYTE_SB1250 || SIBYTE_BCM1x80)
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help
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Handle and keep statistics on the bus error interrupts (COR_ECC,
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BAD_ECC, IO_BUS).
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@ -6,8 +6,6 @@ obj-$(CONFIG_SIBYTE_BCM112X) += sb1250/
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obj-$(CONFIG_SIBYTE_BCM112X) += common/
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obj-$(CONFIG_SIBYTE_SB1250) += sb1250/
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obj-$(CONFIG_SIBYTE_SB1250) += common/
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obj-$(CONFIG_SIBYTE_BCM1x55) += bcm1480/
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obj-$(CONFIG_SIBYTE_BCM1x55) += common/
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obj-$(CONFIG_SIBYTE_BCM1x80) += bcm1480/
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obj-$(CONFIG_SIBYTE_BCM1x80) += common/
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@ -13,10 +13,6 @@ cflags-$(CONFIG_SIBYTE_SB1250) += \
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-I$(srctree)/arch/mips/include/asm/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
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cflags-$(CONFIG_SIBYTE_BCM1x55) += \
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-I$(srctree)/arch/mips/include/asm/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
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cflags-$(CONFIG_SIBYTE_BCM1x80) += \
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-I$(srctree)/arch/mips/include/asm/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
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@ -24,7 +24,7 @@
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_int.h>
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#include <asm/sibyte/sb1250_scd.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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#include <asm/sibyte/bcm1480_regs.h>
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#endif
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@ -71,7 +71,7 @@ void check_bus_watcher(void)
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#if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250)
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/* Use non-destructive register */
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status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG));
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#elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#elif defined(CONFIG_SIBYTE_BCM1x80)
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/* Use non-destructive register */
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/* Same as 1250 except BUS_ERR_STATUS_DEBUG is in a different place. */
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status = csr_in32(IOADDR(A_BCM1480_BUS_ERR_STATUS_DEBUG));
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@ -295,7 +295,7 @@ void __init prom_init(void)
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#if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250)
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register_smp_ops(&sb_smp_ops);
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#endif
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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register_smp_ops(&bcm1480_smp_ops);
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#endif
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}
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@ -23,7 +23,7 @@
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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#include <asm/sibyte/bcm1480_regs.h>
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#include <asm/sibyte/bcm1480_scd.h>
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#include <asm/sibyte/bcm1480_int.h>
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@ -35,7 +35,7 @@
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#error invalid SiByte UART configuration
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#endif
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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#undef K_INT_TRACE_FREEZE
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#define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
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#undef K_INT_PERF_CNT
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@ -157,7 +157,7 @@ static void arm_tb(void)
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* a previous interrupt request. This means that bus profiling
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* requires ALL of the SCD perf counters.
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*/
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
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/* keep counters 0,2,3,4,5,6,7 as is */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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@ -290,7 +290,7 @@ static int sbprof_zbprof_start(struct file *filp)
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* pass them through. I am exploiting my knowledge that
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* cp0_status masks out IP[5]. krw
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*/
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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__raw_writeq(K_BCM1480_INT_MAP_I3,
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IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
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((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
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@ -343,7 +343,7 @@ static int sbprof_zbprof_start(struct file *filp)
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
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/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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__raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
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IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
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#else
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@ -24,7 +24,7 @@
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#include <asm/time.h>
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#include <asm/traps.h>
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#include <asm/sibyte/sb1250.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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#include <asm/sibyte/bcm1480_regs.h>
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#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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#include <asm/sibyte/sb1250_regs.h>
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@ -34,7 +34,7 @@
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#include <asm/sibyte/sb1250_genbus.h>
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#include <asm/sibyte/board.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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extern void bcm1480_setup(void);
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#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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extern void sb1250_setup(void);
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@ -114,7 +114,7 @@ int update_persistent_clock64(struct timespec64 now)
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void __init plat_mem_setup(void)
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{
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#ifdef CONFIG_SIBYTE_BCM1x80
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bcm1480_setup();
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#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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sb1250_setup();
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