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Merge branch 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull core/iommu changes for v3.4 from Ingo Molnar * 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/iommu/intel: Increase the number of iommus supported to MAX_IO_APICS x86/iommu/intel: Fix identity mapping for sandy bridge
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commit
b7f077d7bc
@ -48,8 +48,6 @@
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#define ROOT_SIZE VTD_PAGE_SIZE
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#define CONTEXT_SIZE VTD_PAGE_SIZE
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#define IS_BRIDGE_HOST_DEVICE(pdev) \
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((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
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#define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
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#define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
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#define IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)
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@ -356,10 +354,18 @@ static int hw_pass_through = 1;
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/* si_domain contains mulitple devices */
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#define DOMAIN_FLAG_STATIC_IDENTITY (1 << 2)
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/* define the limit of IOMMUs supported in each domain */
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#ifdef CONFIG_X86
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# define IOMMU_UNITS_SUPPORTED MAX_IO_APICS
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#else
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# define IOMMU_UNITS_SUPPORTED 64
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#endif
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struct dmar_domain {
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int id; /* domain id */
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int nid; /* node id */
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unsigned long iommu_bmp; /* bitmap of iommus this domain uses*/
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DECLARE_BITMAP(iommu_bmp, IOMMU_UNITS_SUPPORTED);
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/* bitmap of iommus this domain uses*/
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struct list_head devices; /* all devices' list */
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struct iova_domain iovad; /* iova's that belong to this domain */
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@ -571,7 +577,7 @@ static struct intel_iommu *domain_get_iommu(struct dmar_domain *domain)
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BUG_ON(domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE);
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BUG_ON(domain->flags & DOMAIN_FLAG_STATIC_IDENTITY);
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iommu_id = find_first_bit(&domain->iommu_bmp, g_num_of_iommus);
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iommu_id = find_first_bit(domain->iommu_bmp, g_num_of_iommus);
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if (iommu_id < 0 || iommu_id >= g_num_of_iommus)
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return NULL;
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@ -584,7 +590,7 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain)
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domain->iommu_coherency = 1;
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for_each_set_bit(i, &domain->iommu_bmp, g_num_of_iommus) {
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for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) {
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if (!ecap_coherent(g_iommus[i]->ecap)) {
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domain->iommu_coherency = 0;
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break;
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@ -598,7 +604,7 @@ static void domain_update_iommu_snooping(struct dmar_domain *domain)
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domain->iommu_snooping = 1;
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for_each_set_bit(i, &domain->iommu_bmp, g_num_of_iommus) {
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for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) {
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if (!ecap_sc_support(g_iommus[i]->ecap)) {
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domain->iommu_snooping = 0;
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break;
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@ -1334,7 +1340,7 @@ static struct dmar_domain *alloc_domain(void)
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return NULL;
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domain->nid = -1;
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memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
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memset(domain->iommu_bmp, 0, sizeof(domain->iommu_bmp));
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domain->flags = 0;
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return domain;
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@ -1360,7 +1366,7 @@ static int iommu_attach_domain(struct dmar_domain *domain,
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domain->id = num;
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set_bit(num, iommu->domain_ids);
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set_bit(iommu->seq_id, &domain->iommu_bmp);
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set_bit(iommu->seq_id, domain->iommu_bmp);
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iommu->domains[num] = domain;
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spin_unlock_irqrestore(&iommu->lock, flags);
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@ -1385,7 +1391,7 @@ static void iommu_detach_domain(struct dmar_domain *domain,
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if (found) {
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clear_bit(num, iommu->domain_ids);
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clear_bit(iommu->seq_id, &domain->iommu_bmp);
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clear_bit(iommu->seq_id, domain->iommu_bmp);
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iommu->domains[num] = NULL;
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}
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spin_unlock_irqrestore(&iommu->lock, flags);
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@ -1527,7 +1533,7 @@ static void domain_exit(struct dmar_domain *domain)
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dma_pte_free_pagetable(domain, 0, DOMAIN_MAX_PFN(domain->gaw));
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for_each_active_iommu(iommu, drhd)
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if (test_bit(iommu->seq_id, &domain->iommu_bmp))
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if (test_bit(iommu->seq_id, domain->iommu_bmp))
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iommu_detach_domain(domain, iommu);
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free_domain_mem(domain);
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@ -1653,7 +1659,7 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
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spin_unlock_irqrestore(&iommu->lock, flags);
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spin_lock_irqsave(&domain->iommu_lock, flags);
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if (!test_and_set_bit(iommu->seq_id, &domain->iommu_bmp)) {
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if (!test_and_set_bit(iommu->seq_id, domain->iommu_bmp)) {
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domain->iommu_count++;
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if (domain->iommu_count == 1)
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domain->nid = iommu->node;
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@ -2369,18 +2375,18 @@ static int __init iommu_prepare_static_identity_mapping(int hw)
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return -EFAULT;
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for_each_pci_dev(pdev) {
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/* Skip Host/PCI Bridge devices */
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if (IS_BRIDGE_HOST_DEVICE(pdev))
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continue;
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if (iommu_should_identity_map(pdev, 1)) {
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printk(KERN_INFO "IOMMU: %s identity mapping for device %s\n",
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hw ? "hardware" : "software", pci_name(pdev));
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ret = domain_add_dev_info(si_domain, pdev,
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hw ? CONTEXT_TT_PASS_THROUGH :
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CONTEXT_TT_MULTI_LEVEL);
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if (ret)
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hw ? CONTEXT_TT_PASS_THROUGH :
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CONTEXT_TT_MULTI_LEVEL);
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if (ret) {
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/* device not associated with an iommu */
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if (ret == -ENODEV)
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continue;
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return ret;
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}
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pr_info("IOMMU: %s identity mapping for device %s\n",
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hw ? "hardware" : "software", pci_name(pdev));
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}
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}
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@ -2402,12 +2408,17 @@ static int __init init_dmars(void)
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* endfor
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*/
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for_each_drhd_unit(drhd) {
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g_num_of_iommus++;
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/*
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* lock not needed as this is only incremented in the single
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* threaded kernel __init code path all other access are read
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* only
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*/
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if (g_num_of_iommus < IOMMU_UNITS_SUPPORTED) {
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g_num_of_iommus++;
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continue;
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}
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printk_once(KERN_ERR "intel-iommu: exceeded %d IOMMUs\n",
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IOMMU_UNITS_SUPPORTED);
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}
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g_iommus = kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *),
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@ -3748,7 +3759,7 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain,
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if (found == 0) {
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unsigned long tmp_flags;
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spin_lock_irqsave(&domain->iommu_lock, tmp_flags);
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clear_bit(iommu->seq_id, &domain->iommu_bmp);
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clear_bit(iommu->seq_id, domain->iommu_bmp);
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domain->iommu_count--;
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domain_update_iommu_cap(domain);
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spin_unlock_irqrestore(&domain->iommu_lock, tmp_flags);
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@ -3790,7 +3801,7 @@ static void vm_domain_remove_all_dev_info(struct dmar_domain *domain)
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*/
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spin_lock_irqsave(&domain->iommu_lock, flags2);
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if (test_and_clear_bit(iommu->seq_id,
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&domain->iommu_bmp)) {
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domain->iommu_bmp)) {
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domain->iommu_count--;
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domain_update_iommu_cap(domain);
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}
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@ -3815,7 +3826,7 @@ static struct dmar_domain *iommu_alloc_vm_domain(void)
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domain->id = vm_domid++;
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domain->nid = -1;
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memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
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memset(domain->iommu_bmp, 0, sizeof(domain->iommu_bmp));
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domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
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return domain;
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